Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Architecture-specific setup. | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
b8d8b883 | 6 | * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support |
9138d581 KO |
7 | * |
8 | * 2005-10-07 Keith Owens <kaos@sgi.com> | |
9 | * Add notify_die() hooks. | |
1da177e4 | 10 | */ |
1da177e4 LT |
11 | #include <linux/cpu.h> |
12 | #include <linux/pm.h> | |
13 | #include <linux/elf.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/kallsyms.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/mm.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/notifier.h> | |
21 | #include <linux/personality.h> | |
22 | #include <linux/sched.h> | |
1da177e4 LT |
23 | #include <linux/stddef.h> |
24 | #include <linux/thread_info.h> | |
25 | #include <linux/unistd.h> | |
26 | #include <linux/efi.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/delay.h> | |
1eeb66a1 | 29 | #include <linux/kdebug.h> |
ee211b37 | 30 | #include <linux/utsname.h> |
f14488cc | 31 | #include <linux/tracehook.h> |
93482f4e | 32 | #include <linux/rcupdate.h> |
1da177e4 LT |
33 | |
34 | #include <asm/cpu.h> | |
35 | #include <asm/delay.h> | |
36 | #include <asm/elf.h> | |
1da177e4 | 37 | #include <asm/irq.h> |
c237508a | 38 | #include <asm/kexec.h> |
1da177e4 LT |
39 | #include <asm/pgalloc.h> |
40 | #include <asm/processor.h> | |
41 | #include <asm/sal.h> | |
93f37888 | 42 | #include <asm/switch_to.h> |
1da177e4 LT |
43 | #include <asm/tlbflush.h> |
44 | #include <asm/uaccess.h> | |
45 | #include <asm/unwind.h> | |
46 | #include <asm/user.h> | |
47 | ||
48 | #include "entry.h" | |
49 | ||
50 | #ifdef CONFIG_PERFMON | |
51 | # include <asm/perfmon.h> | |
52 | #endif | |
53 | ||
54 | #include "sigframe.h" | |
55 | ||
56 | void (*ia64_mark_idle)(int); | |
1da177e4 | 57 | |
d1896049 | 58 | unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE; |
1da177e4 | 59 | EXPORT_SYMBOL(boot_option_idle_override); |
d868080d AC |
60 | void (*pm_power_off) (void); |
61 | EXPORT_SYMBOL(pm_power_off); | |
1da177e4 LT |
62 | |
63 | void | |
64 | ia64_do_show_stack (struct unw_frame_info *info, void *arg) | |
65 | { | |
66 | unsigned long ip, sp, bsp; | |
67 | char buf[128]; /* don't make it so big that it overflows the stack! */ | |
68 | ||
69 | printk("\nCall Trace:\n"); | |
70 | do { | |
71 | unw_get_ip(info, &ip); | |
72 | if (ip == 0) | |
73 | break; | |
74 | ||
75 | unw_get_sp(info, &sp); | |
76 | unw_get_bsp(info, &bsp); | |
77 | snprintf(buf, sizeof(buf), | |
78 | " [<%016lx>] %%s\n" | |
79 | " sp=%016lx bsp=%016lx\n", | |
80 | ip, sp, bsp); | |
81 | print_symbol(buf, ip); | |
82 | } while (unw_unwind(info) >= 0); | |
83 | } | |
84 | ||
85 | void | |
86 | show_stack (struct task_struct *task, unsigned long *sp) | |
87 | { | |
88 | if (!task) | |
89 | unw_init_running(ia64_do_show_stack, NULL); | |
90 | else { | |
91 | struct unw_frame_info info; | |
92 | ||
93 | unw_init_from_blocked_task(&info, task); | |
94 | ia64_do_show_stack(&info, NULL); | |
95 | } | |
96 | } | |
97 | ||
98 | void | |
99 | dump_stack (void) | |
100 | { | |
101 | show_stack(NULL, NULL); | |
102 | } | |
103 | ||
104 | EXPORT_SYMBOL(dump_stack); | |
105 | ||
106 | void | |
107 | show_regs (struct pt_regs *regs) | |
108 | { | |
109 | unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri; | |
110 | ||
111 | print_modules(); | |
19c5870c AD |
112 | printk("\nPid: %d, CPU %d, comm: %20s\n", task_pid_nr(current), |
113 | smp_processor_id(), current->comm); | |
ee211b37 TL |
114 | printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n", |
115 | regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(), | |
116 | init_utsname()->release); | |
1da177e4 LT |
117 | print_symbol("ip is at %s\n", ip); |
118 | printk("unat: %016lx pfs : %016lx rsc : %016lx\n", | |
119 | regs->ar_unat, regs->ar_pfs, regs->ar_rsc); | |
120 | printk("rnat: %016lx bsps: %016lx pr : %016lx\n", | |
121 | regs->ar_rnat, regs->ar_bspstore, regs->pr); | |
122 | printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n", | |
123 | regs->loadrs, regs->ar_ccv, regs->ar_fpsr); | |
124 | printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd); | |
125 | printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7); | |
126 | printk("f6 : %05lx%016lx f7 : %05lx%016lx\n", | |
127 | regs->f6.u.bits[1], regs->f6.u.bits[0], | |
128 | regs->f7.u.bits[1], regs->f7.u.bits[0]); | |
129 | printk("f8 : %05lx%016lx f9 : %05lx%016lx\n", | |
130 | regs->f8.u.bits[1], regs->f8.u.bits[0], | |
131 | regs->f9.u.bits[1], regs->f9.u.bits[0]); | |
132 | printk("f10 : %05lx%016lx f11 : %05lx%016lx\n", | |
133 | regs->f10.u.bits[1], regs->f10.u.bits[0], | |
134 | regs->f11.u.bits[1], regs->f11.u.bits[0]); | |
135 | ||
136 | printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3); | |
137 | printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10); | |
138 | printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13); | |
139 | printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16); | |
140 | printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19); | |
141 | printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22); | |
142 | printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25); | |
143 | printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28); | |
144 | printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31); | |
145 | ||
146 | if (user_mode(regs)) { | |
147 | /* print the stacked registers */ | |
148 | unsigned long val, *bsp, ndirty; | |
149 | int i, sof, is_nat = 0; | |
150 | ||
151 | sof = regs->cr_ifs & 0x7f; /* size of frame */ | |
152 | ndirty = (regs->loadrs >> 19); | |
153 | bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty); | |
154 | for (i = 0; i < sof; ++i) { | |
155 | get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i)); | |
156 | printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val, | |
157 | ((i == sof - 1) || (i % 3) == 2) ? "\n" : " "); | |
158 | } | |
159 | } else | |
160 | show_stack(NULL, NULL); | |
161 | } | |
162 | ||
353f6dd2 AS |
163 | /* local support for deprecated console_print */ |
164 | void | |
165 | console_print(const char *s) | |
166 | { | |
167 | printk(KERN_EMERG "%s", s); | |
168 | } | |
169 | ||
1da177e4 | 170 | void |
3633c730 | 171 | do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall) |
1da177e4 LT |
172 | { |
173 | if (fsys_mode(current, &scr->pt)) { | |
3633c730 HS |
174 | /* |
175 | * defer signal-handling etc. until we return to | |
176 | * privilege-level 0. | |
177 | */ | |
1da177e4 LT |
178 | if (!ia64_psr(&scr->pt)->lp) |
179 | ia64_psr(&scr->pt)->lp = 1; | |
180 | return; | |
181 | } | |
182 | ||
183 | #ifdef CONFIG_PERFMON | |
184 | if (current->thread.pfm_needs_checking) | |
3633c730 HS |
185 | /* |
186 | * Note: pfm_handle_work() allow us to call it with interrupts | |
187 | * disabled, and may enable interrupts within the function. | |
188 | */ | |
1da177e4 LT |
189 | pfm_handle_work(); |
190 | #endif | |
191 | ||
192 | /* deal with pending signal delivery */ | |
3633c730 HS |
193 | if (test_thread_flag(TIF_SIGPENDING)) { |
194 | local_irq_enable(); /* force interrupt enable */ | |
4a177cbf | 195 | ia64_do_signal(scr, in_syscall); |
3633c730 | 196 | } |
3b2ce0b1 | 197 | |
0967237c TL |
198 | if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME)) { |
199 | local_irq_enable(); /* force interrupt enable */ | |
f14488cc SL |
200 | tracehook_notify_resume(&scr->pt); |
201 | } | |
202 | ||
3b2ce0b1 | 203 | /* copy user rbs to kernel rbs */ |
3633c730 HS |
204 | if (unlikely(test_thread_flag(TIF_RESTORE_RSE))) { |
205 | local_irq_enable(); /* force interrupt enable */ | |
3b2ce0b1 | 206 | ia64_sync_krbs(); |
3633c730 HS |
207 | } |
208 | ||
209 | local_irq_disable(); /* force interrupt disable */ | |
1da177e4 LT |
210 | } |
211 | ||
8df5a500 SE |
212 | static int pal_halt = 1; |
213 | static int can_do_pal_halt = 1; | |
214 | ||
1da177e4 LT |
215 | static int __init nohalt_setup(char * str) |
216 | { | |
fb573856 | 217 | pal_halt = can_do_pal_halt = 0; |
1da177e4 LT |
218 | return 1; |
219 | } | |
220 | __setup("nohalt", nohalt_setup); | |
221 | ||
a71f62ed | 222 | void |
8df5a500 SE |
223 | update_pal_halt_status(int status) |
224 | { | |
225 | can_do_pal_halt = pal_halt && status; | |
226 | } | |
227 | ||
1da177e4 LT |
228 | /* |
229 | * We use this if we don't have any better idle routine.. | |
230 | */ | |
231 | void | |
232 | default_idle (void) | |
233 | { | |
6c4fa560 | 234 | local_irq_enable(); |
64c7c8f8 | 235 | while (!need_resched()) { |
71416bea DS |
236 | if (can_do_pal_halt) { |
237 | local_irq_disable(); | |
238 | if (!need_resched()) { | |
239 | safe_halt(); | |
240 | } | |
241 | local_irq_enable(); | |
242 | } else | |
1da177e4 | 243 | cpu_relax(); |
64c7c8f8 | 244 | } |
1da177e4 LT |
245 | } |
246 | ||
247 | #ifdef CONFIG_HOTPLUG_CPU | |
248 | /* We don't actually take CPU down, just spin without interrupts. */ | |
249 | static inline void play_dead(void) | |
250 | { | |
b8d8b883 AR |
251 | unsigned int this_cpu = smp_processor_id(); |
252 | ||
1da177e4 LT |
253 | /* Ack it */ |
254 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
255 | ||
1da177e4 LT |
256 | max_xtp(); |
257 | local_irq_disable(); | |
b8d8b883 AR |
258 | idle_task_exit(); |
259 | ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]); | |
1da177e4 | 260 | /* |
b8d8b883 AR |
261 | * The above is a point of no-return, the processor is |
262 | * expected to be in SAL loop now. | |
1da177e4 | 263 | */ |
b8d8b883 | 264 | BUG(); |
1da177e4 LT |
265 | } |
266 | #else | |
267 | static inline void play_dead(void) | |
268 | { | |
269 | BUG(); | |
270 | } | |
271 | #endif /* CONFIG_HOTPLUG_CPU */ | |
272 | ||
1da177e4 LT |
273 | void __attribute__((noreturn)) |
274 | cpu_idle (void) | |
275 | { | |
276 | void (*mark_idle)(int) = ia64_mark_idle; | |
64c7c8f8 | 277 | int cpu = smp_processor_id(); |
1da177e4 LT |
278 | |
279 | /* endless idle loop with no priority at all */ | |
280 | while (1) { | |
93482f4e | 281 | rcu_idle_enter(); |
0888f06a | 282 | if (can_do_pal_halt) { |
495ab9c0 | 283 | current_thread_info()->status &= ~TS_POLLING; |
0888f06a IM |
284 | /* |
285 | * TS_POLLING-cleared state must be visible before we | |
286 | * test NEED_RESCHED: | |
287 | */ | |
288 | smp_mb(); | |
289 | } else { | |
495ab9c0 | 290 | current_thread_info()->status |= TS_POLLING; |
0888f06a | 291 | } |
1e185b97 | 292 | |
64c7c8f8 | 293 | if (!need_resched()) { |
1da177e4 | 294 | #ifdef CONFIG_SMP |
1da177e4 LT |
295 | min_xtp(); |
296 | #endif | |
7d5f9c0f | 297 | rmb(); |
1da177e4 LT |
298 | if (mark_idle) |
299 | (*mark_idle)(1); | |
300 | ||
ed176886 | 301 | default_idle(); |
64c7c8f8 NP |
302 | if (mark_idle) |
303 | (*mark_idle)(0); | |
1da177e4 | 304 | #ifdef CONFIG_SMP |
64c7c8f8 | 305 | normal_xtp(); |
1da177e4 | 306 | #endif |
64c7c8f8 | 307 | } |
93482f4e | 308 | rcu_idle_exit(); |
bd2f5536 | 309 | schedule_preempt_disabled(); |
1da177e4 | 310 | check_pgt_cache(); |
64c7c8f8 | 311 | if (cpu_is_offline(cpu)) |
1da177e4 LT |
312 | play_dead(); |
313 | } | |
314 | } | |
315 | ||
316 | void | |
317 | ia64_save_extra (struct task_struct *task) | |
318 | { | |
319 | #ifdef CONFIG_PERFMON | |
320 | unsigned long info; | |
321 | #endif | |
322 | ||
323 | if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0) | |
324 | ia64_save_debug_regs(&task->thread.dbr[0]); | |
325 | ||
326 | #ifdef CONFIG_PERFMON | |
327 | if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0) | |
328 | pfm_save_regs(task); | |
329 | ||
330 | info = __get_cpu_var(pfm_syst_info); | |
331 | if (info & PFM_CPUINFO_SYST_WIDE) | |
332 | pfm_syst_wide_update_task(task, info, 0); | |
333 | #endif | |
1da177e4 LT |
334 | } |
335 | ||
336 | void | |
337 | ia64_load_extra (struct task_struct *task) | |
338 | { | |
339 | #ifdef CONFIG_PERFMON | |
340 | unsigned long info; | |
341 | #endif | |
342 | ||
343 | if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0) | |
344 | ia64_load_debug_regs(&task->thread.dbr[0]); | |
345 | ||
346 | #ifdef CONFIG_PERFMON | |
347 | if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0) | |
348 | pfm_load_regs(task); | |
349 | ||
350 | info = __get_cpu_var(pfm_syst_info); | |
351 | if (info & PFM_CPUINFO_SYST_WIDE) | |
352 | pfm_syst_wide_update_task(task, info, 1); | |
353 | #endif | |
1da177e4 LT |
354 | } |
355 | ||
356 | /* | |
357 | * Copy the state of an ia-64 thread. | |
358 | * | |
359 | * We get here through the following call chain: | |
360 | * | |
361 | * from user-level: from kernel: | |
362 | * | |
363 | * <clone syscall> <some kernel call frames> | |
364 | * sys_clone : | |
365 | * do_fork do_fork | |
366 | * copy_thread copy_thread | |
367 | * | |
368 | * This means that the stack layout is as follows: | |
369 | * | |
370 | * +---------------------+ (highest addr) | |
371 | * | struct pt_regs | | |
372 | * +---------------------+ | |
373 | * | struct switch_stack | | |
374 | * +---------------------+ | |
375 | * | | | |
376 | * | memory stack | | |
377 | * | | <-- sp (lowest addr) | |
378 | * +---------------------+ | |
379 | * | |
380 | * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an | |
381 | * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register, | |
382 | * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the | |
383 | * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since | |
384 | * the stack is page aligned and the page size is at least 4KB, this is always the case, | |
385 | * so there is nothing to worry about. | |
386 | */ | |
387 | int | |
6f2c55b8 | 388 | copy_thread(unsigned long clone_flags, |
1da177e4 | 389 | unsigned long user_stack_base, unsigned long user_stack_size, |
afa86fc4 | 390 | struct task_struct *p) |
1da177e4 | 391 | { |
32974ad4 | 392 | extern char ia64_ret_from_clone; |
1da177e4 LT |
393 | struct switch_stack *child_stack, *stack; |
394 | unsigned long rbs, child_rbs, rbs_size; | |
395 | struct pt_regs *child_ptregs; | |
afa86fc4 | 396 | struct pt_regs *regs = current_pt_regs(); |
1da177e4 LT |
397 | int retval = 0; |
398 | ||
1da177e4 LT |
399 | child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1; |
400 | child_stack = (struct switch_stack *) child_ptregs - 1; | |
401 | ||
1da177e4 LT |
402 | rbs = (unsigned long) current + IA64_RBS_OFFSET; |
403 | child_rbs = (unsigned long) p + IA64_RBS_OFFSET; | |
1da177e4 | 404 | |
1da177e4 LT |
405 | /* copy parts of thread_struct: */ |
406 | p->thread.ksp = (unsigned long) child_stack - 16; | |
407 | ||
1da177e4 LT |
408 | /* |
409 | * NOTE: The calling convention considers all floating point | |
410 | * registers in the high partition (fph) to be scratch. Since | |
411 | * the only way to get to this point is through a system call, | |
412 | * we know that the values in fph are all dead. Hence, there | |
413 | * is no need to inherit the fph state from the parent to the | |
414 | * child and all we have to do is to make sure that | |
415 | * IA64_THREAD_FPH_VALID is cleared in the child. | |
416 | * | |
417 | * XXX We could push this optimization a bit further by | |
418 | * clearing IA64_THREAD_FPH_VALID on ANY system call. | |
419 | * However, it's not clear this is worth doing. Also, it | |
420 | * would be a slight deviation from the normal Linux system | |
421 | * call behavior where scratch registers are preserved across | |
422 | * system calls (unless used by the system call itself). | |
423 | */ | |
424 | # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \ | |
425 | | IA64_THREAD_PM_VALID) | |
426 | # define THREAD_FLAGS_TO_SET 0 | |
427 | p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR) | |
428 | | THREAD_FLAGS_TO_SET); | |
54d496c3 | 429 | |
1da177e4 | 430 | ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */ |
1da177e4 | 431 | |
54d496c3 AV |
432 | if (unlikely(p->flags & PF_KTHREAD)) { |
433 | if (unlikely(!user_stack_base)) { | |
434 | /* fork_idle() called us */ | |
435 | return 0; | |
436 | } | |
437 | memset(child_stack, 0, sizeof(*child_ptregs) + sizeof(*child_stack)); | |
438 | child_stack->r4 = user_stack_base; /* payload */ | |
439 | child_stack->r5 = user_stack_size; /* argument */ | |
440 | /* | |
441 | * Preserve PSR bits, except for bits 32-34 and 37-45, | |
442 | * which we can't read. | |
443 | */ | |
444 | child_ptregs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN; | |
445 | /* mark as valid, empty frame */ | |
446 | child_ptregs->cr_ifs = 1UL << 63; | |
447 | child_stack->ar_fpsr = child_ptregs->ar_fpsr | |
448 | = ia64_getreg(_IA64_REG_AR_FPSR); | |
449 | child_stack->pr = (1 << PRED_KERNEL_STACK); | |
450 | child_stack->ar_bspstore = child_rbs; | |
451 | child_stack->b0 = (unsigned long) &ia64_ret_from_clone; | |
452 | ||
453 | /* stop some PSR bits from being inherited. | |
454 | * the psr.up/psr.pp bits must be cleared on fork but inherited on execve() | |
455 | * therefore we must specify them explicitly here and not include them in | |
456 | * IA64_PSR_BITS_TO_CLEAR. | |
457 | */ | |
458 | child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET) | |
459 | & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP)); | |
460 | ||
461 | return 0; | |
462 | } | |
463 | stack = ((struct switch_stack *) regs) - 1; | |
464 | /* copy parent's switch_stack & pt_regs to child: */ | |
465 | memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack)); | |
466 | ||
467 | /* copy the parent's register backing store to the child: */ | |
468 | rbs_size = stack->ar_bspstore - rbs; | |
469 | memcpy((void *) child_rbs, (void *) rbs, rbs_size); | |
470 | if (clone_flags & CLONE_SETTLS) | |
471 | child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */ | |
472 | if (user_stack_base) { | |
473 | child_ptregs->r12 = user_stack_base + user_stack_size - 16; | |
474 | child_ptregs->ar_bspstore = user_stack_base; | |
475 | child_ptregs->ar_rnat = 0; | |
476 | child_ptregs->loadrs = 0; | |
477 | } | |
478 | child_stack->ar_bspstore = child_rbs + rbs_size; | |
479 | child_stack->b0 = (unsigned long) &ia64_ret_from_clone; | |
480 | ||
481 | /* stop some PSR bits from being inherited. | |
482 | * the psr.up/psr.pp bits must be cleared on fork but inherited on execve() | |
483 | * therefore we must specify them explicitly here and not include them in | |
484 | * IA64_PSR_BITS_TO_CLEAR. | |
485 | */ | |
486 | child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET) | |
487 | & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP)); | |
488 | ||
1da177e4 LT |
489 | #ifdef CONFIG_PERFMON |
490 | if (current->thread.pfm_context) | |
491 | pfm_inherit(p, child_ptregs); | |
492 | #endif | |
493 | return retval; | |
494 | } | |
495 | ||
496 | static void | |
497 | do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg) | |
498 | { | |
256a7e09 JS |
499 | unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm; |
500 | unsigned long uninitialized_var(ip); /* GCC be quiet */ | |
1da177e4 LT |
501 | elf_greg_t *dst = arg; |
502 | struct pt_regs *pt; | |
503 | char nat; | |
504 | int i; | |
505 | ||
506 | memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */ | |
507 | ||
508 | if (unw_unwind_to_user(info) < 0) | |
509 | return; | |
510 | ||
511 | unw_get_sp(info, &sp); | |
512 | pt = (struct pt_regs *) (sp + 16); | |
513 | ||
514 | urbs_end = ia64_get_user_rbs_end(task, pt, &cfm); | |
515 | ||
516 | if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0) | |
517 | return; | |
518 | ||
519 | ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end), | |
520 | &ar_rnat); | |
521 | ||
522 | /* | |
523 | * coredump format: | |
524 | * r0-r31 | |
525 | * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT) | |
526 | * predicate registers (p0-p63) | |
527 | * b0-b7 | |
528 | * ip cfm user-mask | |
529 | * ar.rsc ar.bsp ar.bspstore ar.rnat | |
530 | * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec | |
531 | */ | |
532 | ||
533 | /* r0 is zero */ | |
534 | for (i = 1, mask = (1UL << i); i < 32; ++i) { | |
535 | unw_get_gr(info, i, &dst[i], &nat); | |
536 | if (nat) | |
537 | nat_bits |= mask; | |
538 | mask <<= 1; | |
539 | } | |
540 | dst[32] = nat_bits; | |
541 | unw_get_pr(info, &dst[33]); | |
542 | ||
543 | for (i = 0; i < 8; ++i) | |
544 | unw_get_br(info, i, &dst[34 + i]); | |
545 | ||
546 | unw_get_rp(info, &ip); | |
547 | dst[42] = ip + ia64_psr(pt)->ri; | |
548 | dst[43] = cfm; | |
549 | dst[44] = pt->cr_ipsr & IA64_PSR_UM; | |
550 | ||
551 | unw_get_ar(info, UNW_AR_RSC, &dst[45]); | |
552 | /* | |
553 | * For bsp and bspstore, unw_get_ar() would return the kernel | |
554 | * addresses, but we need the user-level addresses instead: | |
555 | */ | |
556 | dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */ | |
557 | dst[47] = pt->ar_bspstore; | |
558 | dst[48] = ar_rnat; | |
559 | unw_get_ar(info, UNW_AR_CCV, &dst[49]); | |
560 | unw_get_ar(info, UNW_AR_UNAT, &dst[50]); | |
561 | unw_get_ar(info, UNW_AR_FPSR, &dst[51]); | |
562 | dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */ | |
563 | unw_get_ar(info, UNW_AR_LC, &dst[53]); | |
564 | unw_get_ar(info, UNW_AR_EC, &dst[54]); | |
565 | unw_get_ar(info, UNW_AR_CSD, &dst[55]); | |
566 | unw_get_ar(info, UNW_AR_SSD, &dst[56]); | |
567 | } | |
568 | ||
569 | void | |
570 | do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg) | |
571 | { | |
572 | elf_fpreg_t *dst = arg; | |
573 | int i; | |
574 | ||
575 | memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */ | |
576 | ||
577 | if (unw_unwind_to_user(info) < 0) | |
578 | return; | |
579 | ||
580 | /* f0 is 0.0, f1 is 1.0 */ | |
581 | ||
582 | for (i = 2; i < 32; ++i) | |
583 | unw_get_fr(info, i, dst + i); | |
584 | ||
585 | ia64_flush_fph(task); | |
586 | if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0) | |
587 | memcpy(dst + 32, task->thread.fph, 96*16); | |
588 | } | |
589 | ||
590 | void | |
591 | do_copy_regs (struct unw_frame_info *info, void *arg) | |
592 | { | |
593 | do_copy_task_regs(current, info, arg); | |
594 | } | |
595 | ||
596 | void | |
597 | do_dump_fpu (struct unw_frame_info *info, void *arg) | |
598 | { | |
599 | do_dump_task_fpu(current, info, arg); | |
600 | } | |
601 | ||
1da177e4 LT |
602 | void |
603 | ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst) | |
604 | { | |
605 | unw_init_running(do_copy_regs, dst); | |
606 | } | |
607 | ||
1da177e4 LT |
608 | int |
609 | dump_fpu (struct pt_regs *pt, elf_fpregset_t dst) | |
610 | { | |
611 | unw_init_running(do_dump_fpu, dst); | |
612 | return 1; /* f0-f31 are always valid so we always return 1 */ | |
613 | } | |
614 | ||
1da177e4 LT |
615 | /* |
616 | * Flush thread state. This is called when a thread does an execve(). | |
617 | */ | |
618 | void | |
619 | flush_thread (void) | |
620 | { | |
621 | /* drop floating-point and debug-register state if it exists: */ | |
622 | current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID); | |
623 | ia64_drop_fpu(current); | |
1da177e4 LT |
624 | } |
625 | ||
626 | /* | |
627 | * Clean up state associated with current thread. This is called when | |
628 | * the thread calls exit(). | |
629 | */ | |
630 | void | |
631 | exit_thread (void) | |
632 | { | |
9508dbfe | 633 | |
1da177e4 LT |
634 | ia64_drop_fpu(current); |
635 | #ifdef CONFIG_PERFMON | |
636 | /* if needed, stop monitoring and flush state to perfmon context */ | |
637 | if (current->thread.pfm_context) | |
638 | pfm_exit_thread(current); | |
639 | ||
640 | /* free debug register resources */ | |
641 | if (current->thread.flags & IA64_THREAD_DBG_VALID) | |
642 | pfm_release_debug_registers(current); | |
643 | #endif | |
1da177e4 LT |
644 | } |
645 | ||
646 | unsigned long | |
647 | get_wchan (struct task_struct *p) | |
648 | { | |
649 | struct unw_frame_info info; | |
650 | unsigned long ip; | |
651 | int count = 0; | |
652 | ||
6ae38488 RH |
653 | if (!p || p == current || p->state == TASK_RUNNING) |
654 | return 0; | |
655 | ||
1da177e4 LT |
656 | /* |
657 | * Note: p may not be a blocked task (it could be current or | |
658 | * another process running on some other CPU. Rather than | |
659 | * trying to determine if p is really blocked, we just assume | |
660 | * it's blocked and rely on the unwind routines to fail | |
661 | * gracefully if the process wasn't really blocked after all. | |
662 | * --davidm 99/12/15 | |
663 | */ | |
664 | unw_init_from_blocked_task(&info, p); | |
665 | do { | |
6ae38488 RH |
666 | if (p->state == TASK_RUNNING) |
667 | return 0; | |
1da177e4 LT |
668 | if (unw_unwind(&info) < 0) |
669 | return 0; | |
670 | unw_get_ip(&info, &ip); | |
671 | if (!in_sched_functions(ip)) | |
672 | return ip; | |
673 | } while (count++ < 16); | |
674 | return 0; | |
675 | } | |
676 | ||
677 | void | |
678 | cpu_halt (void) | |
679 | { | |
680 | pal_power_mgmt_info_u_t power_info[8]; | |
681 | unsigned long min_power; | |
682 | int i, min_power_state; | |
683 | ||
684 | if (ia64_pal_halt_info(power_info) != 0) | |
685 | return; | |
686 | ||
687 | min_power_state = 0; | |
688 | min_power = power_info[0].pal_power_mgmt_info_s.power_consumption; | |
689 | for (i = 1; i < 8; ++i) | |
690 | if (power_info[i].pal_power_mgmt_info_s.im | |
691 | && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) { | |
692 | min_power = power_info[i].pal_power_mgmt_info_s.power_consumption; | |
693 | min_power_state = i; | |
694 | } | |
695 | ||
696 | while (1) | |
697 | ia64_pal_halt(min_power_state); | |
698 | } | |
699 | ||
c237508a H |
700 | void machine_shutdown(void) |
701 | { | |
702 | #ifdef CONFIG_HOTPLUG_CPU | |
703 | int cpu; | |
704 | ||
705 | for_each_online_cpu(cpu) { | |
706 | if (cpu != smp_processor_id()) | |
707 | cpu_down(cpu); | |
708 | } | |
709 | #endif | |
710 | #ifdef CONFIG_KEXEC | |
711 | kexec_disable_iosapic(); | |
712 | #endif | |
713 | } | |
714 | ||
1da177e4 LT |
715 | void |
716 | machine_restart (char *restart_cmd) | |
717 | { | |
9138d581 | 718 | (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0); |
1da177e4 LT |
719 | (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL); |
720 | } | |
721 | ||
1da177e4 LT |
722 | void |
723 | machine_halt (void) | |
724 | { | |
9138d581 | 725 | (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0); |
1da177e4 LT |
726 | cpu_halt(); |
727 | } | |
728 | ||
1da177e4 LT |
729 | void |
730 | machine_power_off (void) | |
731 | { | |
732 | if (pm_power_off) | |
733 | pm_power_off(); | |
734 | machine_halt(); | |
735 | } | |
736 |