Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / kernel / irq.c
CommitLineData
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1/*
2 * linux/arch/ia64/kernel/irq.c
3 *
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5 *
6 * This file contains the code used by various IRQ handling routines:
7 * asking for different IRQ's should be done through these routines
8 * instead of just grabbing them. Thus setups with different IRQ numbers
9 * shouldn't result in any weird surprises, and installing new handlers
10 * should be easier.
11 *
12 * Copyright (C) Ashok Raj<ashok.raj@intel.com>, Intel Corporation 2004
13 *
14 * 4/14/2004: Added code to handle cpu migration and do safe irq
15 * migration without lossing interrupts for iosapic
16 * architecture.
17 */
18
19#include <asm/delay.h>
20#include <asm/uaccess.h>
21#include <linux/module.h>
22#include <linux/seq_file.h>
23#include <linux/interrupt.h>
24#include <linux/kernel_stat.h>
25
26/*
27 * 'what should we do if we get a hw irq event on an illegal vector'.
28 * each architecture has to answer this themselves.
29 */
30void ack_bad_irq(unsigned int irq)
31{
32 printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id());
33}
34
35#ifdef CONFIG_IA64_GENERIC
36unsigned int __ia64_local_vector_to_irq (ia64_vector vec)
37{
38 return (unsigned int) vec;
39}
40#endif
41
42/*
43 * Interrupt statistics:
44 */
45
46atomic_t irq_err_count;
47
48/*
49 * /proc/interrupts printing:
50 */
51
52int show_interrupts(struct seq_file *p, void *v)
53{
54 int i = *(loff_t *) v, j;
55 struct irqaction * action;
56 unsigned long flags;
57
58 if (i == 0) {
59 seq_printf(p, " ");
dc565b52 60 for_each_online_cpu(j) {
61 seq_printf(p, "CPU%d ",j);
62 }
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63 seq_putc(p, '\n');
64 }
65
66 if (i < NR_IRQS) {
67 spin_lock_irqsave(&irq_desc[i].lock, flags);
68 action = irq_desc[i].action;
69 if (!action)
70 goto skip;
71 seq_printf(p, "%3d: ",i);
72#ifndef CONFIG_SMP
73 seq_printf(p, "%10u ", kstat_irqs(i));
74#else
dc565b52 75 for_each_online_cpu(j) {
76 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
77 }
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78#endif
79 seq_printf(p, " %14s", irq_desc[i].handler->typename);
80 seq_printf(p, " %s", action->name);
81
82 for (action=action->next; action; action = action->next)
83 seq_printf(p, ", %s", action->name);
84
85 seq_putc(p, '\n');
86skip:
87 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
88 } else if (i == NR_IRQS)
89 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
90 return 0;
91}
92
93#ifdef CONFIG_SMP
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94static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
95
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96void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
97{
98 cpumask_t mask = CPU_MASK_NONE;
99
100 cpu_set(cpu_logical_id(hwid), mask);
101
102 if (irq < NR_IRQS) {
103 irq_affinity[irq] = mask;
54d5d424 104 set_irq_info(irq, mask);
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105 irq_redir[irq] = (char) (redir & 0xff);
106 }
107}
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108#endif /* CONFIG_SMP */
109
110#ifdef CONFIG_HOTPLUG_CPU
111unsigned int vectors_in_migration[NR_IRQS];
112
113/*
114 * Since cpu_online_map is already updated, we just need to check for
115 * affinity that has zeros
116 */
117static void migrate_irqs(void)
118{
119 cpumask_t mask;
120 irq_desc_t *desc;
121 int irq, new_cpu;
122
123 for (irq=0; irq < NR_IRQS; irq++) {
124 desc = irq_descp(irq);
125
126 /*
127 * No handling for now.
128 * TBD: Implement a disable function so we can now
129 * tell CPU not to respond to these local intr sources.
130 * such as ITV,CPEI,MCA etc.
131 */
132 if (desc->status == IRQ_PER_CPU)
133 continue;
134
135 cpus_and(mask, irq_affinity[irq], cpu_online_map);
136 if (any_online_cpu(mask) == NR_CPUS) {
137 /*
138 * Save it for phase 2 processing
139 */
140 vectors_in_migration[irq] = irq;
141
142 new_cpu = any_online_cpu(cpu_online_map);
143 mask = cpumask_of_cpu(new_cpu);
144
145 /*
146 * Al three are essential, currently WARN_ON.. maybe panic?
147 */
148 if (desc->handler && desc->handler->disable &&
149 desc->handler->enable && desc->handler->set_affinity) {
150 desc->handler->disable(irq);
151 desc->handler->set_affinity(irq, mask);
152 desc->handler->enable(irq);
153 } else {
154 WARN_ON((!(desc->handler) || !(desc->handler->disable) ||
155 !(desc->handler->enable) ||
156 !(desc->handler->set_affinity)));
157 }
158 }
159 }
160}
161
162void fixup_irqs(void)
163{
164 unsigned int irq;
165 extern void ia64_process_pending_intr(void);
166
167 ia64_set_itv(1<<16);
168 /*
169 * Phase 1: Locate irq's bound to this cpu and
170 * relocate them for cpu removal.
171 */
172 migrate_irqs();
173
174 /*
175 * Phase 2: Perform interrupt processing for all entries reported in
176 * local APIC.
177 */
178 ia64_process_pending_intr();
179
180 /*
181 * Phase 3: Now handle any interrupts not captured in local APIC.
182 * This is to account for cases that device interrupted during the time the
183 * rte was being disabled and re-programmed.
184 */
185 for (irq=0; irq < NR_IRQS; irq++) {
186 if (vectors_in_migration[irq]) {
187 vectors_in_migration[irq]=0;
188 __do_IRQ(irq, NULL);
189 }
190 }
191
192 /*
193 * Now let processor die. We do irq disable and max_xtp() to
194 * ensure there is no more interrupts routed to this processor.
195 * But the local timer interrupt can have 1 pending which we
196 * take care in timer_interrupt().
197 */
198 max_xtp();
199 local_irq_disable();
200}
201#endif