Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/i386/kernel/head.S -- the 32-bit startup code. | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * | |
6 | * Enhanced CPU detection and feature setting code by Mike Jagdis | |
7 | * and Martin Mares, November 1997. | |
8 | */ | |
9 | ||
10 | .text | |
1da177e4 LT |
11 | #include <linux/threads.h> |
12 | #include <linux/linkage.h> | |
13 | #include <asm/segment.h> | |
14 | #include <asm/page.h> | |
15 | #include <asm/pgtable.h> | |
16 | #include <asm/desc.h> | |
17 | #include <asm/cache.h> | |
18 | #include <asm/thread_info.h> | |
86feeaa8 | 19 | #include <asm/asm-offsets.h> |
1da177e4 LT |
20 | #include <asm/setup.h> |
21 | ||
22 | /* | |
23 | * References to members of the new_cpu_data structure. | |
24 | */ | |
25 | ||
26 | #define X86 new_cpu_data+CPUINFO_x86 | |
27 | #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor | |
28 | #define X86_MODEL new_cpu_data+CPUINFO_x86_model | |
29 | #define X86_MASK new_cpu_data+CPUINFO_x86_mask | |
30 | #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math | |
31 | #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level | |
32 | #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability | |
33 | #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id | |
34 | ||
35 | /* | |
36 | * This is how much memory *in addition to the memory covered up to | |
37 | * and including _end* we need mapped initially. We need one bit for | |
38 | * each possible page, but only in low memory, which means | |
39 | * 2^32/4096/8 = 128K worst case (4G/4G split.) | |
40 | * | |
41 | * Modulo rounding, each megabyte assigned here requires a kilobyte of | |
42 | * memory, which is currently unreclaimed. | |
43 | * | |
44 | * This should be a multiple of a page. | |
45 | */ | |
46 | #define INIT_MAP_BEYOND_END (128*1024) | |
47 | ||
48 | ||
49 | /* | |
50 | * 32-bit kernel entrypoint; only used by the boot CPU. On entry, | |
51 | * %esi points to the real-mode code as a 32-bit pointer. | |
52 | * CS and DS must be 4 GB flat segments, but we don't depend on | |
53 | * any particular GDT layout, because we load our own as soon as we | |
54 | * can. | |
55 | */ | |
f8657e1b | 56 | .section .text.head,"ax",@progbits |
1da177e4 LT |
57 | ENTRY(startup_32) |
58 | ||
c9ccf30d RR |
59 | #ifdef CONFIG_PARAVIRT |
60 | movl %cs, %eax | |
61 | testl $0x3, %eax | |
62 | jnz startup_paravirt | |
63 | #endif | |
64 | ||
1da177e4 LT |
65 | /* |
66 | * Set segments to known values. | |
67 | */ | |
68 | cld | |
69 | lgdt boot_gdt_descr - __PAGE_OFFSET | |
70 | movl $(__BOOT_DS),%eax | |
71 | movl %eax,%ds | |
72 | movl %eax,%es | |
73 | movl %eax,%fs | |
74 | movl %eax,%gs | |
75 | ||
76 | /* | |
77 | * Clear BSS first so that there are no surprises... | |
78 | * No need to cld as DF is already clear from cld above... | |
79 | */ | |
80 | xorl %eax,%eax | |
81 | movl $__bss_start - __PAGE_OFFSET,%edi | |
82 | movl $__bss_stop - __PAGE_OFFSET,%ecx | |
83 | subl %edi,%ecx | |
84 | shrl $2,%ecx | |
85 | rep ; stosl | |
484b90c4 VG |
86 | /* |
87 | * Copy bootup parameters out of the way. | |
88 | * Note: %esi still has the pointer to the real-mode data. | |
89 | * With the kexec as boot loader, parameter segment might be loaded beyond | |
90 | * kernel image and might not even be addressable by early boot page tables. | |
91 | * (kexec on panic case). Hence copy out the parameters before initializing | |
92 | * page tables. | |
93 | */ | |
94 | movl $(boot_params - __PAGE_OFFSET),%edi | |
95 | movl $(PARAM_SIZE/4),%ecx | |
96 | cld | |
97 | rep | |
98 | movsl | |
99 | movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi | |
100 | andl %esi,%esi | |
101 | jnz 2f # New command line protocol | |
102 | cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR | |
103 | jne 1f | |
104 | movzwl OLD_CL_OFFSET,%esi | |
105 | addl $(OLD_CL_BASE_ADDR),%esi | |
106 | 2: | |
4e498b66 | 107 | movl $(boot_command_line - __PAGE_OFFSET),%edi |
484b90c4 VG |
108 | movl $(COMMAND_LINE_SIZE/4),%ecx |
109 | rep | |
110 | movsl | |
111 | 1: | |
1da177e4 LT |
112 | |
113 | /* | |
114 | * Initialize page tables. This creates a PDE and a set of page | |
115 | * tables, which are located immediately beyond _end. The variable | |
116 | * init_pg_tables_end is set up to point to the first "safe" location. | |
117 | * Mappings are created both at virtual address 0 (identity mapping) | |
118 | * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END. | |
119 | * | |
120 | * Warning: don't use %esi or the stack in this code. However, %esp | |
121 | * can be used as a GPR if you really need it... | |
122 | */ | |
123 | page_pde_offset = (__PAGE_OFFSET >> 20); | |
124 | ||
125 | movl $(pg0 - __PAGE_OFFSET), %edi | |
126 | movl $(swapper_pg_dir - __PAGE_OFFSET), %edx | |
127 | movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */ | |
128 | 10: | |
129 | leal 0x007(%edi),%ecx /* Create PDE entry */ | |
130 | movl %ecx,(%edx) /* Store identity PDE entry */ | |
131 | movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ | |
132 | addl $4,%edx | |
133 | movl $1024, %ecx | |
134 | 11: | |
135 | stosl | |
136 | addl $0x1000,%eax | |
137 | loop 11b | |
138 | /* End condition: we must map up to and including INIT_MAP_BEYOND_END */ | |
139 | /* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */ | |
140 | leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp | |
141 | cmpl %ebp,%eax | |
142 | jb 10b | |
143 | movl %edi,(init_pg_tables_end - __PAGE_OFFSET) | |
144 | ||
1da177e4 LT |
145 | xorl %ebx,%ebx /* This is the boot CPU (BSP) */ |
146 | jmp 3f | |
1da177e4 LT |
147 | /* |
148 | * Non-boot CPU entry point; entered from trampoline.S | |
149 | * We can't lgdt here, because lgdt itself uses a data segment, but | |
150 | * we know the trampoline has already loaded the boot_gdt_table GDT | |
151 | * for us. | |
f8657e1b VG |
152 | * |
153 | * If cpu hotplug is not supported then this code can go in init section | |
154 | * which will be freed later | |
1da177e4 | 155 | */ |
f8657e1b VG |
156 | |
157 | #ifdef CONFIG_HOTPLUG_CPU | |
158 | .section .text,"ax",@progbits | |
159 | #else | |
160 | .section .init.text,"ax",@progbits | |
161 | #endif | |
162 | ||
163 | #ifdef CONFIG_SMP | |
1da177e4 LT |
164 | ENTRY(startup_32_smp) |
165 | cld | |
166 | movl $(__BOOT_DS),%eax | |
167 | movl %eax,%ds | |
168 | movl %eax,%es | |
169 | movl %eax,%fs | |
170 | movl %eax,%gs | |
171 | ||
172 | /* | |
173 | * New page tables may be in 4Mbyte page mode and may | |
174 | * be using the global pages. | |
175 | * | |
176 | * NOTE! If we are on a 486 we may have no cr4 at all! | |
177 | * So we do not try to touch it unless we really have | |
178 | * some bits in it to set. This won't work if the BSP | |
179 | * implements cr4 but this AP does not -- very unlikely | |
180 | * but be warned! The same applies to the pse feature | |
181 | * if not equally supported. --macro | |
182 | * | |
183 | * NOTE! We have to correct for the fact that we're | |
184 | * not yet offset PAGE_OFFSET.. | |
185 | */ | |
186 | #define cr4_bits mmu_cr4_features-__PAGE_OFFSET | |
187 | movl cr4_bits,%edx | |
188 | andl %edx,%edx | |
189 | jz 6f | |
190 | movl %cr4,%eax # Turn on paging options (PSE,PAE,..) | |
191 | orl %edx,%eax | |
192 | movl %eax,%cr4 | |
193 | ||
194 | btl $5, %eax # check if PAE is enabled | |
195 | jnc 6f | |
196 | ||
197 | /* Check if extended functions are implemented */ | |
198 | movl $0x80000000, %eax | |
199 | cpuid | |
200 | cmpl $0x80000000, %eax | |
201 | jbe 6f | |
202 | mov $0x80000001, %eax | |
203 | cpuid | |
204 | /* Execute Disable bit supported? */ | |
205 | btl $20, %edx | |
206 | jnc 6f | |
207 | ||
208 | /* Setup EFER (Extended Feature Enable Register) */ | |
209 | movl $0xc0000080, %ecx | |
210 | rdmsr | |
211 | ||
212 | btsl $11, %eax | |
213 | /* Make changes effective */ | |
214 | wrmsr | |
215 | ||
216 | 6: | |
217 | /* This is a secondary processor (AP) */ | |
218 | xorl %ebx,%ebx | |
219 | incl %ebx | |
220 | ||
1da177e4 | 221 | #endif /* CONFIG_SMP */ |
f8657e1b | 222 | 3: |
1da177e4 LT |
223 | |
224 | /* | |
225 | * Enable paging | |
226 | */ | |
227 | movl $swapper_pg_dir-__PAGE_OFFSET,%eax | |
228 | movl %eax,%cr3 /* set the page table pointer.. */ | |
229 | movl %cr0,%eax | |
230 | orl $0x80000000,%eax | |
231 | movl %eax,%cr0 /* ..and set paging (PG) bit */ | |
232 | ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ | |
233 | 1: | |
234 | /* Set up the stack pointer */ | |
235 | lss stack_start,%esp | |
236 | ||
237 | /* | |
238 | * Initialize eflags. Some BIOS's leave bits like NT set. This would | |
239 | * confuse the debugger if this code is traced. | |
240 | * XXX - best to initialize before switching to protected mode. | |
241 | */ | |
242 | pushl $0 | |
243 | popfl | |
244 | ||
245 | #ifdef CONFIG_SMP | |
246 | andl %ebx,%ebx | |
247 | jz 1f /* Initial CPU cleans BSS */ | |
248 | jmp checkCPUtype | |
249 | 1: | |
250 | #endif /* CONFIG_SMP */ | |
251 | ||
252 | /* | |
253 | * start system 32-bit setup. We need to re-do some of the things done | |
254 | * in 16-bit mode for the "real" operations. | |
255 | */ | |
256 | call setup_idt | |
257 | ||
1da177e4 LT |
258 | checkCPUtype: |
259 | ||
260 | movl $-1,X86_CPUID # -1 for no CPUID initially | |
261 | ||
262 | /* check if it is 486 or 386. */ | |
263 | /* | |
264 | * XXX - this does a lot of unnecessary setup. Alignment checks don't | |
265 | * apply at our cpl of 0 and the stack ought to be aligned already, and | |
266 | * we don't need to preserve eflags. | |
267 | */ | |
268 | ||
269 | movb $3,X86 # at least 386 | |
270 | pushfl # push EFLAGS | |
271 | popl %eax # get EFLAGS | |
272 | movl %eax,%ecx # save original EFLAGS | |
273 | xorl $0x240000,%eax # flip AC and ID bits in EFLAGS | |
274 | pushl %eax # copy to EFLAGS | |
275 | popfl # set EFLAGS | |
276 | pushfl # get new EFLAGS | |
277 | popl %eax # put it in eax | |
278 | xorl %ecx,%eax # change in flags | |
279 | pushl %ecx # restore original EFLAGS | |
280 | popfl | |
281 | testl $0x40000,%eax # check if AC bit changed | |
282 | je is386 | |
283 | ||
284 | movb $4,X86 # at least 486 | |
285 | testl $0x200000,%eax # check if ID bit changed | |
286 | je is486 | |
287 | ||
288 | /* get vendor info */ | |
289 | xorl %eax,%eax # call CPUID with 0 -> return vendor ID | |
290 | cpuid | |
291 | movl %eax,X86_CPUID # save CPUID level | |
292 | movl %ebx,X86_VENDOR_ID # lo 4 chars | |
293 | movl %edx,X86_VENDOR_ID+4 # next 4 chars | |
294 | movl %ecx,X86_VENDOR_ID+8 # last 4 chars | |
295 | ||
296 | orl %eax,%eax # do we have processor info as well? | |
297 | je is486 | |
298 | ||
299 | movl $1,%eax # Use the CPUID instruction to get CPU type | |
300 | cpuid | |
301 | movb %al,%cl # save reg for future use | |
302 | andb $0x0f,%ah # mask processor family | |
303 | movb %ah,X86 | |
304 | andb $0xf0,%al # mask model | |
305 | shrb $4,%al | |
306 | movb %al,X86_MODEL | |
307 | andb $0x0f,%cl # mask mask revision | |
308 | movb %cl,X86_MASK | |
309 | movl %edx,X86_CAPABILITY | |
310 | ||
311 | is486: movl $0x50022,%ecx # set AM, WP, NE and MP | |
312 | jmp 2f | |
313 | ||
314 | is386: movl $2,%ecx # set MP | |
315 | 2: movl %cr0,%eax | |
316 | andl $0x80000011,%eax # Save PG,PE,ET | |
317 | orl %ecx,%eax | |
318 | movl %eax,%cr0 | |
319 | ||
320 | call check_x87 | |
f95d47ca | 321 | call setup_pda |
1da177e4 LT |
322 | lgdt cpu_gdt_descr |
323 | lidt idt_descr | |
324 | ljmp $(__KERNEL_CS),$1f | |
325 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers | |
326 | movl %eax,%ss # after changing gdt. | |
327 | ||
328 | movl $(__USER_DS),%eax # DS/ES contains default USER segment | |
329 | movl %eax,%ds | |
330 | movl %eax,%es | |
331 | ||
464d1a78 JF |
332 | xorl %eax,%eax # Clear GS and LDT |
333 | movl %eax,%gs | |
1da177e4 | 334 | lldt %ax |
f95d47ca JF |
335 | |
336 | movl $(__KERNEL_PDA),%eax | |
464d1a78 | 337 | mov %eax,%fs |
f95d47ca | 338 | |
1da177e4 | 339 | cld # gcc2 wants the direction flag cleared at all times |
26fd5e08 | 340 | pushl $0 # fake return address for unwinder |
1da177e4 | 341 | #ifdef CONFIG_SMP |
d92de65c SL |
342 | movb ready, %cl |
343 | movb $1, ready | |
29fe5f3b AK |
344 | cmpb $0,%cl # the first CPU calls start_kernel |
345 | jne initialize_secondary # all other CPUs call initialize_secondary | |
1da177e4 | 346 | #endif /* CONFIG_SMP */ |
29fe5f3b | 347 | jmp start_kernel |
1da177e4 LT |
348 | |
349 | /* | |
350 | * We depend on ET to be correct. This checks for 287/387. | |
351 | */ | |
352 | check_x87: | |
353 | movb $0,X86_HARD_MATH | |
354 | clts | |
355 | fninit | |
356 | fstsw %ax | |
357 | cmpb $0,%al | |
358 | je 1f | |
359 | movl %cr0,%eax /* no coprocessor: have to set bits */ | |
360 | xorl $4,%eax /* set EM */ | |
361 | movl %eax,%cr0 | |
362 | ret | |
363 | ALIGN | |
364 | 1: movb $1,X86_HARD_MATH | |
365 | .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */ | |
366 | ret | |
367 | ||
f95d47ca JF |
368 | /* |
369 | * Point the GDT at this CPU's PDA. On boot this will be | |
370 | * cpu_gdt_table and boot_pda; for secondary CPUs, these will be | |
371 | * that CPU's GDT and PDA. | |
372 | */ | |
7ce0bcfd | 373 | ENTRY(setup_pda) |
f95d47ca JF |
374 | /* get the PDA pointer */ |
375 | movl start_pda, %eax | |
376 | ||
377 | /* slot the PDA address into the GDT */ | |
378 | mov cpu_gdt_descr+2, %ecx | |
379 | mov %ax, (__KERNEL_PDA+0+2)(%ecx) /* base & 0x0000ffff */ | |
380 | shr $16, %eax | |
381 | mov %al, (__KERNEL_PDA+4+0)(%ecx) /* base & 0x00ff0000 */ | |
382 | mov %ah, (__KERNEL_PDA+4+3)(%ecx) /* base & 0xff000000 */ | |
383 | ret | |
384 | ||
1da177e4 LT |
385 | /* |
386 | * setup_idt | |
387 | * | |
388 | * sets up a idt with 256 entries pointing to | |
389 | * ignore_int, interrupt gates. It doesn't actually load | |
390 | * idt - that can be done only after paging has been enabled | |
391 | * and the kernel moved to PAGE_OFFSET. Interrupts | |
392 | * are enabled elsewhere, when we can be relatively | |
393 | * sure everything is ok. | |
394 | * | |
395 | * Warning: %esi is live across this function. | |
396 | */ | |
397 | setup_idt: | |
398 | lea ignore_int,%edx | |
399 | movl $(__KERNEL_CS << 16),%eax | |
400 | movw %dx,%ax /* selector = 0x0010 = cs */ | |
401 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ | |
402 | ||
403 | lea idt_table,%edi | |
404 | mov $256,%ecx | |
405 | rp_sidt: | |
406 | movl %eax,(%edi) | |
407 | movl %edx,4(%edi) | |
408 | addl $8,%edi | |
409 | dec %ecx | |
410 | jne rp_sidt | |
ec5c0926 CE |
411 | |
412 | .macro set_early_handler handler,trapno | |
413 | lea \handler,%edx | |
414 | movl $(__KERNEL_CS << 16),%eax | |
415 | movw %dx,%ax | |
416 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ | |
417 | lea idt_table,%edi | |
418 | movl %eax,8*\trapno(%edi) | |
419 | movl %edx,8*\trapno+4(%edi) | |
420 | .endm | |
421 | ||
422 | set_early_handler handler=early_divide_err,trapno=0 | |
423 | set_early_handler handler=early_illegal_opcode,trapno=6 | |
424 | set_early_handler handler=early_protection_fault,trapno=13 | |
425 | set_early_handler handler=early_page_fault,trapno=14 | |
426 | ||
1da177e4 LT |
427 | ret |
428 | ||
ec5c0926 CE |
429 | early_divide_err: |
430 | xor %edx,%edx | |
431 | pushl $0 /* fake errcode */ | |
432 | jmp early_fault | |
433 | ||
434 | early_illegal_opcode: | |
435 | movl $6,%edx | |
436 | pushl $0 /* fake errcode */ | |
437 | jmp early_fault | |
438 | ||
439 | early_protection_fault: | |
440 | movl $13,%edx | |
441 | jmp early_fault | |
442 | ||
443 | early_page_fault: | |
444 | movl $14,%edx | |
445 | jmp early_fault | |
446 | ||
447 | early_fault: | |
448 | cld | |
449 | #ifdef CONFIG_PRINTK | |
450 | movl $(__KERNEL_DS),%eax | |
451 | movl %eax,%ds | |
452 | movl %eax,%es | |
453 | cmpl $2,early_recursion_flag | |
454 | je hlt_loop | |
455 | incl early_recursion_flag | |
456 | movl %cr2,%eax | |
457 | pushl %eax | |
458 | pushl %edx /* trapno */ | |
459 | pushl $fault_msg | |
460 | #ifdef CONFIG_EARLY_PRINTK | |
461 | call early_printk | |
462 | #else | |
463 | call printk | |
464 | #endif | |
465 | #endif | |
466 | hlt_loop: | |
467 | hlt | |
468 | jmp hlt_loop | |
469 | ||
1da177e4 LT |
470 | /* This is the default interrupt "handler" :-) */ |
471 | ALIGN | |
472 | ignore_int: | |
473 | cld | |
d59745ce | 474 | #ifdef CONFIG_PRINTK |
1da177e4 LT |
475 | pushl %eax |
476 | pushl %ecx | |
477 | pushl %edx | |
478 | pushl %es | |
479 | pushl %ds | |
480 | movl $(__KERNEL_DS),%eax | |
481 | movl %eax,%ds | |
482 | movl %eax,%es | |
ec5c0926 CE |
483 | cmpl $2,early_recursion_flag |
484 | je hlt_loop | |
485 | incl early_recursion_flag | |
1da177e4 LT |
486 | pushl 16(%esp) |
487 | pushl 24(%esp) | |
488 | pushl 32(%esp) | |
489 | pushl 40(%esp) | |
490 | pushl $int_msg | |
c0cdf193 IM |
491 | #ifdef CONFIG_EARLY_PRINTK |
492 | call early_printk | |
493 | #else | |
1da177e4 | 494 | call printk |
c0cdf193 | 495 | #endif |
1da177e4 LT |
496 | addl $(5*4),%esp |
497 | popl %ds | |
498 | popl %es | |
499 | popl %edx | |
500 | popl %ecx | |
501 | popl %eax | |
d59745ce | 502 | #endif |
1da177e4 LT |
503 | iret |
504 | ||
f8657e1b | 505 | .section .text |
c9ccf30d RR |
506 | #ifdef CONFIG_PARAVIRT |
507 | startup_paravirt: | |
508 | cld | |
509 | movl $(init_thread_union+THREAD_SIZE),%esp | |
510 | ||
511 | /* We take pains to preserve all the regs. */ | |
512 | pushl %edx | |
513 | pushl %ecx | |
514 | pushl %eax | |
515 | ||
c9ccf30d RR |
516 | pushl $__start_paravirtprobe |
517 | 1: | |
518 | movl 0(%esp), %eax | |
992af681 RR |
519 | cmpl $__stop_paravirtprobe, %eax |
520 | je unhandled_paravirt | |
c9ccf30d RR |
521 | pushl (%eax) |
522 | movl 8(%esp), %eax | |
523 | call *(%esp) | |
524 | popl %eax | |
525 | ||
526 | movl 4(%esp), %eax | |
527 | movl 8(%esp), %ecx | |
528 | movl 12(%esp), %edx | |
529 | ||
530 | addl $4, (%esp) | |
531 | jmp 1b | |
992af681 RR |
532 | |
533 | unhandled_paravirt: | |
534 | /* Nothing wanted us: we're screwed. */ | |
535 | ud2 | |
c9ccf30d RR |
536 | #endif |
537 | ||
1da177e4 LT |
538 | /* |
539 | * Real beginning of normal "text" segment | |
540 | */ | |
541 | ENTRY(stext) | |
542 | ENTRY(_stext) | |
543 | ||
544 | /* | |
545 | * BSS section | |
546 | */ | |
547 | .section ".bss.page_aligned","w" | |
548 | ENTRY(swapper_pg_dir) | |
549 | .fill 1024,4,0 | |
550 | ENTRY(empty_zero_page) | |
551 | .fill 4096,1,0 | |
552 | ||
553 | /* | |
554 | * This starts the data section. | |
555 | */ | |
556 | .data | |
f95d47ca JF |
557 | ENTRY(start_pda) |
558 | .long boot_pda | |
1da177e4 LT |
559 | |
560 | ENTRY(stack_start) | |
561 | .long init_thread_union+THREAD_SIZE | |
562 | .long __BOOT_DS | |
563 | ||
564 | ready: .byte 0 | |
565 | ||
ec5c0926 CE |
566 | early_recursion_flag: |
567 | .long 0 | |
568 | ||
1da177e4 LT |
569 | int_msg: |
570 | .asciz "Unknown interrupt or fault at EIP %p %p %p\n" | |
571 | ||
ec5c0926 CE |
572 | fault_msg: |
573 | .ascii "Int %d: CR2 %p err %p EIP %p CS %p flags %p\n" | |
574 | .asciz "Stack: %p %p %p %p %p %p %p %p\n" | |
575 | ||
1da177e4 LT |
576 | /* |
577 | * The IDT and GDT 'descriptors' are a strange 48-bit object | |
578 | * only used by the lidt and lgdt instructions. They are not | |
579 | * like usual segment descriptors - they consist of a 16-bit | |
580 | * segment size, and 32-bit linear address value: | |
581 | */ | |
582 | ||
583 | .globl boot_gdt_descr | |
584 | .globl idt_descr | |
1da177e4 LT |
585 | |
586 | ALIGN | |
587 | # early boot GDT descriptor (must use 1:1 address mapping) | |
588 | .word 0 # 32 bit align gdt_desc.address | |
589 | boot_gdt_descr: | |
590 | .word __BOOT_DS+7 | |
591 | .long boot_gdt_table - __PAGE_OFFSET | |
592 | ||
593 | .word 0 # 32-bit align idt_desc.address | |
594 | idt_descr: | |
595 | .word IDT_ENTRIES*8-1 # idt contains 256 entries | |
596 | .long idt_table | |
597 | ||
598 | # boot GDT descriptor (later on used by CPU#0): | |
599 | .word 0 # 32 bit align gdt_desc.address | |
f95d47ca | 600 | ENTRY(cpu_gdt_descr) |
1da177e4 LT |
601 | .word GDT_ENTRIES*8-1 |
602 | .long cpu_gdt_table | |
603 | ||
1da177e4 LT |
604 | /* |
605 | * The boot_gdt_table must mirror the equivalent in setup.S and is | |
606 | * used only for booting. | |
607 | */ | |
608 | .align L1_CACHE_BYTES | |
609 | ENTRY(boot_gdt_table) | |
610 | .fill GDT_ENTRY_BOOT_CS,8,0 | |
611 | .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ | |
612 | .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ | |
613 | ||
614 | /* | |
615 | * The Global Descriptor Table contains 28 quadwords, per-CPU. | |
616 | */ | |
4ef0652a | 617 | .align L1_CACHE_BYTES |
1da177e4 LT |
618 | ENTRY(cpu_gdt_table) |
619 | .quad 0x0000000000000000 /* NULL descriptor */ | |
620 | .quad 0x0000000000000000 /* 0x0b reserved */ | |
621 | .quad 0x0000000000000000 /* 0x13 reserved */ | |
622 | .quad 0x0000000000000000 /* 0x1b reserved */ | |
623 | .quad 0x0000000000000000 /* 0x20 unused */ | |
624 | .quad 0x0000000000000000 /* 0x28 unused */ | |
625 | .quad 0x0000000000000000 /* 0x33 TLS entry 1 */ | |
626 | .quad 0x0000000000000000 /* 0x3b TLS entry 2 */ | |
627 | .quad 0x0000000000000000 /* 0x43 TLS entry 3 */ | |
628 | .quad 0x0000000000000000 /* 0x4b reserved */ | |
629 | .quad 0x0000000000000000 /* 0x53 reserved */ | |
630 | .quad 0x0000000000000000 /* 0x5b reserved */ | |
631 | ||
632 | .quad 0x00cf9a000000ffff /* 0x60 kernel 4GB code at 0x00000000 */ | |
633 | .quad 0x00cf92000000ffff /* 0x68 kernel 4GB data at 0x00000000 */ | |
634 | .quad 0x00cffa000000ffff /* 0x73 user 4GB code at 0x00000000 */ | |
635 | .quad 0x00cff2000000ffff /* 0x7b user 4GB data at 0x00000000 */ | |
636 | ||
637 | .quad 0x0000000000000000 /* 0x80 TSS descriptor */ | |
638 | .quad 0x0000000000000000 /* 0x88 LDT descriptor */ | |
639 | ||
e6a9918c ZA |
640 | /* |
641 | * Segments used for calling PnP BIOS have byte granularity. | |
642 | * They code segments and data segments have fixed 64k limits, | |
643 | * the transfer segment sizes are set at run time. | |
644 | */ | |
645 | .quad 0x00409a000000ffff /* 0x90 32-bit code */ | |
646 | .quad 0x00009a000000ffff /* 0x98 16-bit code */ | |
647 | .quad 0x000092000000ffff /* 0xa0 16-bit data */ | |
5fe9fe3c ZA |
648 | .quad 0x0000920000000000 /* 0xa8 16-bit data */ |
649 | .quad 0x0000920000000000 /* 0xb0 16-bit data */ | |
99022c46 | 650 | |
1da177e4 LT |
651 | /* |
652 | * The APM segments have byte granularity and their bases | |
99022c46 | 653 | * are set at run time. All have 64k limits. |
1da177e4 | 654 | */ |
99022c46 ZA |
655 | .quad 0x00409a000000ffff /* 0xb8 APM CS code */ |
656 | .quad 0x00009a000000ffff /* 0xc0 APM CS 16 code (16 bit) */ | |
657 | .quad 0x004092000000ffff /* 0xc8 APM DS data */ | |
1da177e4 | 658 | |
be44d2aa | 659 | .quad 0x00c0920000000000 /* 0xd0 - ESPFIX SS */ |
f95d47ca | 660 | .quad 0x00cf92000000ffff /* 0xd8 - PDA */ |
1da177e4 LT |
661 | .quad 0x0000000000000000 /* 0xe0 - unused */ |
662 | .quad 0x0000000000000000 /* 0xe8 - unused */ | |
663 | .quad 0x0000000000000000 /* 0xf0 - unused */ | |
664 | .quad 0x0000000000000000 /* 0xf8 - GDT entry 31: double-fault TSS */ | |
665 |