[PATCH] uml: make UML_SETJMP always safe
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / i386 / Kconfig.cpu
CommitLineData
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1# Put here option for CPU selection and depending optimization
2if !X86_ELAN
3
4choice
5 prompt "Processor family"
6 default M686
7
8config M386
9 bool "386"
10 ---help---
11 This is the processor type of your CPU. This information is used for
12 optimizing purposes. In order to compile a kernel that can run on
13 all x86 CPU types (albeit not optimally fast), you can specify
14 "386" here.
15
16 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486.
19
20 Here are the settings recommended for greatest speed:
21 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
22 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
23 will run on a 386 class machine.
24 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
25 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
26 - "586" for generic Pentium CPUs lacking the TSC
27 (time stamp counter) register.
28 - "Pentium-Classic" for the Intel Pentium.
29 - "Pentium-MMX" for the Intel Pentium MMX.
30 - "Pentium-Pro" for the Intel Pentium Pro.
31 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
32 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
33 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
34 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
35 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
36 - "Crusoe" for the Transmeta Crusoe series.
37 - "Efficeon" for the Transmeta Efficeon series.
38 - "Winchip-C6" for original IDT Winchip.
39 - "Winchip-2" for IDT Winchip 2.
40 - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
41 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
f90b8116 42 - "Geode GX/LX" For AMD Geode GX and LX processors.
96d55b88 43 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
48a1204c 44 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
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45
46 If you don't know what to do, choose "386".
47
48config M486
49 bool "486"
50 help
51 Select this for a 486 series processor, either Intel or one of the
52 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
53 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
54 U5S.
55
56config M586
57 bool "586/K5/5x86/6x86/6x86MX"
58 help
59 Select this for an 586 or 686 series processor such as the AMD K5,
60 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
61 assume the RDTSC (Read Time Stamp Counter) instruction.
62
63config M586TSC
64 bool "Pentium-Classic"
65 help
66 Select this for a Pentium Classic processor with the RDTSC (Read
67 Time Stamp Counter) instruction for benchmarking.
68
69config M586MMX
70 bool "Pentium-MMX"
71 help
72 Select this for a Pentium with the MMX graphics/multimedia
73 extended instructions.
74
75config M686
76 bool "Pentium-Pro"
77 help
78 Select this for Intel Pentium Pro chips. This enables the use of
79 Pentium Pro extended instructions, and disables the init-time guard
80 against the f00f bug found in earlier Pentiums.
81
82config MPENTIUMII
83 bool "Pentium-II/Celeron(pre-Coppermine)"
84 help
85 Select this for Intel chips based on the Pentium-II and
86 pre-Coppermine Celeron core. This option enables an unaligned
87 copy optimization, compiles the kernel with optimization flags
88 tailored for the chip, and applies any applicable Pentium Pro
89 optimizations.
90
91config MPENTIUMIII
92 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
93 help
94 Select this for Intel chips based on the Pentium-III and
95 Celeron-Coppermine core. This option enables use of some
96 extended prefetch instructions in addition to the Pentium II
97 extensions.
98
99config MPENTIUMM
100 bool "Pentium M"
101 help
102 Select this for Intel Pentium M (not Pentium-4 M)
103 notebook chips.
104
105config MPENTIUM4
106 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon"
107 help
108 Select this for Intel Pentium 4 chips. This includes the
109 Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
110 (not Pentium M) chips. This option enables compile flags
111 optimized for the chip, uses the correct cache shift, and
112 applies any applicable Pentium III optimizations.
113
114config MK6
115 bool "K6/K6-II/K6-III"
116 help
117 Select this for an AMD K6-family processor. Enables use of
118 some extended instructions, and passes appropriate optimization
119 flags to GCC.
120
121config MK7
122 bool "Athlon/Duron/K7"
123 help
124 Select this for an AMD Athlon K7-family processor. Enables use of
125 some extended instructions, and passes appropriate optimization
126 flags to GCC.
127
128config MK8
129 bool "Opteron/Athlon64/Hammer/K8"
130 help
131 Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
132 use of some extended instructions, and passes appropriate optimization
133 flags to GCC.
134
135config MCRUSOE
136 bool "Crusoe"
137 help
138 Select this for a Transmeta Crusoe processor. Treats the processor
139 like a 586 with TSC, and sets some GCC optimization flags (like a
140 Pentium Pro with no alignment requirements).
141
142config MEFFICEON
143 bool "Efficeon"
144 help
145 Select this for a Transmeta Efficeon processor.
146
147config MWINCHIPC6
148 bool "Winchip-C6"
149 help
150 Select this for an IDT Winchip C6 chip. Linux and GCC
151 treat this chip as a 586TSC with some extended instructions
152 and alignment requirements.
153
154config MWINCHIP2
155 bool "Winchip-2"
156 help
157 Select this for an IDT Winchip-2. Linux and GCC
158 treat this chip as a 586TSC with some extended instructions
159 and alignment requirements.
160
161config MWINCHIP3D
162 bool "Winchip-2A/Winchip-3"
163 help
164 Select this for an IDT Winchip-2A or 3. Linux and GCC
165 treat this chip as a 586TSC with some extended instructions
166 and alignment reqirements. Also enable out of order memory
167 stores for this CPU, which can increase performance of some
168 operations.
169
170config MGEODEGX1
171 bool "GeodeGX1"
172 help
173 Select this for a Geode GX1 (Cyrix MediaGX) chip.
174
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175config MGEODE_LX
176 bool "Geode GX/LX"
177 help
178 Select this for AMD Geode GX and LX processors.
179
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180config MCYRIXIII
181 bool "CyrixIII/VIA-C3"
182 help
183 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
184 treat this chip as a generic 586. Whilst the CPU is 686 class,
185 it lacks the cmov extension which gcc assumes is present when
186 generating 686 code.
187 Note that Nehemiah (Model 9) and above will not boot with this
188 kernel due to them lacking the 3DNow! instructions used in earlier
189 incarnations of the CPU.
190
191config MVIAC3_2
192 bool "VIA C3-2 (Nehemiah)"
193 help
194 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
195 of SSE and tells gcc to treat the CPU as a 686.
196 Note, this kernel will not boot on older (pre model 9) C3s.
197
198endchoice
199
200config X86_GENERIC
201 bool "Generic x86 support"
202 help
203 Instead of just including optimizations for the selected
204 x86 variant (e.g. PII, Crusoe or Athlon), include some more
205 generic optimizations as well. This will make the kernel
206 perform better on x86 CPUs other than that selected.
207
208 This is really intended for distributors who need more
209 generic optimizations.
210
211endif
212
213#
214# Define implied options from the CPU selection here
215#
216config X86_CMPXCHG
217 bool
218 depends on !M386
219 default y
220
221config X86_XADD
222 bool
223 depends on !M386
224 default y
225
226config X86_L1_CACHE_SHIFT
227 int
228 default "7" if MPENTIUM4 || X86_GENERIC
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229 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
230 default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
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231 default "6" if MK7 || MK8 || MPENTIUMM
232
233config RWSEM_GENERIC_SPINLOCK
234 bool
235 depends on M386
236 default y
237
238config RWSEM_XCHGADD_ALGORITHM
239 bool
240 depends on !M386
241 default y
242
243config GENERIC_CALIBRATE_DELAY
244 bool
245 default y
246
247config X86_PPRO_FENCE
248 bool
249 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
250 default y
251
252config X86_F00F_BUG
253 bool
254 depends on M586MMX || M586TSC || M586 || M486 || M386
255 default y
256
257config X86_WP_WORKS_OK
258 bool
259 depends on !M386
260 default y
261
262config X86_INVLPG
263 bool
264 depends on !M386
265 default y
266
267config X86_BSWAP
268 bool
269 depends on !M386
270 default y
271
272config X86_POPAD_OK
273 bool
274 depends on !M386
275 default y
276
277config X86_CMPXCHG64
278 bool
279 depends on !M386 && !M486
280 default y
281
282config X86_ALIGNMENT_16
283 bool
284 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
285 default y
286
287config X86_GOOD_APIC
288 bool
289 depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON
290 default y
291
292config X86_INTEL_USERCOPY
293 bool
294 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON
295 default y
296
297config X86_USE_PPRO_CHECKSUM
298 bool
f90b8116 299 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX
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300 default y
301
302config X86_USE_3DNOW
303 bool
f90b8116 304 depends on MCYRIXIII || MK7 || MGEODE_LX
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305 default y
306
307config X86_OOSTORE
308 bool
309 depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
310 default y
311
312config X86_TSC
313 bool
1c08ca89 314 depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1 || MGEODE_LX) && !X86_NUMAQ
96d55b88 315 default y