projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 51533b61 MS |
1 | #include <linux/pci.h> |
| 2 | #include <linux/kernel.h> | |
| 556dcee7 | 3 | #include <arch/hwregs/intr_vect.h> |
| 51533b61 | 4 | |
| b881bc46 | 5 | void pcibios_fixup_bus(struct pci_bus *b) |
| 51533b61 MS |
6 | { |
| 7 | } | |
| 8 | ||
| 51533b61 MS |
9 | void pcibios_set_master(struct pci_dev *dev) |
| 10 | { | |
| 11 | u8 lat; | |
| 12 | pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); | |
| 13 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); | |
| 14 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); | |
| 15 | } | |
| 16 | ||
| 17 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
| 18 | enum pci_mmap_state mmap_state, int write_combine) | |
| 19 | { | |
| 20 | unsigned long prot; | |
| 21 | ||
| 22 | /* Leave vm_pgoff as-is, the PCI space address is the physical | |
| 23 | * address on this platform. | |
| 24 | */ | |
| 51533b61 MS |
25 | prot = pgprot_val(vma->vm_page_prot); |
| 26 | vma->vm_page_prot = __pgprot(prot); | |
| 27 | ||
| 28 | /* Write-combine setting is ignored, it is changed via the mtrr | |
| 29 | * interfaces on this platform. | |
| 30 | */ | |
| 31 | if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, | |
| 32 | vma->vm_end - vma->vm_start, | |
| 33 | vma->vm_page_prot)) | |
| 34 | return -EAGAIN; | |
| 35 | ||
| 36 | return 0; | |
| 37 | } | |
| 38 | ||
| b26b2d49 | 39 | resource_size_t |
| 3b7a17fc | 40 | pcibios_align_resource(void *data, const struct resource *res, |
| e31dd6e4 | 41 | resource_size_t size, resource_size_t align) |
| 51533b61 | 42 | { |
| b26b2d49 | 43 | resource_size_t start = res->start; |
| 51533b61 | 44 | |
| b26b2d49 DB |
45 | if ((res->flags & IORESOURCE_IO) && (start & 0x300)) |
| 46 | start = (start + 0x3ff) & ~0x3ff; | |
| 47 | ||
| f7454c5d | 48 | return start; |
| 51533b61 MS |
49 | } |
| 50 | ||
| 51 | int pcibios_enable_resources(struct pci_dev *dev, int mask) | |
| 52 | { | |
| 53 | u16 cmd, old_cmd; | |
| 54 | int idx; | |
| 55 | struct resource *r; | |
| 56 | ||
| 57 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | |
| 58 | old_cmd = cmd; | |
| 59 | for(idx=0; idx<6; idx++) { | |
| 60 | /* Only set up the requested stuff */ | |
| 61 | if (!(mask & (1<<idx))) | |
| 62 | continue; | |
| 63 | ||
| 64 | r = &dev->resource[idx]; | |
| 65 | if (!r->start && r->end) { | |
| 66 | printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); | |
| 67 | return -EINVAL; | |
| 68 | } | |
| 69 | if (r->flags & IORESOURCE_IO) | |
| 70 | cmd |= PCI_COMMAND_IO; | |
| 71 | if (r->flags & IORESOURCE_MEM) | |
| 72 | cmd |= PCI_COMMAND_MEMORY; | |
| 73 | } | |
| 74 | if (dev->resource[PCI_ROM_RESOURCE].start) | |
| 75 | cmd |= PCI_COMMAND_MEMORY; | |
| 76 | if (cmd != old_cmd) { | |
| 77 | printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); | |
| 78 | pci_write_config_word(dev, PCI_COMMAND, cmd); | |
| 79 | } | |
| 80 | return 0; | |
| 81 | } | |
| 82 | ||
| 83 | int pcibios_enable_irq(struct pci_dev *dev) | |
| 84 | { | |
| 85 | dev->irq = EXT_INTR_VECT; | |
| 86 | return 0; | |
| 87 | } | |
| 88 | ||
| 89 | int pcibios_enable_device(struct pci_dev *dev, int mask) | |
| 90 | { | |
| 91 | int err; | |
| 92 | ||
| 93 | if ((err = pcibios_enable_resources(dev, mask)) < 0) | |
| 94 | return err; | |
| 95 | ||
| bba6f6fc EB |
96 | if (!dev->msi_enabled) |
| 97 | pcibios_enable_irq(dev); | |
| 98 | return 0; | |
| 51533b61 | 99 | } |