[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / cris / arch-v32 / drivers / axisflashmap.c

/*
 * Physical mapping layer for MTD using the Axis partitiontable format
 *
 * Copyright (c) 2001, 2002, 2003 Axis Communications AB
 *
 * This file is under the GPL.
 *
 * First partition is always sector 0 regardless of if we find a partitiontable
 * or not. In the start of the next sector, there can be a partitiontable that
 * tells us what other partitions to define. If there isn't, we use a default
 * partition split defined below.
 *
 * Copy of os/lx25/arch/cris/arch-v10/drivers/axisflashmap.c 1.5
 * with minor changes.
 *
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/config.h>
#include <linux/init.h>
#include <linux/slab.h>

#include <linux/mtd/concat.h>
#include <linux/mtd/map.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/mtdram.h>
#include <linux/mtd/partitions.h>

#include <asm/arch/hwregs/config_defs.h>
#include <asm/axisflashmap.h>
#include <asm/mmu.h>

#define MEM_CSE0_SIZE (0x04000000)
#define MEM_CSE1_SIZE (0x04000000)

#define FLASH_UNCACHED_ADDR  KSEG_E
#define FLASH_CACHED_ADDR    KSEG_F

#if CONFIG_ETRAX_FLASH_BUSWIDTH==1
#define flash_data __u8
#elif CONFIG_ETRAX_FLASH_BUSWIDTH==2
#define flash_data __u16
#elif CONFIG_ETRAX_FLASH_BUSWIDTH==4
#define flash_data __u16
#endif

/* From head.S */
extern unsigned long romfs_start, romfs_length, romfs_in_flash;

/* The master mtd for the entire flash. */
struct mtd_info* axisflash_mtd = NULL;

/* Map driver functions. */

static map_word flash_read(struct map_info *map, unsigned long ofs)
{
	map_word tmp;
	tmp.x[0] = *(flash_data *)(map->map_priv_1 + ofs);
	return tmp;
}

static void flash_copy_from(struct map_info *map, void *to,
			    unsigned long from, ssize_t len)
{
	memcpy(to, (void *)(map->map_priv_1 + from), len);
}

static void flash_write(struct map_info *map, map_word d, unsigned long adr)
{
	*(flash_data *)(map->map_priv_1 + adr) = (flash_data)d.x[0];
}

/*
 * The map for chip select e0.
 *
 * We run into tricky coherence situations if we mix cached with uncached
 * accesses to we only use the uncached version here.
 *
 * The size field is the total size where the flash chips may be mapped on the
 * chip select. MTD probes should find all devices there and it does not matter
 * if there are unmapped gaps or aliases (mirrors of flash devices). The MTD
 * probes will ignore them.
 *
 * The start address in map_priv_1 is in virtual memory so we cannot use
 * MEM_CSE0_START but must rely on that FLASH_UNCACHED_ADDR is the start
 * address of cse0.
 */
static struct map_info map_cse0 = {
	.name = "cse0",
	.size = MEM_CSE0_SIZE,
	.bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
	.read = flash_read,
	.copy_from = flash_copy_from,
	.write = flash_write,
	.map_priv_1 = FLASH_UNCACHED_ADDR
};

/*
 * The map for chip select e1.
 *
 * If there was a gap between cse0 and cse1, map_priv_1 would get the wrong
 * address, but there isn't.
 */
static struct map_info map_cse1 = {
	.name = "cse1",
	.size = MEM_CSE1_SIZE,
	.bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
	.read = flash_read,
	.copy_from = flash_copy_from,
	.write = flash_write,
	.map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE
};

/* If no partition-table was found, we use this default-set. */
#define MAX_PARTITIONS         7
#define NUM_DEFAULT_PARTITIONS 3

/*
 * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
 * size of one flash block and "filesystem"-partition needs 5 blocks to be able
 * to use JFFS.
 */
static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
	{
		.name = "boot firmware",
		.size = CONFIG_ETRAX_PTABLE_SECTOR,
		.offset = 0
	},
	{
		.name = "kernel",
		.size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
		.offset = CONFIG_ETRAX_PTABLE_SECTOR
	},
	{
		.name = "filesystem",
		.size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
		.offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
	}
};

/* Initialize the ones normally used. */
static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
	{
		.name = "part0",
		.size = CONFIG_ETRAX_PTABLE_SECTOR,
		.offset = 0
	},
	{
		.name = "part1",
		.size = 0,
		.offset = 0
	},
	{
		.name = "part2",
		.size = 0,
		.offset = 0
	},
	{
		.name = "part3",
		.size = 0,
		.offset = 0
	},
	{
		.name = "part4",
		.size = 0,
		.offset = 0
	},
	{
		.name = "part5",
		.size = 0,
		.offset = 0
	},
	{
		.name = "part6",
		.size = 0,
		.offset = 0
	},
};

/*
 * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
 * chips in that order (because the amd_flash-driver is faster).
 */
static struct mtd_info *probe_cs(struct map_info *map_cs)
{
	struct mtd_info *mtd_cs = NULL;

	printk(KERN_INFO
	       "%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
	       map_cs->name, map_cs->size, map_cs->map_priv_1);

#ifdef CONFIG_MTD_AMDSTD
	mtd_cs = do_map_probe("amd_flash", map_cs);
#endif
#ifdef CONFIG_MTD_CFI
	if (!mtd_cs) {
		mtd_cs = do_map_probe("cfi_probe", map_cs);
	}
#endif

	return mtd_cs;
}

/*
 * Probe each chip select individually for flash chips. If there are chips on
 * both cse0 and cse1, the mtd_info structs will be concatenated to one struct
 * so that MTD partitions can cross chip boundries.
 *
 * The only known restriction to how you can mount your chips is that each
 * chip select must hold similar flash chips. But you need external hardware
 * to do that anyway and you can put totally different chips on cse0 and cse1
 * so it isn't really much of a restriction.
 */
extern struct mtd_info* __init crisv32_nand_flash_probe (void);
static struct mtd_info *flash_probe(void)
{
	struct mtd_info *mtd_cse0;
	struct mtd_info *mtd_cse1;
	struct mtd_info *mtd_nand = NULL;
	struct mtd_info *mtd_total;
	struct mtd_info *mtds[3];
	int count = 0;

	if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL)
		mtds[count++] = mtd_cse0;
	if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL)
		mtds[count++] = mtd_cse1;

#ifdef CONFIG_ETRAX_NANDFLASH
	if ((mtd_nand = crisv32_nand_flash_probe()) != NULL)
		mtds[count++] = mtd_nand;
#endif

	if (!mtd_cse0 && !mtd_cse1 && !mtd_nand) {
		/* No chip found. */
		return NULL;
	}

	if (count > 1) {
#ifdef CONFIG_MTD_CONCAT
		/* Since the concatenation layer adds a small overhead we
		 * could try to figure out if the chips in cse0 and cse1 are
		 * identical and reprobe the whole cse0+cse1 window. But since
		 * flash chips are slow, the overhead is relatively small.
		 * So we use the MTD concatenation layer instead of further
		 * complicating the probing procedure.
		 */
		mtd_total = mtd_concat_create(mtds,
		                              count,
		                              "cse0+cse1+nand");
#else
		printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel "
		       "(mis)configuration!\n", map_cse0.name, map_cse1.name);
		mtd_toal = NULL;
#endif
		if (!mtd_total) {
			printk(KERN_ERR "%s and %s: Concatenation failed!\n",
			       map_cse0.name, map_cse1.name);

			/* The best we can do now is to only use what we found
			 * at cse0.
			 */
			mtd_total = mtd_cse0;
			map_destroy(mtd_cse1);
		}
	} else {
		mtd_total = mtd_cse0? mtd_cse0 : mtd_cse1 ? mtd_cse1 : mtd_nand;

	}

	return mtd_total;
}

extern unsigned long crisv32_nand_boot;
extern unsigned long crisv32_nand_cramfs_offset;

/*
 * Probe the flash chip(s) and, if it succeeds, read the partition-table
 * and register the partitions with MTD.
 */
static int __init init_axis_flash(void)
{
	struct mtd_info *mymtd;
	int err = 0;
	int pidx = 0;
	struct partitiontable_head *ptable_head = NULL;
	struct partitiontable_entry *ptable;
	int use_default_ptable = 1; /* Until proven otherwise. */
	const char *pmsg = KERN_INFO "  /dev/flash%d at 0x%08x, size 0x%08x\n";
	static char page[512];
	size_t len;

#ifndef CONFIG_ETRAXFS_SIM
	mymtd = flash_probe();
	mymtd->read(mymtd, CONFIG_ETRAX_PTABLE_SECTOR, 512, &len, page);
	ptable_head = (struct partitiontable_head *)(page + PARTITION_TABLE_OFFSET);

	if (!mymtd) {
		/* There's no reason to use this module if no flash chip can
		 * be identified. Make sure that's understood.
		 */
		printk(KERN_INFO "axisflashmap: Found no flash chip.\n");
	} else {
		printk(KERN_INFO "%s: 0x%08x bytes of flash memory.\n",
		       mymtd->name, mymtd->size);
		axisflash_mtd = mymtd;
	}

	if (mymtd) {
		mymtd->owner = THIS_MODULE;
	}
	pidx++;  /* First partition is always set to the default. */

	if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC)
	    && (ptable_head->size <
		(MAX_PARTITIONS * sizeof(struct partitiontable_entry) +
		PARTITIONTABLE_END_MARKER_SIZE))
	    && (*(unsigned long*)((void*)ptable_head + sizeof(*ptable_head) +
				  ptable_head->size -
				  PARTITIONTABLE_END_MARKER_SIZE)
		== PARTITIONTABLE_END_MARKER)) {
		/* Looks like a start, sane length and end of a
		 * partition table, lets check csum etc.
		 */
		int ptable_ok = 0;
		struct partitiontable_entry *max_addr =
			(struct partitiontable_entry *)
			((unsigned long)ptable_head + sizeof(*ptable_head) +
			 ptable_head->size);
		unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR;
		unsigned char *p;
		unsigned long csum = 0;

		ptable = (struct partitiontable_entry *)
			((unsigned long)ptable_head + sizeof(*ptable_head));

		/* Lets be PARANOID, and check the checksum. */
		p = (unsigned char*) ptable;

		while (p <= (unsigned char*)max_addr) {
			csum += *p++;
			csum += *p++;
			csum += *p++;
			csum += *p++;
		}
		ptable_ok = (csum == ptable_head->checksum);

		/* Read the entries and use/show the info.  */
		printk(KERN_INFO " Found a%s partition table at 0x%p-0x%p.\n",
		       (ptable_ok ? " valid" : "n invalid"), ptable_head,
		       max_addr);

		/* We have found a working bootblock.  Now read the
		 * partition table.  Scan the table.  It ends when
		 * there is 0xffffffff, that is, empty flash.
		 */
		while (ptable_ok
		       && ptable->offset != 0xffffffff
		       && ptable < max_addr
		       && pidx < MAX_PARTITIONS) {

			axis_partitions[pidx].offset = offset + ptable->offset + (crisv32_nand_boot ? 16384 : 0);
			axis_partitions[pidx].size = ptable->size;

			printk(pmsg, pidx, axis_partitions[pidx].offset,
			       axis_partitions[pidx].size);
			pidx++;
			ptable++;
		}
		use_default_ptable = !ptable_ok;
	}

	if (romfs_in_flash) {
		/* Add an overlapping device for the root partition (romfs). */

		axis_partitions[pidx].name = "romfs";
		if (crisv32_nand_boot) {
			char* data = kmalloc(1024, GFP_KERNEL);
			int len;
			int offset = crisv32_nand_cramfs_offset & ~(1024-1);
			char* tmp;

			mymtd->read(mymtd, offset, 1024, &len, data);
			tmp = &data[crisv32_nand_cramfs_offset % 512];
			axis_partitions[pidx].size = *(unsigned*)(tmp + 4);
			axis_partitions[pidx].offset = crisv32_nand_cramfs_offset;
			kfree(data);
		} else {
			axis_partitions[pidx].size = romfs_length;
			axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
		}

		axis_partitions[pidx].mask_flags |= MTD_WRITEABLE;

		printk(KERN_INFO
                       " Adding readonly flash partition for romfs image:\n");
		printk(pmsg, pidx, axis_partitions[pidx].offset,
		       axis_partitions[pidx].size);
		pidx++;
	}

        if (mymtd) {
		if (use_default_ptable) {
			printk(KERN_INFO " Using default partition table.\n");
			err = add_mtd_partitions(mymtd, axis_default_partitions,
						 NUM_DEFAULT_PARTITIONS);
		} else {
			err = add_mtd_partitions(mymtd, axis_partitions, pidx);
		}

		if (err) {
			panic("axisflashmap could not add MTD partitions!\n");
		}
	}
/* CONFIG_EXTRAXFS_SIM */
#endif

	if (!romfs_in_flash) {
		/* Create an RAM device for the root partition (romfs). */

#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
		/* No use trying to boot this kernel from RAM. Panic! */
		printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
		       "device due to kernel (mis)configuration!\n");
		panic("This kernel cannot boot from RAM!\n");
#else
		struct mtd_info *mtd_ram;

		mtd_ram = (struct mtd_info *)kmalloc(sizeof(struct mtd_info),
						     GFP_KERNEL);
		if (!mtd_ram) {
			panic("axisflashmap couldn't allocate memory for "
			      "mtd_info!\n");
		}

		printk(KERN_INFO " Adding RAM partition for romfs image:\n");
		printk(pmsg, pidx, romfs_start, romfs_length);

		err = mtdram_init_device(mtd_ram, (void*)romfs_start,
		                         romfs_length, "romfs");
		if (err) {
			panic("axisflashmap could not initialize MTD RAM "
			      "device!\n");
		}
#endif
	}

	return err;
}

/* This adds the above to the kernels init-call chain. */
module_init(init_axis_flash);

EXPORT_SYMBOL(axisflash_mtd);
Commit	Line	Data
51533b61 MS	1	/*
	2	* Physical mapping layer for MTD using the Axis partitiontable format
	3	*
	4	* Copyright (c) 2001, 2002, 2003 Axis Communications AB
	5	*
	6	* This file is under the GPL.
	7	*
	8	* First partition is always sector 0 regardless of if we find a partitiontable
	9	* or not. In the start of the next sector, there can be a partitiontable that
	10	* tells us what other partitions to define. If there isn't, we use a default
	11	* partition split defined below.
	12	*
	13	* Copy of os/lx25/arch/cris/arch-v10/drivers/axisflashmap.c 1.5
	14	* with minor changes.
	15	*
	16	*/
	17
	18	#include <linux/module.h>
	19	#include <linux/types.h>
	20	#include <linux/kernel.h>
	21	#include <linux/config.h>
	22	#include <linux/init.h>
4e57b681	23	#include <linux/slab.h>
51533b61 MS	24
	25	#include <linux/mtd/concat.h>
	26	#include <linux/mtd/map.h>
	27	#include <linux/mtd/mtd.h>
	28	#include <linux/mtd/mtdram.h>
	29	#include <linux/mtd/partitions.h>
	30
	31	#include <asm/arch/hwregs/config_defs.h>
	32	#include <asm/axisflashmap.h>
	33	#include <asm/mmu.h>
	34
	35	#define MEM_CSE0_SIZE (0x04000000)
	36	#define MEM_CSE1_SIZE (0x04000000)
	37
	38	#define FLASH_UNCACHED_ADDR KSEG_E
	39	#define FLASH_CACHED_ADDR KSEG_F
	40
	41	#if CONFIG_ETRAX_FLASH_BUSWIDTH==1
	42	#define flash_data __u8
	43	#elif CONFIG_ETRAX_FLASH_BUSWIDTH==2
	44	#define flash_data __u16
	45	#elif CONFIG_ETRAX_FLASH_BUSWIDTH==4
	46	#define flash_data __u16
	47	#endif
	48
	49	/* From head.S */
	50	extern unsigned long romfs_start, romfs_length, romfs_in_flash;
	51
	52	/* The master mtd for the entire flash. */
	53	struct mtd_info* axisflash_mtd = NULL;
	54
	55	/* Map driver functions. */
	56
	57	static map_word flash_read(struct map_info *map, unsigned long ofs)
	58	{
	59	map_word tmp;
	60	tmp.x[0] = (flash_data )(map->map_priv_1 + ofs);
	61	return tmp;
	62	}
	63
	64	static void flash_copy_from(struct map_info map, void to,
	65	unsigned long from, ssize_t len)
	66	{
	67	memcpy(to, (void *)(map->map_priv_1 + from), len);
	68	}
	69
	70	static void flash_write(struct map_info *map, map_word d, unsigned long adr)
	71	{
	72	(flash_data )(map->map_priv_1 + adr) = (flash_data)d.x[0];
	73	}
	74
	75	/*
	76	* The map for chip select e0.
	77	*
	78	* We run into tricky coherence situations if we mix cached with uncached
	79	* accesses to we only use the uncached version here.
	80	*
	81	* The size field is the total size where the flash chips may be mapped on the
	82	* chip select. MTD probes should find all devices there and it does not matter
	83	* if there are unmapped gaps or aliases (mirrors of flash devices). The MTD
	84	* probes will ignore them.
	85	*
	86	* The start address in map_priv_1 is in virtual memory so we cannot use
	87	* MEM_CSE0_START but must rely on that FLASH_UNCACHED_ADDR is the start
88	* address of cse0.
89	*/
90	static struct map_info map_cse0 = {
91	.name = "cse0",
92	.size = MEM_CSE0_SIZE,
93	.bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
94	.read = flash_read,
95	.copy_from = flash_copy_from,
96	.write = flash_write,
97	.map_priv_1 = FLASH_UNCACHED_ADDR
98	};
99
100	/*
101	* The map for chip select e1.
102	*
103	* If there was a gap between cse0 and cse1, map_priv_1 would get the wrong
104	* address, but there isn't.
105	*/
106	static struct map_info map_cse1 = {
107	.name = "cse1",
108	.size = MEM_CSE1_SIZE,
109	.bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
110	.read = flash_read,
111	.copy_from = flash_copy_from,
112	.write = flash_write,
113	.map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE
114	};
115
116	/* If no partition-table was found, we use this default-set. */
117	#define MAX_PARTITIONS 7
118	#define NUM_DEFAULT_PARTITIONS 3
119
120	/*
121	* Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
122	* size of one flash block and "filesystem"-partition needs 5 blocks to be able
123	* to use JFFS.
124	*/
125	static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
126	{
127	.name = "boot firmware",
128	.size = CONFIG_ETRAX_PTABLE_SECTOR,
129	.offset = 0
130	},
131	{
132	.name = "kernel",
133	.size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
134	.offset = CONFIG_ETRAX_PTABLE_SECTOR
135	},
136	{
137	.name = "filesystem",
138	.size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
139	.offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
140	}
141	};
142
143	/* Initialize the ones normally used. */
144	static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
145	{
146	.name = "part0",
147	.size = CONFIG_ETRAX_PTABLE_SECTOR,
148	.offset = 0
149	},
150	{
151	.name = "part1",
152	.size = 0,
153	.offset = 0
154	},
155	{
156	.name = "part2",
157	.size = 0,
158	.offset = 0
159	},
160	{
161	.name = "part3",
162	.size = 0,
163	.offset = 0
164	},
165	{
166	.name = "part4",
167	.size = 0,
168	.offset = 0
169	},
170	{
171	.name = "part5",
172	.size = 0,
173	.offset = 0
174	},
175	{
176	.name = "part6",
177	.size = 0,
178	.offset = 0
179	},
180	};
181
182	/*
183	* Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
184	* chips in that order (because the amd_flash-driver is faster).
185	*/
186	static struct mtd_info probe_cs(struct map_info map_cs)
187	{
188	struct mtd_info *mtd_cs = NULL;
189
190	printk(KERN_INFO
191	"%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
192	map_cs->name, map_cs->size, map_cs->map_priv_1);
193
194	#ifdef CONFIG_MTD_AMDSTD
195	mtd_cs = do_map_probe("amd_flash", map_cs);
196	#endif
197	#ifdef CONFIG_MTD_CFI
198	if (!mtd_cs) {
199	mtd_cs = do_map_probe("cfi_probe", map_cs);
200	}
201	#endif
202
203	return mtd_cs;
204	}
205
206	/*
207	* Probe each chip select individually for flash chips. If there are chips on
208	* both cse0 and cse1, the mtd_info structs will be concatenated to one struct
209	* so that MTD partitions can cross chip boundries.
210	*
211	* The only known restriction to how you can mount your chips is that each
212	* chip select must hold similar flash chips. But you need external hardware
213	* to do that anyway and you can put totally different chips on cse0 and cse1
214	* so it isn't really much of a restriction.
215	*/
216	extern struct mtd_info* __init crisv32_nand_flash_probe (void);
217	static struct mtd_info *flash_probe(void)
218	{
219	struct mtd_info *mtd_cse0;
220	struct mtd_info *mtd_cse1;
221	struct mtd_info *mtd_nand = NULL;
222	struct mtd_info *mtd_total;
223	struct mtd_info *mtds[3];
224	int count = 0;
225
226	if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL)
227	mtds[count++] = mtd_cse0;
228	if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL)
229	mtds[count++] = mtd_cse1;
230
231	#ifdef CONFIG_ETRAX_NANDFLASH
232	if ((mtd_nand = crisv32_nand_flash_probe()) != NULL)
233	mtds[count++] = mtd_nand;
234	#endif
235
236	if (!mtd_cse0 && !mtd_cse1 && !mtd_nand) {
237	/* No chip found. */
238	return NULL;
239	}
240
241	if (count > 1) {
242	#ifdef CONFIG_MTD_CONCAT
243	/* Since the concatenation layer adds a small overhead we
244	* could try to figure out if the chips in cse0 and cse1 are
245	* identical and reprobe the whole cse0+cse1 window. But since
246	* flash chips are slow, the overhead is relatively small.
247	* So we use the MTD concatenation layer instead of further
248	* complicating the probing procedure.
249	*/
250	mtd_total = mtd_concat_create(mtds,
251	count,
252	"cse0+cse1+nand");
253	#else
254	printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel "
255	"(mis)configuration!\n", map_cse0.name, map_cse1.name);
256	mtd_toal = NULL;
257	#endif
258	if (!mtd_total) {
259	printk(KERN_ERR "%s and %s: Concatenation failed!\n",
260	map_cse0.name, map_cse1.name);
261
262	/* The best we can do now is to only use what we found
263	* at cse0.
264	*/
265	mtd_total = mtd_cse0;
266	map_destroy(mtd_cse1);
267	}
268	} else {
269	mtd_total = mtd_cse0? mtd_cse0 : mtd_cse1 ? mtd_cse1 : mtd_nand;
270
271	}
272
273	return mtd_total;
274	}
275
276	extern unsigned long crisv32_nand_boot;
277	extern unsigned long crisv32_nand_cramfs_offset;
278
279	/*
280	* Probe the flash chip(s) and, if it succeeds, read the partition-table
281	* and register the partitions with MTD.
282	*/
283	static int __init init_axis_flash(void)
284	{
285	struct mtd_info *mymtd;
286	int err = 0;
287	int pidx = 0;
288	struct partitiontable_head *ptable_head = NULL;
289	struct partitiontable_entry *ptable;
290	int use_default_ptable = 1; /* Until proven otherwise. */
291	const char *pmsg = KERN_INFO " /dev/flash%d at 0x%08x, size 0x%08x\n";
292	static char page[512];
293	size_t len;
294
295	#ifndef CONFIG_ETRAXFS_SIM
296	mymtd = flash_probe();
297	mymtd->read(mymtd, CONFIG_ETRAX_PTABLE_SECTOR, 512, &len, page);
298	ptable_head = (struct partitiontable_head *)(page + PARTITION_TABLE_OFFSET);
299
300	if (!mymtd) {
301	/* There's no reason to use this module if no flash chip can
302	* be identified. Make sure that's understood.
303	*/
304	printk(KERN_INFO "axisflashmap: Found no flash chip.\n");
305	} else {
306	printk(KERN_INFO "%s: 0x%08x bytes of flash memory.\n",
307	mymtd->name, mymtd->size);
308	axisflash_mtd = mymtd;
309	}
310
311	if (mymtd) {
312	mymtd->owner = THIS_MODULE;
313	}
314	pidx++; /* First partition is always set to the default. */
315
316	if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC)
317	&& (ptable_head->size <
318	(MAX_PARTITIONS * sizeof(struct partitiontable_entry) +
319	PARTITIONTABLE_END_MARKER_SIZE))
320	&& ((unsigned long)((void)ptable_head + sizeof(ptable_head) +
321	ptable_head->size -
322	PARTITIONTABLE_END_MARKER_SIZE)
323	== PARTITIONTABLE_END_MARKER)) {
324	/* Looks like a start, sane length and end of a
325	* partition table, lets check csum etc.
326	*/
327	int ptable_ok = 0;
328	struct partitiontable_entry *max_addr =
329	(struct partitiontable_entry *)
330	((unsigned long)ptable_head + sizeof(*ptable_head) +
331	ptable_head->size);
332	unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR;
333	unsigned char *p;
334	unsigned long csum = 0;
335
336	ptable = (struct partitiontable_entry *)
337	((unsigned long)ptable_head + sizeof(*ptable_head));
338
339	/* Lets be PARANOID, and check the checksum. */
340	p = (unsigned char*) ptable;
341
342	while (p <= (unsigned char*)max_addr) {
343	csum += *p++;
344	csum += *p++;
345	csum += *p++;
346	csum += *p++;
347	}
348	ptable_ok = (csum == ptable_head->checksum);
349
350	/* Read the entries and use/show the info. */
351	printk(KERN_INFO " Found a%s partition table at 0x%p-0x%p.\n",
352	(ptable_ok ? " valid" : "n invalid"), ptable_head,
353	max_addr);
354
355	/* We have found a working bootblock. Now read the
356	* partition table. Scan the table. It ends when
357	* there is 0xffffffff, that is, empty flash.
358	*/
359	while (ptable_ok
360	&& ptable->offset != 0xffffffff
361	&& ptable < max_addr
362	&& pidx < MAX_PARTITIONS) {
363
364	axis_partitions[pidx].offset = offset + ptable->offset + (crisv32_nand_boot ? 16384 : 0);
365	axis_partitions[pidx].size = ptable->size;
366
367	printk(pmsg, pidx, axis_partitions[pidx].offset,
368	axis_partitions[pidx].size);
369	pidx++;
370	ptable++;
371	}
372	use_default_ptable = !ptable_ok;
373	}
374
375	if (romfs_in_flash) {
376	/* Add an overlapping device for the root partition (romfs). */
377
378	axis_partitions[pidx].name = "romfs";
379	if (crisv32_nand_boot) {
380	char* data = kmalloc(1024, GFP_KERNEL);
381	int len;
382	int offset = crisv32_nand_cramfs_offset & ~(1024-1);
383	char* tmp;
384
385	mymtd->read(mymtd, offset, 1024, &len, data);
386	tmp = &data[crisv32_nand_cramfs_offset % 512];
387	axis_partitions[pidx].size = (unsigned)(tmp + 4);
388	axis_partitions[pidx].offset = crisv32_nand_cramfs_offset;
389	kfree(data);
390	} else {
391	axis_partitions[pidx].size = romfs_length;
392	axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
393	}
394
395	axis_partitions[pidx].mask_flags \|= MTD_WRITEABLE;
396
397	printk(KERN_INFO
398	" Adding readonly flash partition for romfs image:\n");
399	printk(pmsg, pidx, axis_partitions[pidx].offset,
400	axis_partitions[pidx].size);
401	pidx++;
402	}
403
404	if (mymtd) {
405	if (use_default_ptable) {
406	printk(KERN_INFO " Using default partition table.\n");
407	err = add_mtd_partitions(mymtd, axis_default_partitions,
408	NUM_DEFAULT_PARTITIONS);
409	} else {
410	err = add_mtd_partitions(mymtd, axis_partitions, pidx);
411	}
412
413	if (err) {
414	panic("axisflashmap could not add MTD partitions!\n");
415	}
416	}
417	/* CONFIG_EXTRAXFS_SIM */
418	#endif
419
420	if (!romfs_in_flash) {
421	/* Create an RAM device for the root partition (romfs). */
422
423	#if !defined(CONFIG_MTD_MTDRAM) \|\| (CONFIG_MTDRAM_TOTAL_SIZE != 0) \|\| (CONFIG_MTDRAM_ABS_POS != 0)
424	/* No use trying to boot this kernel from RAM. Panic! */
425	printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
426	"device due to kernel (mis)configuration!\n");
427	panic("This kernel cannot boot from RAM!\n");
428	#else
429	struct mtd_info *mtd_ram;
430
431	mtd_ram = (struct mtd_info *)kmalloc(sizeof(struct mtd_info),
432	GFP_KERNEL);
433	if (!mtd_ram) {
434	panic("axisflashmap couldn't allocate memory for "
435	"mtd_info!\n");
436	}
437
438	printk(KERN_INFO " Adding RAM partition for romfs image:\n");
439	printk(pmsg, pidx, romfs_start, romfs_length);
440
441	err = mtdram_init_device(mtd_ram, (void*)romfs_start,
442	romfs_length, "romfs");
443	if (err) {
444	panic("axisflashmap could not initialize MTD RAM "
445	"device!\n");
446	}
447	#endif
448	}
449
450	return err;
451	}
452
453	/* This adds the above to the kernels init-call chain. */
454	module_init(init_axis_flash);
455
456	EXPORT_SYMBOL(axisflash_mtd);