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Blackfin: update cm board resources
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf548 / boards / cm_bf548.c
CommitLineData
db68254f
MH		 1/*
2 * File: arch/blackfin/mach-bf548/boards/cm_bf548.c
3 * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
2de73e71 35#include <linux/mtd/physmap.h>
db68254f
MH		 36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#include <linux/irq.h>
39#include <linux/interrupt.h>
40#include <linux/usb/musb.h>
41#include <asm/bfin5xx_spi.h>
db68254f
MH		 42#include <asm/dma.h>
43#include <asm/gpio.h>
44#include <asm/nand.h>
45#include <asm/portmux.h>
8d8921a2 46#include <asm/bfin_sdh.h>
639f6571 47#include <mach/bf54x_keys.h>
14b03204 48#include <asm/dpmc.h>
db68254f
MH		 49#include <linux/input.h>
50#include <linux/spi/ad7877.h>
51
52/*
53 * Name the Board for the /proc/cpuinfo
54 */
55const char bfin_board_name[] = "Bluetechnix CM-BF548";
56
57/*
58 * Driver needs to know address, irq and flag pin.
59 */
60
61#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
62
639f6571 63#include <mach/bf54x-lq043.h>
db68254f
MH		 64
65static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
66 .width = 480,
67 .height = 272,
68 .xres = {480, 480, 480},
69 .yres = {272, 272, 272},
70 .bpp = {24, 24, 24},
71 .disp = GPIO_PE3,
72};
73
74static struct resource bf54x_lq043_resources[] = {
75 {
76 .start = IRQ_EPPI0_ERR,
77 .end = IRQ_EPPI0_ERR,
78 .flags = IORESOURCE_IRQ,
79 },
80};
81
82static struct platform_device bf54x_lq043_device = {
83 .name = "bf54x-lq043",
84 .id = -1,
85 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
86 .resource = bf54x_lq043_resources,
87 .dev = {
88 .platform_data = &bf54x_lq043_data,
89 },
90};
91#endif
92
93#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
94static unsigned int bf548_keymap[] = {
95 KEYVAL(0, 0, KEY_ENTER),
96 KEYVAL(0, 1, KEY_HELP),
97 KEYVAL(0, 2, KEY_0),
98 KEYVAL(0, 3, KEY_BACKSPACE),
99 KEYVAL(1, 0, KEY_TAB),
100 KEYVAL(1, 1, KEY_9),
101 KEYVAL(1, 2, KEY_8),
102 KEYVAL(1, 3, KEY_7),
103 KEYVAL(2, 0, KEY_DOWN),
104 KEYVAL(2, 1, KEY_6),
105 KEYVAL(2, 2, KEY_5),
106 KEYVAL(2, 3, KEY_4),
107 KEYVAL(3, 0, KEY_UP),
108 KEYVAL(3, 1, KEY_3),
109 KEYVAL(3, 2, KEY_2),
110 KEYVAL(3, 3, KEY_1),
111};
112
113static struct bfin_kpad_platform_data bf54x_kpad_data = {
114 .rows = 4,
115 .cols = 4,
116 .keymap = bf548_keymap,
117 .keymapsize = ARRAY_SIZE(bf548_keymap),
118 .repeat = 0,
119 .debounce_time = 5000, /* ns (5ms) */
120 .coldrive_time = 1000, /* ns (1ms) */
121 .keyup_test_interval = 50, /* ms (50ms) */
122};
123
124static struct resource bf54x_kpad_resources[] = {
125 {
126 .start = IRQ_KEY,
127 .end = IRQ_KEY,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static struct platform_device bf54x_kpad_device = {
133 .name = "bf54x-keys",
134 .id = -1,
135 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
136 .resource = bf54x_kpad_resources,
137 .dev = {
138 .platform_data = &bf54x_kpad_data,
139 },
140};
141#endif
142
143#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147};
148#endif
149
150#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
151static struct resource bfin_uart_resources[] = {
152#ifdef CONFIG_SERIAL_BFIN_UART0
153 {
154 .start = 0xFFC00400,
155 .end = 0xFFC004FF,
156 .flags = IORESOURCE_MEM,
157 },
158#endif
159#ifdef CONFIG_SERIAL_BFIN_UART1
160 {
161 .start = 0xFFC02000,
162 .end = 0xFFC020FF,
163 .flags = IORESOURCE_MEM,
164 },
165#endif
166#ifdef CONFIG_SERIAL_BFIN_UART2
167 {
168 .start = 0xFFC02100,
169 .end = 0xFFC021FF,
170 .flags = IORESOURCE_MEM,
171 },
172#endif
173#ifdef CONFIG_SERIAL_BFIN_UART3
174 {
175 .start = 0xFFC03100,
176 .end = 0xFFC031FF,
8606801b 177 .flags = IORESOURCE_MEM,
db68254f
MH		 178 },
179#endif
180};
181
182static struct platform_device bfin_uart_device = {
183 .name = "bfin-uart",
184 .id = 1,
185 .num_resources = ARRAY_SIZE(bfin_uart_resources),
186 .resource = bfin_uart_resources,
187};
188#endif
189
5be36d22 190#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 191#ifdef CONFIG_BFIN_SIR0
42bd8bcb 192static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 193 {
194 .start = 0xFFC00400,
195 .end = 0xFFC004FF,
196 .flags = IORESOURCE_MEM,
197 },
42bd8bcb
GY		 198 {
199 .start = IRQ_UART0_RX,
200 .end = IRQ_UART0_RX+1,
201 .flags = IORESOURCE_IRQ,
202 },
203 {
204 .start = CH_UART0_RX,
205 .end = CH_UART0_RX+1,
206 .flags = IORESOURCE_DMA,
207 },
208};
209static struct platform_device bfin_sir0_device = {
210 .name = "bfin_sir",
211 .id = 0,
212 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
213 .resource = bfin_sir0_resources,
214};
5be36d22
GY		 215#endif
216#ifdef CONFIG_BFIN_SIR1
42bd8bcb 217static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 218 {
219 .start = 0xFFC02000,
220 .end = 0xFFC020FF,
221 .flags = IORESOURCE_MEM,
222 },
42bd8bcb
GY		 223 {
224 .start = IRQ_UART1_RX,
225 .end = IRQ_UART1_RX+1,
226 .flags = IORESOURCE_IRQ,
227 },
228 {
229 .start = CH_UART1_RX,
230 .end = CH_UART1_RX+1,
231 .flags = IORESOURCE_DMA,
232 },
233};
234static struct platform_device bfin_sir1_device = {
235 .name = "bfin_sir",
236 .id = 1,
237 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
238 .resource = bfin_sir1_resources,
239};
5be36d22
GY		 240#endif
241#ifdef CONFIG_BFIN_SIR2
42bd8bcb 242static struct resource bfin_sir2_resources[] = {
5be36d22
GY		 243 {
244 .start = 0xFFC02100,
245 .end = 0xFFC021FF,
246 .flags = IORESOURCE_MEM,
247 },
42bd8bcb
GY		 248 {
249 .start = IRQ_UART2_RX,
250 .end = IRQ_UART2_RX+1,
251 .flags = IORESOURCE_IRQ,
252 },
253 {
254 .start = CH_UART2_RX,
255 .end = CH_UART2_RX+1,
256 .flags = IORESOURCE_DMA,
257 },
258};
259static struct platform_device bfin_sir2_device = {
260 .name = "bfin_sir",
261 .id = 2,
262 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
263 .resource = bfin_sir2_resources,
264};
5be36d22
GY		 265#endif
266#ifdef CONFIG_BFIN_SIR3
42bd8bcb 267static struct resource bfin_sir3_resources[] = {
5be36d22
GY		 268 {
269 .start = 0xFFC03100,
270 .end = 0xFFC031FF,
271 .flags = IORESOURCE_MEM,
272 },
42bd8bcb
GY		 273 {
274 .start = IRQ_UART3_RX,
275 .end = IRQ_UART3_RX+1,
276 .flags = IORESOURCE_IRQ,
277 },
278 {
279 .start = CH_UART3_RX,
280 .end = CH_UART3_RX+1,
281 .flags = IORESOURCE_DMA,
282 },
5be36d22 283};
42bd8bcb 284static struct platform_device bfin_sir3_device = {
5be36d22 285 .name = "bfin_sir",
42bd8bcb
GY		 286 .id = 3,
287 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
288 .resource = bfin_sir3_resources,
5be36d22
GY		 289};
290#endif
42bd8bcb 291#endif
5be36d22 292
db68254f 293#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
9c21453e
HK		 294#include <linux/smsc911x.h>
295
db68254f
MH		 296static struct resource smsc911x_resources[] = {
297 {
298 .name = "smsc911x-memory",
299 .start = 0x24000000,
300 .end = 0x24000000 + 0xFF,
301 .flags = IORESOURCE_MEM,
302 },
303 {
304 .start = IRQ_PE6,
305 .end = IRQ_PE6,
306 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
307 },
308};
9c21453e
HK		 309
310static struct smsc911x_platform_config smsc911x_config = {
311 .flags = SMSC911X_USE_16BIT,
312 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
313 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
314 .phy_interface = PHY_INTERFACE_MODE_MII,
315};
316
db68254f
MH		 317static struct platform_device smsc911x_device = {
318 .name = "smsc911x",
319 .id = 0,
320 .num_resources = ARRAY_SIZE(smsc911x_resources),
321 .resource = smsc911x_resources,
9c21453e
HK		 322 .dev = {
323 .platform_data = &smsc911x_config,
324 },
db68254f
MH		 325};
326#endif
327
328#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
329static struct resource musb_resources[] = {
330 [0] = {
331 .start = 0xFFC03C00,
332 .end = 0xFFC040FF,
333 .flags = IORESOURCE_MEM,
334 },
335 [1] = { /* general IRQ */
336 .start = IRQ_USB_INT0,
337 .end = IRQ_USB_INT0,
338 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
339 },
340 [2] = { /* DMA IRQ */
341 .start = IRQ_USB_DMA,
342 .end = IRQ_USB_DMA,
343 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
344 },
345};
346
50041acb
BW		 347static struct musb_hdrc_config musb_config = {
348 .multipoint = 0,
349 .dyn_fifo = 0,
350 .soft_con = 1,
351 .dma = 1,
fea05dac
BW		 352 .num_eps = 8,
353 .dma_channels = 8,
50041acb
BW		 354 .gpio_vrsel = GPIO_PH6,
355};
356
db68254f
MH		 357static struct musb_hdrc_platform_data musb_plat = {
358#if defined(CONFIG_USB_MUSB_OTG)
359 .mode = MUSB_OTG,
360#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
361 .mode = MUSB_HOST,
362#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
363 .mode = MUSB_PERIPHERAL,
364#endif
50041acb 365 .config = &musb_config,
db68254f
MH		 366};
367
368static u64 musb_dmamask = ~(u32)0;
369
370static struct platform_device musb_device = {
371 .name = "musb_hdrc",
372 .id = 0,
373 .dev = {
374 .dma_mask = &musb_dmamask,
375 .coherent_dma_mask = 0xffffffff,
376 .platform_data = &musb_plat,
377 },
378 .num_resources = ARRAY_SIZE(musb_resources),
379 .resource = musb_resources,
380};
381#endif
382
c97618d3
MF		 383static struct resource bfin_gpios_resources = {
384 .start = 0,
385 .end = MAX_BLACKFIN_GPIOS - 1,
386 .flags = IORESOURCE_IRQ,
387};
388
389static struct platform_device bfin_gpios_device = {
390 .name = "simple-gpio",
391 .id = -1,
392 .num_resources = 1,
393 .resource = &bfin_gpios_resources,
394};
395
db68254f
MH		 396#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
397static struct resource bfin_atapi_resources[] = {
398 {
399 .start = 0xFFC03800,
400 .end = 0xFFC0386F,
401 .flags = IORESOURCE_MEM,
402 },
403 {
404 .start = IRQ_ATAPI_ERR,
405 .end = IRQ_ATAPI_ERR,
406 .flags = IORESOURCE_IRQ,
407 },
408};
409
410static struct platform_device bfin_atapi_device = {
411 .name = "pata-bf54x",
412 .id = -1,
413 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
414 .resource = bfin_atapi_resources,
415};
416#endif
417
418#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
419static struct mtd_partition partition_info[] = {
420 {
aa582977 421 .name = "linux kernel(nand)",
db68254f 422 .offset = 0,
f4585a08 423 .size = 4 * 1024 * 1024,
db68254f
MH		 424 },
425 {
aa582977 426 .name = "file system(nand)",
f4585a08
MF		 427 .offset = 4 * 1024 * 1024,
428 .size = (256 - 4) * 1024 * 1024,
db68254f
MH		 429 },
430};
431
432static struct bf5xx_nand_platform bf5xx_nand_platform = {
433 .page_size = NFC_PG_SIZE_256,
434 .data_width = NFC_NWIDTH_8,
435 .partitions = partition_info,
436 .nr_partitions = ARRAY_SIZE(partition_info),
437 .rd_dly = 3,
438 .wr_dly = 3,
439};
440
441static struct resource bf5xx_nand_resources[] = {
442 {
443 .start = 0xFFC03B00,
444 .end = 0xFFC03B4F,
445 .flags = IORESOURCE_MEM,
446 },
447 {
448 .start = CH_NFC,
449 .end = CH_NFC,
450 .flags = IORESOURCE_IRQ,
451 },
452};
453
454static struct platform_device bf5xx_nand_device = {
455 .name = "bf5xx-nand",
456 .id = 0,
457 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
458 .resource = bf5xx_nand_resources,
459 .dev = {
460 .platform_data = &bf5xx_nand_platform,
461 },
462};
463#endif
464
465#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
8d8921a2
MF		 466static struct bfin_sd_host bfin_sdh_data = {
467 .dma_chan = CH_SDH,
468 .irq_int0 = IRQ_SDH_MASK0,
469 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
470};
471
db68254f
MH		 472static struct platform_device bf54x_sdh_device = {
473 .name = "bfin-sdh",
474 .id = 0,
8d8921a2
MF		 475 .dev = {
476 .platform_data = &bfin_sdh_data,
477 },
db68254f
MH		 478};
479#endif
480
2de73e71
MF		 481#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
482static struct mtd_partition para_partitions[] = {
483 {
484 .name = "bootloader(nor)",
485 .size = 0x40000,
486 .offset = 0,
487 }, {
488 .name = "linux kernel(nor)",
9c21453e 489 .size = 0x100000,
2de73e71
MF		 490 .offset = MTDPART_OFS_APPEND,
491 }, {
492 .name = "file system(nor)",
493 .size = MTDPART_SIZ_FULL,
494 .offset = MTDPART_OFS_APPEND,
495 }
496};
497
498static struct physmap_flash_data para_flash_data = {
499 .width = 2,
500 .parts = para_partitions,
501 .nr_parts = ARRAY_SIZE(para_partitions),
502};
503
504static struct resource para_flash_resource = {
505 .start = 0x20000000,
506 .end = 0x207fffff,
507 .flags = IORESOURCE_MEM,
508};
509
510static struct platform_device para_flash_device = {
511 .name = "physmap-flash",
512 .id = 0,
513 .dev = {
514 .platform_data = &para_flash_data,
515 },
516 .num_resources = 1,
517 .resource = &para_flash_resource,
518};
519#endif
520
db68254f
MH		 521#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
522/* all SPI peripherals info goes here */
523#if defined(CONFIG_MTD_M25P80) \
524 || defined(CONFIG_MTD_M25P80_MODULE)
525/* SPI flash chip (m25p16) */
526static struct mtd_partition bfin_spi_flash_partitions[] = {
527 {
aa582977 528 .name = "bootloader(spi)",
db68254f
MH		 529 .size = 0x00040000,
530 .offset = 0,
531 .mask_flags = MTD_CAP_ROM
532 }, {
aa582977 533 .name = "linux kernel(spi)",
db68254f
MH		 534 .size = 0x1c0000,
535 .offset = 0x40000
536 }
537};
538
539static struct flash_platform_data bfin_spi_flash_data = {
540 .name = "m25p80",
541 .parts = bfin_spi_flash_partitions,
542 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
543 .type = "m25p16",
544};
545
546static struct bfin5xx_spi_chip spi_flash_chip_info = {
547 .enable_dma = 0, /* use dma transfer with this chip*/
548 .bits_per_word = 8,
549 .cs_change_per_word = 0,
550};
551#endif
552
553#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
554static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
555 .cs_change_per_word = 0,
556 .enable_dma = 0,
557 .bits_per_word = 16,
558};
559
560static const struct ad7877_platform_data bfin_ad7877_ts_info = {
561 .model = 7877,
562 .vref_delay_usecs = 50, /* internal, no capacitor */
563 .x_plate_ohms = 419,
564 .y_plate_ohms = 486,
565 .pressure_max = 1000,
566 .pressure_min = 0,
567 .stopacq_polarity = 1,
568 .first_conversion_delay = 3,
569 .acquisition_time = 1,
570 .averaging = 1,
571 .pen_down_acc_interval = 1,
572};
573#endif
574
575#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
576static struct bfin5xx_spi_chip spidev_chip_info = {
577 .enable_dma = 0,
578 .bits_per_word = 8,
579};
580#endif
581
582static struct spi_board_info bf54x_spi_board_info[] __initdata = {
583#if defined(CONFIG_MTD_M25P80) \
584 || defined(CONFIG_MTD_M25P80_MODULE)
585 {
586 /* the modalias must be the same as spi device driver name */
587 .modalias = "m25p80", /* Name of spi_driver for this device */
588 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
589 .bus_num = 0, /* Framework bus number */
590 .chip_select = 1, /* SPI_SSEL1*/
591 .platform_data = &bfin_spi_flash_data,
592 .controller_data = &spi_flash_chip_info,
593 .mode = SPI_MODE_3,
594 },
595#endif
596#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
597{
598 .modalias = "ad7877",
599 .platform_data = &bfin_ad7877_ts_info,
600 .irq = IRQ_PJ11,
601 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
602 .bus_num = 0,
603 .chip_select = 2,
604 .controller_data = &spi_ad7877_chip_info,
605},
606#endif
607#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
608 {
609 .modalias = "spidev",
610 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
611 .bus_num = 0,
612 .chip_select = 1,
613 .controller_data = &spidev_chip_info,
614 },
615#endif
616};
617
618/* SPI (0) */
619static struct resource bfin_spi0_resource[] = {
620 [0] = {
621 .start = SPI0_REGBASE,
622 .end = SPI0_REGBASE + 0xFF,
623 .flags = IORESOURCE_MEM,
624 },
625 [1] = {
626 .start = CH_SPI0,
627 .end = CH_SPI0,
53122693
YL		 628 .flags = IORESOURCE_DMA,
629 },
630 [2] = {
631 .start = IRQ_SPI0,
632 .end = IRQ_SPI0,
db68254f
MH		 633 .flags = IORESOURCE_IRQ,
634 }
635};
636
637/* SPI (1) */
638static struct resource bfin_spi1_resource[] = {
639 [0] = {
640 .start = SPI1_REGBASE,
641 .end = SPI1_REGBASE + 0xFF,
642 .flags = IORESOURCE_MEM,
643 },
644 [1] = {
645 .start = CH_SPI1,
646 .end = CH_SPI1,
53122693
YL		 647 .flags = IORESOURCE_DMA,
648 },
649 [2] = {
650 .start = IRQ_SPI1,
651 .end = IRQ_SPI1,
db68254f
MH		 652 .flags = IORESOURCE_IRQ,
653 }
654};
655
656/* SPI controller data */
657static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
4e4d496e 658 .num_chipselect = 3,
db68254f
MH		 659 .enable_dma = 1, /* master has the ability to do dma transfer */
660 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
661};
662
663static struct platform_device bf54x_spi_master0 = {
664 .name = "bfin-spi",
665 .id = 0, /* Bus number */
666 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
667 .resource = bfin_spi0_resource,
668 .dev = {
669 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
670 },
671};
672
673static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
4e4d496e 674 .num_chipselect = 3,
db68254f
MH		 675 .enable_dma = 1, /* master has the ability to do dma transfer */
676 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
677};
678
679static struct platform_device bf54x_spi_master1 = {
680 .name = "bfin-spi",
681 .id = 1, /* Bus number */
682 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
683 .resource = bfin_spi1_resource,
684 .dev = {
685 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
686 },
687};
688#endif /* spi master and devices */
689
690#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
691static struct resource bfin_twi0_resource[] = {
692 [0] = {
693 .start = TWI0_REGBASE,
694 .end = TWI0_REGBASE + 0xFF,
695 .flags = IORESOURCE_MEM,
696 },
697 [1] = {
698 .start = IRQ_TWI0,
699 .end = IRQ_TWI0,
700 .flags = IORESOURCE_IRQ,
701 },
702};
703
704static struct platform_device i2c_bfin_twi0_device = {
705 .name = "i2c-bfin-twi",
706 .id = 0,
707 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
708 .resource = bfin_twi0_resource,
709};
710
711#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
712static struct resource bfin_twi1_resource[] = {
713 [0] = {
714 .start = TWI1_REGBASE,
715 .end = TWI1_REGBASE + 0xFF,
716 .flags = IORESOURCE_MEM,
717 },
718 [1] = {
719 .start = IRQ_TWI1,
720 .end = IRQ_TWI1,
721 .flags = IORESOURCE_IRQ,
722 },
723};
724
725static struct platform_device i2c_bfin_twi1_device = {
726 .name = "i2c-bfin-twi",
727 .id = 1,
728 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
729 .resource = bfin_twi1_resource,
730};
731#endif
732#endif
733
734#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
735#include <linux/gpio_keys.h>
736
737static struct gpio_keys_button bfin_gpio_keys_table[] = {
738 {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
739};
740
741static struct gpio_keys_platform_data bfin_gpio_keys_data = {
742 .buttons = bfin_gpio_keys_table,
743 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
744};
745
746static struct platform_device bfin_device_gpiokeys = {
747 .name = "gpio-keys",
748 .dev = {
749 .platform_data = &bfin_gpio_keys_data,
750 },
751};
752#endif
753
14b03204
MH		 754static const unsigned int cclk_vlev_datasheet[] =
755{
756/*
757 * Internal VLEV BF54XSBBC1533
758 ****temporarily using these values until data sheet is updated
759 */
760 VRPAIR(VLEV_085, 150000000),
761 VRPAIR(VLEV_090, 250000000),
762 VRPAIR(VLEV_110, 276000000),
763 VRPAIR(VLEV_115, 301000000),
764 VRPAIR(VLEV_120, 525000000),
765 VRPAIR(VLEV_125, 550000000),
766 VRPAIR(VLEV_130, 600000000),
767};
768
769static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
770 .tuple_tab = cclk_vlev_datasheet,
771 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
772 .vr_settling_time = 25 /* us */,
773};
774
775static struct platform_device bfin_dpmc = {
776 .name = "bfin dpmc",
777 .dev = {
778 .platform_data = &bfin_dmpc_vreg_data,
779 },
780};
781
db68254f 782static struct platform_device *cm_bf548_devices[] __initdata = {
14b03204
MH		 783
784 &bfin_dpmc,
785
db68254f
MH		 786#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
787 &rtc_device,
788#endif
789
790#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
791 &bfin_uart_device,
792#endif
793
5be36d22 794#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 795#ifdef CONFIG_BFIN_SIR0
796 &bfin_sir0_device,
797#endif
798#ifdef CONFIG_BFIN_SIR1
799 &bfin_sir1_device,
800#endif
801#ifdef CONFIG_BFIN_SIR2
802 &bfin_sir2_device,
803#endif
804#ifdef CONFIG_BFIN_SIR3
805 &bfin_sir3_device,
806#endif
5be36d22
GY		 807#endif
808
db68254f
MH		 809#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
810 &bf54x_lq043_device,
811#endif
812
813#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
814 &smsc911x_device,
815#endif
816
817#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
818 &musb_device,
819#endif
820
821#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
822 &bfin_atapi_device,
823#endif
824
825#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
826 &bf5xx_nand_device,
827#endif
828
829#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
830 &bf54x_sdh_device,
831#endif
832
833#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
834 &bf54x_spi_master0,
835 &bf54x_spi_master1,
836#endif
837
838#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
839 &bf54x_kpad_device,
840#endif
841
842#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
10a88a2b 843 &i2c_bfin_twi0_device,
db68254f
MH		 844#if !defined(CONFIG_BF542)
845 &i2c_bfin_twi1_device,
846#endif
847#endif
848
849#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
850 &bfin_device_gpiokeys,
851#endif
2de73e71
MF		 852
853#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
854 &para_flash_device,
855#endif
c97618d3
MF		 856
857 &bfin_gpios_device,
db68254f
MH		 858};
859
860static int __init cm_bf548_init(void)
861{
f086f234 862 printk(KERN_INFO "%s(): registering device resources\n", __func__);
db68254f
MH		 863 platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
864
865#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
866 spi_register_board_info(bf54x_spi_board_info,
867 ARRAY_SIZE(bf54x_spi_board_info));
868#endif
869
870 return 0;
871}
872
873arch_initcall(cm_bf548_init);
kernel source for telekom puls (alcatel/mediatek)