Blackfin arch: fixup warnings with the new cplb saved values
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
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1/*
2 * File: arch/blackfin/mach-bf537/boards/stamp.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
de8c43f2 35#include <linux/mtd/physmap.h>
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36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 39#include <linux/usb/isp1362.h>
1394f032 40#endif
0a87e3e9 41#include <linux/ata_platform.h>
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42#include <linux/irq.h>
43#include <linux/interrupt.h>
81d9c7f2 44#include <linux/i2c.h>
27f5d75a 45#include <linux/usb/sl811.h>
c6c4d7bb 46#include <asm/dma.h>
1f83b8f1 47#include <asm/bfin5xx_spi.h>
c6c4d7bb 48#include <asm/reboot.h>
5d448dd5 49#include <asm/portmux.h>
14b03204 50#include <asm/dpmc.h>
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51#include <linux/spi/ad7877.h>
52
53/*
54 * Name the Board for the /proc/cpuinfo
55 */
066954a3 56const char bfin_board_name[] = "ADDS-BF537-STAMP";
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57
58/*
59 * Driver needs to know address, irq and flag pin.
60 */
61
62#define ISP1761_BASE 0x203C0000
63#define ISP1761_IRQ IRQ_PF7
64
65#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
66static struct resource bfin_isp1761_resources[] = {
67 [0] = {
68 .name = "isp1761-regs",
69 .start = ISP1761_BASE + 0x00000000,
70 .end = ISP1761_BASE + 0x000fffff,
71 .flags = IORESOURCE_MEM,
72 },
73 [1] = {
74 .start = ISP1761_IRQ,
75 .end = ISP1761_IRQ,
76 .flags = IORESOURCE_IRQ,
77 },
78};
79
80static struct platform_device bfin_isp1761_device = {
81 .name = "isp1761",
82 .id = 0,
83 .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
84 .resource = bfin_isp1761_resources,
85};
86
87static struct platform_device *bfin_isp1761_devices[] = {
88 &bfin_isp1761_device,
89};
90
91int __init bfin_isp1761_init(void)
92{
1f83b8f1 93 unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
1394f032 94
b85d858b 95 printk(KERN_INFO "%s(): registering device resources\n", __func__);
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96 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
97
98 return platform_add_devices(bfin_isp1761_devices, num_devices);
99}
100
101void __exit bfin_isp1761_exit(void)
102{
103 platform_device_unregister(&bfin_isp1761_device);
104}
105
106arch_initcall(bfin_isp1761_init);
107#endif
108
2463ef22
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109#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
110#include <linux/input.h>
111#include <linux/gpio_keys.h>
112
113static struct gpio_keys_button bfin_gpio_keys_table[] = {
114 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
115 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
116 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
117 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
118};
119
120static struct gpio_keys_platform_data bfin_gpio_keys_data = {
121 .buttons = bfin_gpio_keys_table,
122 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
123};
124
125static struct platform_device bfin_device_gpiokeys = {
126 .name = "gpio-keys",
127 .dev = {
128 .platform_data = &bfin_gpio_keys_data,
129 },
130};
131#endif
132
cad2ab65
MF
133static struct resource bfin_gpios_resources = {
134 .start = 0,
135 .end = MAX_BLACKFIN_GPIOS - 1,
136 .flags = IORESOURCE_IRQ,
137};
138
139static struct platform_device bfin_gpios_device = {
140 .name = "simple-gpio",
141 .id = -1,
142 .num_resources = 1,
143 .resource = &bfin_gpios_resources,
144};
145
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146#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
147static struct resource bfin_pcmcia_cf_resources[] = {
148 {
149 .start = 0x20310000, /* IO PORT */
150 .end = 0x20312000,
151 .flags = IORESOURCE_MEM,
1f83b8f1 152 }, {
d2d50aa9 153 .start = 0x20311000, /* Attribute Memory */
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154 .end = 0x20311FFF,
155 .flags = IORESOURCE_MEM,
1f83b8f1 156 }, {
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157 .start = IRQ_PF4,
158 .end = IRQ_PF4,
159 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 160 }, {
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161 .start = 6, /* Card Detect PF6 */
162 .end = 6,
163 .flags = IORESOURCE_IRQ,
164 },
165};
166
167static struct platform_device bfin_pcmcia_cf_device = {
168 .name = "bfin_cf_pcmcia",
169 .id = -1,
170 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
171 .resource = bfin_pcmcia_cf_resources,
172};
173#endif
174
175#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
176static struct platform_device rtc_device = {
177 .name = "rtc-bfin",
178 .id = -1,
179};
180#endif
181
182#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
183static struct resource smc91x_resources[] = {
184 {
185 .name = "smc91x-regs",
186 .start = 0x20300300,
187 .end = 0x20300300 + 16,
188 .flags = IORESOURCE_MEM,
1f83b8f1 189 }, {
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190
191 .start = IRQ_PF7,
192 .end = IRQ_PF7,
193 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
194 },
195};
196static struct platform_device smc91x_device = {
197 .name = "smc91x",
198 .id = 0,
199 .num_resources = ARRAY_SIZE(smc91x_resources),
200 .resource = smc91x_resources,
201};
202#endif
203
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204#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
205static struct resource dm9000_resources[] = {
206 [0] = {
207 .start = 0x203FB800,
208 .end = 0x203FB800 + 8,
209 .flags = IORESOURCE_MEM,
210 },
211 [1] = {
212 .start = IRQ_PF9,
213 .end = IRQ_PF9,
214 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
215 },
216};
217
218static struct platform_device dm9000_device = {
219 .name = "dm9000",
220 .id = -1,
221 .num_resources = ARRAY_SIZE(dm9000_resources),
222 .resource = dm9000_resources,
223};
224#endif
225
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226#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
227static struct resource ax88180_resources[] = {
228 [0] = {
229 .start = 0x20300000,
230 .end = 0x20300000 + 0x8000,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = IRQ_PF7,
235 .end = IRQ_PF7,
236 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
237 },
238};
239
240static struct platform_device ax88180_device = {
241 .name = "ax88180",
242 .id = -1,
243 .num_resources = ARRAY_SIZE(ax88180_resources),
244 .resource = ax88180_resources,
245};
246#endif
247
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248#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
249static struct resource sl811_hcd_resources[] = {
250 {
251 .start = 0x20340000,
252 .end = 0x20340000,
253 .flags = IORESOURCE_MEM,
1f83b8f1 254 }, {
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255 .start = 0x20340004,
256 .end = 0x20340004,
257 .flags = IORESOURCE_MEM,
1f83b8f1 258 }, {
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259 .start = CONFIG_USB_SL811_BFIN_IRQ,
260 .end = CONFIG_USB_SL811_BFIN_IRQ,
261 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
262 },
263};
264
265#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
266void sl811_port_power(struct device *dev, int is_on)
267{
c6c4d7bb 268 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 269 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
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270}
271#endif
272
273static struct sl811_platform_data sl811_priv = {
274 .potpg = 10,
275 .power = 250, /* == 500mA */
276#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
277 .port_power = &sl811_port_power,
278#endif
279};
280
281static struct platform_device sl811_hcd_device = {
282 .name = "sl811-hcd",
283 .id = 0,
284 .dev = {
285 .platform_data = &sl811_priv,
286 },
287 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
288 .resource = sl811_hcd_resources,
289};
290#endif
291
292#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
293static struct resource isp1362_hcd_resources[] = {
294 {
295 .start = 0x20360000,
296 .end = 0x20360000,
297 .flags = IORESOURCE_MEM,
1f83b8f1 298 }, {
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299 .start = 0x20360004,
300 .end = 0x20360004,
301 .flags = IORESOURCE_MEM,
1f83b8f1 302 }, {
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303 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
304 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
305 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
306 },
307};
308
309static struct isp1362_platform_data isp1362_priv = {
310 .sel15Kres = 1,
311 .clknotstop = 0,
312 .oc_enable = 0,
313 .int_act_high = 0,
314 .int_edge_triggered = 0,
315 .remote_wakeup_connected = 0,
316 .no_power_switching = 1,
317 .power_switching_mode = 0,
318};
319
320static struct platform_device isp1362_hcd_device = {
321 .name = "isp1362-hcd",
322 .id = 0,
323 .dev = {
324 .platform_data = &isp1362_priv,
325 },
326 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
327 .resource = isp1362_hcd_resources,
328};
329#endif
330
331#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
332static struct platform_device bfin_mac_device = {
333 .name = "bfin_mac",
334};
335#endif
336
337#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
338static struct resource net2272_bfin_resources[] = {
339 {
340 .start = 0x20300000,
341 .end = 0x20300000 + 0x100,
342 .flags = IORESOURCE_MEM,
1f83b8f1 343 }, {
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344 .start = IRQ_PF7,
345 .end = IRQ_PF7,
346 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
347 },
348};
349
350static struct platform_device net2272_bfin_device = {
351 .name = "net2272",
352 .id = -1,
353 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
354 .resource = net2272_bfin_resources,
355};
356#endif
357
793dc27b 358#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
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359static struct mtd_partition stamp_partitions[] = {
360 {
361 .name = "Bootloader",
edf05641 362 .size = 0x40000,
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MF
363 .offset = 0,
364 }, {
365 .name = "Kernel",
366 .size = 0xE0000,
367 .offset = MTDPART_OFS_APPEND,
368 }, {
369 .name = "RootFS",
edf05641 370 .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000,
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MF
371 .offset = MTDPART_OFS_APPEND,
372 }, {
373 .name = "MAC Address",
374 .size = MTDPART_SIZ_FULL,
375 .offset = 0x3F0000,
376 .mask_flags = MTD_WRITEABLE,
377 }
378};
379
380static struct physmap_flash_data stamp_flash_data = {
381 .width = 2,
382 .parts = stamp_partitions,
383 .nr_parts = ARRAY_SIZE(stamp_partitions),
384};
385
386static struct resource stamp_flash_resource = {
387 .start = 0x20000000,
388 .end = 0x203fffff,
389 .flags = IORESOURCE_MEM,
390};
391
392static struct platform_device stamp_flash_device = {
393 .name = "physmap-flash",
394 .id = 0,
395 .dev = {
396 .platform_data = &stamp_flash_data,
397 },
398 .num_resources = 1,
399 .resource = &stamp_flash_resource,
400};
793dc27b 401#endif
de8c43f2 402
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403#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
404/* all SPI peripherals info goes here */
405
406#if defined(CONFIG_MTD_M25P80) \
407 || defined(CONFIG_MTD_M25P80_MODULE)
408static struct mtd_partition bfin_spi_flash_partitions[] = {
409 {
410 .name = "bootloader",
edf05641 411 .size = 0x00040000,
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412 .offset = 0,
413 .mask_flags = MTD_CAP_ROM
1f83b8f1 414 }, {
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415 .name = "kernel",
416 .size = 0xe0000,
edf05641 417 .offset = MTDPART_OFS_APPEND,
1f83b8f1 418 }, {
1394f032 419 .name = "file system",
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420 .size = MTDPART_SIZ_FULL,
421 .offset = MTDPART_OFS_APPEND,
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422 }
423};
424
425static struct flash_platform_data bfin_spi_flash_data = {
426 .name = "m25p80",
427 .parts = bfin_spi_flash_partitions,
428 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
429 .type = "m25p64",
430};
431
432/* SPI flash chip (m25p64) */
433static struct bfin5xx_spi_chip spi_flash_chip_info = {
434 .enable_dma = 0, /* use dma transfer with this chip*/
435 .bits_per_word = 8,
436};
437#endif
438
439#if defined(CONFIG_SPI_ADC_BF533) \
440 || defined(CONFIG_SPI_ADC_BF533_MODULE)
441/* SPI ADC chip */
442static struct bfin5xx_spi_chip spi_adc_chip_info = {
443 .enable_dma = 1, /* use dma transfer with this chip*/
444 .bits_per_word = 16,
445};
446#endif
447
448#if defined(CONFIG_SND_BLACKFIN_AD1836) \
449 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
450static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
451 .enable_dma = 0,
452 .bits_per_word = 16,
453};
454#endif
455
456#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
457static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
458 .enable_dma = 0,
459 .bits_per_word = 16,
460};
461#endif
462
463#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
464static struct bfin5xx_spi_chip spi_mmc_chip_info = {
465 .enable_dma = 1,
466 .bits_per_word = 8,
467};
468#endif
469
470#if defined(CONFIG_PBX)
471static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
472 .ctl_reg = 0x4, /* send zero */
473 .enable_dma = 0,
474 .bits_per_word = 8,
475 .cs_change_per_word = 1,
476};
477#endif
478
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479#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
480static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
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481 .enable_dma = 0,
482 .bits_per_word = 16,
483};
484
485static const struct ad7877_platform_data bfin_ad7877_ts_info = {
486 .model = 7877,
487 .vref_delay_usecs = 50, /* internal, no capacitor */
488 .x_plate_ohms = 419,
489 .y_plate_ohms = 486,
490 .pressure_max = 1000,
491 .pressure_min = 0,
492 .stopacq_polarity = 1,
493 .first_conversion_delay = 3,
494 .acquisition_time = 1,
495 .averaging = 1,
496 .pen_down_acc_interval = 1,
497};
498#endif
499
6e668936
MH
500#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
501static struct bfin5xx_spi_chip spidev_chip_info = {
502 .enable_dma = 0,
503 .bits_per_word = 8,
504};
505#endif
506
8e9d5c7d
MH
507#if defined(CONFIG_MTD_DATAFLASH) \
508 || defined(CONFIG_MTD_DATAFLASH_MODULE)
509/* DataFlash chip */
510static struct bfin5xx_spi_chip data_flash_chip_info = {
511 .enable_dma = 0, /* use dma transfer with this chip*/
512 .bits_per_word = 8,
513};
514#endif
515
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516static struct spi_board_info bfin_spi_board_info[] __initdata = {
517#if defined(CONFIG_MTD_M25P80) \
518 || defined(CONFIG_MTD_M25P80_MODULE)
519 {
520 /* the modalias must be the same as spi device driver name */
521 .modalias = "m25p80", /* Name of spi_driver for this device */
522 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 523 .bus_num = 0, /* Framework bus number */
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524 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
525 .platform_data = &bfin_spi_flash_data,
526 .controller_data = &spi_flash_chip_info,
527 .mode = SPI_MODE_3,
528 },
529#endif
8e9d5c7d
MH
530#if defined(CONFIG_MTD_DATAFLASH) \
531 || defined(CONFIG_MTD_DATAFLASH_MODULE)
532 { /* DataFlash chip */
533 .modalias = "mtd_dataflash",
534 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
535 .bus_num = 0, /* Framework bus number */
536 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
537 .controller_data = &data_flash_chip_info,
538 .mode = SPI_MODE_3,
539 },
540#endif
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541#if defined(CONFIG_SPI_ADC_BF533) \
542 || defined(CONFIG_SPI_ADC_BF533_MODULE)
543 {
544 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
545 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 546 .bus_num = 0, /* Framework bus number */
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547 .chip_select = 1, /* Framework chip select. */
548 .platform_data = NULL, /* No spi_driver specific config */
549 .controller_data = &spi_adc_chip_info,
550 },
551#endif
552
553#if defined(CONFIG_SND_BLACKFIN_AD1836) \
554 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
555 {
556 .modalias = "ad1836-spi",
557 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 558 .bus_num = 0,
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559 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
560 .controller_data = &ad1836_spi_chip_info,
561 },
562#endif
563#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
564 {
565 .modalias = "ad9960-spi",
566 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 567 .bus_num = 0,
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568 .chip_select = 1,
569 .controller_data = &ad9960_spi_chip_info,
570 },
571#endif
572#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
573 {
574 .modalias = "spi_mmc_dummy",
111cf97d 575 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 576 .bus_num = 0,
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577 .chip_select = 0,
578 .platform_data = NULL,
579 .controller_data = &spi_mmc_chip_info,
580 .mode = SPI_MODE_3,
581 },
582 {
583 .modalias = "spi_mmc",
111cf97d 584 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 585 .bus_num = 0,
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586 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
587 .platform_data = NULL,
588 .controller_data = &spi_mmc_chip_info,
589 .mode = SPI_MODE_3,
590 },
591#endif
592#if defined(CONFIG_PBX)
593 {
1f83b8f1
MF
594 .modalias = "fxs-spi",
595 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb
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596 .bus_num = 0,
597 .chip_select = 8 - CONFIG_J11_JUMPER,
1f83b8f1 598 .controller_data = &spi_si3xxx_chip_info,
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599 .mode = SPI_MODE_3,
600 },
601 {
1f83b8f1
MF
602 .modalias = "fxo-spi",
603 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb
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604 .bus_num = 0,
605 .chip_select = 8 - CONFIG_J19_JUMPER,
1f83b8f1 606 .controller_data = &spi_si3xxx_chip_info,
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607 .mode = SPI_MODE_3,
608 },
609#endif
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610#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
611 {
612 .modalias = "ad7877",
613 .platform_data = &bfin_ad7877_ts_info,
614 .irq = IRQ_PF6,
615 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 616 .bus_num = 0,
1394f032
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617 .chip_select = 1,
618 .controller_data = &spi_ad7877_chip_info,
619 },
620#endif
6e668936
MH
621#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
622 {
623 .modalias = "spidev",
624 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
625 .bus_num = 0,
626 .chip_select = 1,
627 .controller_data = &spidev_chip_info,
628 },
629#endif
1394f032
BW
630};
631
632/* SPI controller data */
c6c4d7bb 633static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW
634 .num_chipselect = 8,
635 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 636 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW
637};
638
c6c4d7bb
BW
639/* SPI (0) */
640static struct resource bfin_spi0_resource[] = {
641 [0] = {
642 .start = SPI0_REGBASE,
643 .end = SPI0_REGBASE + 0xFF,
644 .flags = IORESOURCE_MEM,
645 },
646 [1] = {
647 .start = CH_SPI,
648 .end = CH_SPI,
649 .flags = IORESOURCE_IRQ,
650 },
651};
652
653static struct platform_device bfin_spi0_device = {
654 .name = "bfin-spi",
655 .id = 0, /* Bus number */
656 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
657 .resource = bfin_spi0_resource,
1394f032 658 .dev = {
c6c4d7bb 659 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW
660 },
661};
662#endif /* spi master and devices */
663
664#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
665static struct platform_device bfin_fb_device = {
c6c4d7bb
BW
666 .name = "bf537-lq035",
667};
668#endif
669
670#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
671static struct platform_device bfin_fb_adv7393_device = {
672 .name = "bfin-adv7393",
1394f032
BW
673};
674#endif
675
676#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
677static struct resource bfin_uart_resources[] = {
233b28a9 678#ifdef CONFIG_SERIAL_BFIN_UART0
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679 {
680 .start = 0xFFC00400,
681 .end = 0xFFC004FF,
682 .flags = IORESOURCE_MEM,
233b28a9
SZ
683 },
684#endif
685#ifdef CONFIG_SERIAL_BFIN_UART1
686 {
1394f032
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687 .start = 0xFFC02000,
688 .end = 0xFFC020FF,
689 .flags = IORESOURCE_MEM,
690 },
233b28a9 691#endif
1394f032
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692};
693
694static struct platform_device bfin_uart_device = {
695 .name = "bfin-uart",
696 .id = 1,
697 .num_resources = ARRAY_SIZE(bfin_uart_resources),
698 .resource = bfin_uart_resources,
699};
700#endif
701
5be36d22
GY
702#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
703static struct resource bfin_sir_resources[] = {
704#ifdef CONFIG_BFIN_SIR0
705 {
706 .start = 0xFFC00400,
707 .end = 0xFFC004FF,
708 .flags = IORESOURCE_MEM,
709 },
710#endif
711#ifdef CONFIG_BFIN_SIR1
712 {
713 .start = 0xFFC02000,
714 .end = 0xFFC020FF,
715 .flags = IORESOURCE_MEM,
716 },
717#endif
718};
719
720static struct platform_device bfin_sir_device = {
721 .name = "bfin_sir",
722 .id = 0,
723 .num_resources = ARRAY_SIZE(bfin_sir_resources),
724 .resource = bfin_sir_resources,
725};
726#endif
727
1394f032 728#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW
729static struct resource bfin_twi0_resource[] = {
730 [0] = {
731 .start = TWI0_REGBASE,
732 .end = TWI0_REGBASE,
733 .flags = IORESOURCE_MEM,
734 },
735 [1] = {
736 .start = IRQ_TWI,
737 .end = IRQ_TWI,
738 .flags = IORESOURCE_IRQ,
739 },
740};
741
1394f032
BW
742static struct platform_device i2c_bfin_twi_device = {
743 .name = "i2c-bfin-twi",
744 .id = 0,
c6c4d7bb
BW
745 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
746 .resource = bfin_twi0_resource,
1394f032
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747};
748#endif
749
81d9c7f2
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750#ifdef CONFIG_I2C_BOARDINFO
751static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
752#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
753 {
754 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
81d9c7f2
BW
755 .irq = 55,
756 },
757#endif
758#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
759 {
760 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW
761 },
762#endif
763#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
764 {
765 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
81d9c7f2
BW
766 .irq = 72,
767 },
768#endif
769};
770#endif
771
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772#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
773static struct platform_device bfin_sport0_uart_device = {
774 .name = "bfin-sport-uart",
775 .id = 0,
776};
777
778static struct platform_device bfin_sport1_uart_device = {
779 .name = "bfin-sport-uart",
780 .id = 1,
781};
782#endif
783
c6c4d7bb
BW
784#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
785#define PATA_INT 55
786
787static struct pata_platform_info bfin_pata_platform_data = {
788 .ioport_shift = 1,
64e5c512 789 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW
790};
791
792static struct resource bfin_pata_resources[] = {
793 {
794 .start = 0x20314020,
795 .end = 0x2031403F,
796 .flags = IORESOURCE_MEM,
797 },
798 {
799 .start = 0x2031401C,
800 .end = 0x2031401F,
801 .flags = IORESOURCE_MEM,
802 },
803 {
804 .start = PATA_INT,
805 .end = PATA_INT,
806 .flags = IORESOURCE_IRQ,
807 },
808};
809
810static struct platform_device bfin_pata_device = {
811 .name = "pata_platform",
812 .id = -1,
813 .num_resources = ARRAY_SIZE(bfin_pata_resources),
814 .resource = bfin_pata_resources,
815 .dev = {
816 .platform_data = &bfin_pata_platform_data,
817 }
818};
819#endif
820
14b03204
MH
821static const unsigned int cclk_vlev_datasheet[] =
822{
823 VRPAIR(VLEV_085, 250000000),
824 VRPAIR(VLEV_090, 376000000),
825 VRPAIR(VLEV_095, 426000000),
826 VRPAIR(VLEV_100, 426000000),
827 VRPAIR(VLEV_105, 476000000),
828 VRPAIR(VLEV_110, 476000000),
829 VRPAIR(VLEV_115, 476000000),
830 VRPAIR(VLEV_120, 500000000),
831 VRPAIR(VLEV_125, 533000000),
832 VRPAIR(VLEV_130, 600000000),
833};
834
835static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
836 .tuple_tab = cclk_vlev_datasheet,
837 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
838 .vr_settling_time = 25 /* us */,
839};
840
841static struct platform_device bfin_dpmc = {
842 .name = "bfin dpmc",
843 .dev = {
844 .platform_data = &bfin_dmpc_vreg_data,
845 },
846};
847
1394f032 848static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH
849
850 &bfin_dpmc,
851
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BW
852#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
853 &bfin_pcmcia_cf_device,
854#endif
855
856#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
857 &rtc_device,
858#endif
859
860#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
861 &sl811_hcd_device,
862#endif
863
864#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
865 &isp1362_hcd_device,
866#endif
867
868#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
869 &smc91x_device,
870#endif
871
f40d24d9
AL
872#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
873 &dm9000_device,
874#endif
875
561cc18b
MH
876#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
877 &ax88180_device,
878#endif
879
1394f032
BW
880#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
881 &bfin_mac_device,
882#endif
883
884#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
885 &net2272_bfin_device,
886#endif
887
888#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 889 &bfin_spi0_device,
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890#endif
891
892#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
893 &bfin_fb_device,
894#endif
895
c6c4d7bb
BW
896#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
897 &bfin_fb_adv7393_device,
898#endif
899
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900#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
901 &bfin_uart_device,
902#endif
903
5be36d22
GY
904#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
905 &bfin_sir_device,
906#endif
907
1394f032
BW
908#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
909 &i2c_bfin_twi_device,
910#endif
911
912#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
913 &bfin_sport0_uart_device,
914 &bfin_sport1_uart_device,
915#endif
c6c4d7bb
BW
916
917#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
918 &bfin_pata_device,
919#endif
2463ef22
MH
920
921#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
922 &bfin_device_gpiokeys,
923#endif
cad2ab65
MF
924
925 &bfin_gpios_device,
793dc27b
MF
926
927#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 928 &stamp_flash_device,
793dc27b 929#endif
1394f032
BW
930};
931
932static int __init stamp_init(void)
933{
b85d858b 934 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2
BW
935
936#ifdef CONFIG_I2C_BOARDINFO
937 i2c_register_board_info(0, bfin_i2c_board_info,
938 ARRAY_SIZE(bfin_i2c_board_info));
939#endif
940
1394f032
BW
941 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
942#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
943 spi_register_board_info(bfin_spi_board_info,
944 ARRAY_SIZE(bfin_spi_board_info));
945#endif
c6c4d7bb
BW
946
947#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
948 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
949#endif
81d9c7f2 950
1394f032
BW
951 return 0;
952}
953
954arch_initcall(stamp_init);
c6c4d7bb
BW
955
956void native_machine_restart(char *cmd)
957{
958 /* workaround reboot hang when booting from SPI */
959 if ((bfin_read_SYSCR() & 0x7) == 0x3)
960 bfin_gpio_reset_spi0_ssel1();
961}
137b1529
MF
962
963/*
964 * Currently the MAC address is saved in Flash by U-Boot
965 */
966#define FLASH_MAC 0x203f0000
9862cc52 967void bfin_get_ether_addr(char *addr)
137b1529
MF
968{
969 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
970 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
971}
9862cc52 972EXPORT_SYMBOL(bfin_get_ether_addr);