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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/spi/flash.h> | |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
38 | #include <linux/usb_isp1362.h> | |
39 | #endif | |
1394f032 BW |
40 | #include <linux/irq.h> |
41 | #include <linux/interrupt.h> | |
1394f032 | 42 | #include <linux/usb_sl811.h> |
1f83b8f1 | 43 | #include <asm/bfin5xx_spi.h> |
1394f032 BW |
44 | #include <linux/spi/ad7877.h> |
45 | ||
46 | /* | |
47 | * Name the Board for the /proc/cpuinfo | |
48 | */ | |
49 | char *bfin_board_name = "ADDS-BF537-STAMP"; | |
50 | ||
51 | /* | |
52 | * Driver needs to know address, irq and flag pin. | |
53 | */ | |
54 | ||
55 | #define ISP1761_BASE 0x203C0000 | |
56 | #define ISP1761_IRQ IRQ_PF7 | |
57 | ||
58 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | |
59 | static struct resource bfin_isp1761_resources[] = { | |
60 | [0] = { | |
61 | .name = "isp1761-regs", | |
62 | .start = ISP1761_BASE + 0x00000000, | |
63 | .end = ISP1761_BASE + 0x000fffff, | |
64 | .flags = IORESOURCE_MEM, | |
65 | }, | |
66 | [1] = { | |
67 | .start = ISP1761_IRQ, | |
68 | .end = ISP1761_IRQ, | |
69 | .flags = IORESOURCE_IRQ, | |
70 | }, | |
71 | }; | |
72 | ||
73 | static struct platform_device bfin_isp1761_device = { | |
74 | .name = "isp1761", | |
75 | .id = 0, | |
76 | .num_resources = ARRAY_SIZE(bfin_isp1761_resources), | |
77 | .resource = bfin_isp1761_resources, | |
78 | }; | |
79 | ||
80 | static struct platform_device *bfin_isp1761_devices[] = { | |
81 | &bfin_isp1761_device, | |
82 | }; | |
83 | ||
84 | int __init bfin_isp1761_init(void) | |
85 | { | |
1f83b8f1 | 86 | unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices); |
1394f032 BW |
87 | |
88 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
89 | set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); | |
90 | ||
91 | return platform_add_devices(bfin_isp1761_devices, num_devices); | |
92 | } | |
93 | ||
94 | void __exit bfin_isp1761_exit(void) | |
95 | { | |
96 | platform_device_unregister(&bfin_isp1761_device); | |
97 | } | |
98 | ||
99 | arch_initcall(bfin_isp1761_init); | |
100 | #endif | |
101 | ||
102 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
103 | static struct resource bfin_pcmcia_cf_resources[] = { | |
104 | { | |
105 | .start = 0x20310000, /* IO PORT */ | |
106 | .end = 0x20312000, | |
107 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 108 | }, { |
d2d50aa9 | 109 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
110 | .end = 0x20311FFF, |
111 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 112 | }, { |
1394f032 BW |
113 | .start = IRQ_PF4, |
114 | .end = IRQ_PF4, | |
115 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 116 | }, { |
1394f032 BW |
117 | .start = 6, /* Card Detect PF6 */ |
118 | .end = 6, | |
119 | .flags = IORESOURCE_IRQ, | |
120 | }, | |
121 | }; | |
122 | ||
123 | static struct platform_device bfin_pcmcia_cf_device = { | |
124 | .name = "bfin_cf_pcmcia", | |
125 | .id = -1, | |
126 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
127 | .resource = bfin_pcmcia_cf_resources, | |
128 | }; | |
129 | #endif | |
130 | ||
131 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
132 | static struct platform_device rtc_device = { | |
133 | .name = "rtc-bfin", | |
134 | .id = -1, | |
135 | }; | |
136 | #endif | |
137 | ||
138 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
139 | static struct resource smc91x_resources[] = { | |
140 | { | |
141 | .name = "smc91x-regs", | |
142 | .start = 0x20300300, | |
143 | .end = 0x20300300 + 16, | |
144 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 145 | }, { |
1394f032 BW |
146 | |
147 | .start = IRQ_PF7, | |
148 | .end = IRQ_PF7, | |
149 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
150 | }, | |
151 | }; | |
152 | static struct platform_device smc91x_device = { | |
153 | .name = "smc91x", | |
154 | .id = 0, | |
155 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
156 | .resource = smc91x_resources, | |
157 | }; | |
158 | #endif | |
159 | ||
f40d24d9 AL |
160 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
161 | static struct resource dm9000_resources[] = { | |
162 | [0] = { | |
163 | .start = 0x203FB800, | |
164 | .end = 0x203FB800 + 8, | |
165 | .flags = IORESOURCE_MEM, | |
166 | }, | |
167 | [1] = { | |
168 | .start = IRQ_PF9, | |
169 | .end = IRQ_PF9, | |
170 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
171 | }, | |
172 | }; | |
173 | ||
174 | static struct platform_device dm9000_device = { | |
175 | .name = "dm9000", | |
176 | .id = -1, | |
177 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
178 | .resource = dm9000_resources, | |
179 | }; | |
180 | #endif | |
181 | ||
1394f032 BW |
182 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
183 | static struct resource sl811_hcd_resources[] = { | |
184 | { | |
185 | .start = 0x20340000, | |
186 | .end = 0x20340000, | |
187 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 188 | }, { |
1394f032 BW |
189 | .start = 0x20340004, |
190 | .end = 0x20340004, | |
191 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 192 | }, { |
1394f032 BW |
193 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
194 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
195 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
196 | }, | |
197 | }; | |
198 | ||
199 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
200 | void sl811_port_power(struct device *dev, int is_on) | |
201 | { | |
202 | unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS); | |
203 | ||
204 | bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask); | |
205 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask); | |
206 | ||
207 | if (is_on) | |
208 | bfin_write_FIO_FLAG_S(mask); | |
209 | else | |
210 | bfin_write_FIO_FLAG_C(mask); | |
211 | } | |
212 | #endif | |
213 | ||
214 | static struct sl811_platform_data sl811_priv = { | |
215 | .potpg = 10, | |
216 | .power = 250, /* == 500mA */ | |
217 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
218 | .port_power = &sl811_port_power, | |
219 | #endif | |
220 | }; | |
221 | ||
222 | static struct platform_device sl811_hcd_device = { | |
223 | .name = "sl811-hcd", | |
224 | .id = 0, | |
225 | .dev = { | |
226 | .platform_data = &sl811_priv, | |
227 | }, | |
228 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
229 | .resource = sl811_hcd_resources, | |
230 | }; | |
231 | #endif | |
232 | ||
233 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
234 | static struct resource isp1362_hcd_resources[] = { | |
235 | { | |
236 | .start = 0x20360000, | |
237 | .end = 0x20360000, | |
238 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 239 | }, { |
1394f032 BW |
240 | .start = 0x20360004, |
241 | .end = 0x20360004, | |
242 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 243 | }, { |
1394f032 BW |
244 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
245 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
246 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
247 | }, | |
248 | }; | |
249 | ||
250 | static struct isp1362_platform_data isp1362_priv = { | |
251 | .sel15Kres = 1, | |
252 | .clknotstop = 0, | |
253 | .oc_enable = 0, | |
254 | .int_act_high = 0, | |
255 | .int_edge_triggered = 0, | |
256 | .remote_wakeup_connected = 0, | |
257 | .no_power_switching = 1, | |
258 | .power_switching_mode = 0, | |
259 | }; | |
260 | ||
261 | static struct platform_device isp1362_hcd_device = { | |
262 | .name = "isp1362-hcd", | |
263 | .id = 0, | |
264 | .dev = { | |
265 | .platform_data = &isp1362_priv, | |
266 | }, | |
267 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
268 | .resource = isp1362_hcd_resources, | |
269 | }; | |
270 | #endif | |
271 | ||
272 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
273 | static struct platform_device bfin_mac_device = { | |
274 | .name = "bfin_mac", | |
275 | }; | |
276 | #endif | |
277 | ||
278 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
279 | static struct resource net2272_bfin_resources[] = { | |
280 | { | |
281 | .start = 0x20300000, | |
282 | .end = 0x20300000 + 0x100, | |
283 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 284 | }, { |
1394f032 BW |
285 | .start = IRQ_PF7, |
286 | .end = IRQ_PF7, | |
287 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
288 | }, | |
289 | }; | |
290 | ||
291 | static struct platform_device net2272_bfin_device = { | |
292 | .name = "net2272", | |
293 | .id = -1, | |
294 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
295 | .resource = net2272_bfin_resources, | |
296 | }; | |
297 | #endif | |
298 | ||
299 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
300 | /* all SPI peripherals info goes here */ | |
301 | ||
302 | #if defined(CONFIG_MTD_M25P80) \ | |
303 | || defined(CONFIG_MTD_M25P80_MODULE) | |
304 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
305 | { | |
306 | .name = "bootloader", | |
307 | .size = 0x00020000, | |
308 | .offset = 0, | |
309 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 310 | }, { |
1394f032 BW |
311 | .name = "kernel", |
312 | .size = 0xe0000, | |
313 | .offset = 0x20000 | |
1f83b8f1 | 314 | }, { |
1394f032 BW |
315 | .name = "file system", |
316 | .size = 0x700000, | |
317 | .offset = 0x00100000, | |
318 | } | |
319 | }; | |
320 | ||
321 | static struct flash_platform_data bfin_spi_flash_data = { | |
322 | .name = "m25p80", | |
323 | .parts = bfin_spi_flash_partitions, | |
324 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
325 | .type = "m25p64", | |
326 | }; | |
327 | ||
328 | /* SPI flash chip (m25p64) */ | |
329 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
330 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
331 | .bits_per_word = 8, | |
332 | }; | |
333 | #endif | |
334 | ||
335 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
336 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
337 | /* SPI ADC chip */ | |
338 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
339 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
340 | .bits_per_word = 16, | |
341 | }; | |
342 | #endif | |
343 | ||
344 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
345 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
346 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
347 | .enable_dma = 0, | |
348 | .bits_per_word = 16, | |
349 | }; | |
350 | #endif | |
351 | ||
352 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
353 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
354 | .enable_dma = 0, | |
355 | .bits_per_word = 16, | |
356 | }; | |
357 | #endif | |
358 | ||
359 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
360 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
361 | .enable_dma = 1, | |
362 | .bits_per_word = 8, | |
363 | }; | |
364 | #endif | |
365 | ||
366 | #if defined(CONFIG_PBX) | |
367 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
368 | .ctl_reg = 0x4, /* send zero */ | |
369 | .enable_dma = 0, | |
370 | .bits_per_word = 8, | |
371 | .cs_change_per_word = 1, | |
372 | }; | |
373 | #endif | |
374 | ||
375 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
376 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
377 | .enable_dma = 0, | |
378 | .bits_per_word = 16, | |
379 | }; | |
380 | #endif | |
381 | ||
382 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
383 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
1394f032 BW |
384 | .enable_dma = 0, |
385 | .bits_per_word = 16, | |
386 | }; | |
387 | ||
388 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
389 | .model = 7877, | |
390 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
391 | .x_plate_ohms = 419, | |
392 | .y_plate_ohms = 486, | |
393 | .pressure_max = 1000, | |
394 | .pressure_min = 0, | |
395 | .stopacq_polarity = 1, | |
396 | .first_conversion_delay = 3, | |
397 | .acquisition_time = 1, | |
398 | .averaging = 1, | |
399 | .pen_down_acc_interval = 1, | |
400 | }; | |
401 | #endif | |
402 | ||
403 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
404 | #if defined(CONFIG_MTD_M25P80) \ | |
405 | || defined(CONFIG_MTD_M25P80_MODULE) | |
406 | { | |
407 | /* the modalias must be the same as spi device driver name */ | |
408 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
409 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
410 | .bus_num = 1, /* Framework bus number */ | |
411 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | |
412 | .platform_data = &bfin_spi_flash_data, | |
413 | .controller_data = &spi_flash_chip_info, | |
414 | .mode = SPI_MODE_3, | |
415 | }, | |
416 | #endif | |
417 | ||
418 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
419 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
420 | { | |
421 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
422 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
423 | .bus_num = 1, /* Framework bus number */ | |
424 | .chip_select = 1, /* Framework chip select. */ | |
425 | .platform_data = NULL, /* No spi_driver specific config */ | |
426 | .controller_data = &spi_adc_chip_info, | |
427 | }, | |
428 | #endif | |
429 | ||
430 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
431 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
432 | { | |
433 | .modalias = "ad1836-spi", | |
434 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
435 | .bus_num = 1, | |
436 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | |
437 | .controller_data = &ad1836_spi_chip_info, | |
438 | }, | |
439 | #endif | |
440 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
441 | { | |
442 | .modalias = "ad9960-spi", | |
443 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
444 | .bus_num = 1, | |
445 | .chip_select = 1, | |
446 | .controller_data = &ad9960_spi_chip_info, | |
447 | }, | |
448 | #endif | |
449 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
450 | { | |
451 | .modalias = "spi_mmc_dummy", | |
452 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
453 | .bus_num = 1, | |
454 | .chip_select = 0, | |
455 | .platform_data = NULL, | |
456 | .controller_data = &spi_mmc_chip_info, | |
457 | .mode = SPI_MODE_3, | |
458 | }, | |
459 | { | |
460 | .modalias = "spi_mmc", | |
461 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
462 | .bus_num = 1, | |
463 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | |
464 | .platform_data = NULL, | |
465 | .controller_data = &spi_mmc_chip_info, | |
466 | .mode = SPI_MODE_3, | |
467 | }, | |
468 | #endif | |
469 | #if defined(CONFIG_PBX) | |
470 | { | |
1f83b8f1 MF |
471 | .modalias = "fxs-spi", |
472 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
473 | .bus_num = 1, | |
474 | .chip_select = 3, | |
475 | .controller_data = &spi_si3xxx_chip_info, | |
1394f032 BW |
476 | .mode = SPI_MODE_3, |
477 | }, | |
478 | { | |
1f83b8f1 MF |
479 | .modalias = "fxo-spi", |
480 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
481 | .bus_num = 1, | |
482 | .chip_select = 2, | |
483 | .controller_data = &spi_si3xxx_chip_info, | |
1394f032 BW |
484 | .mode = SPI_MODE_3, |
485 | }, | |
486 | #endif | |
487 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
488 | { | |
489 | .modalias = "ad5304_spi", | |
490 | .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ | |
491 | .bus_num = 1, | |
492 | .chip_select = 2, | |
493 | .platform_data = NULL, | |
494 | .controller_data = &ad5304_chip_info, | |
495 | .mode = SPI_MODE_2, | |
496 | }, | |
497 | #endif | |
498 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
499 | { | |
500 | .modalias = "ad7877", | |
501 | .platform_data = &bfin_ad7877_ts_info, | |
502 | .irq = IRQ_PF6, | |
503 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
504 | .bus_num = 1, | |
505 | .chip_select = 1, | |
506 | .controller_data = &spi_ad7877_chip_info, | |
507 | }, | |
508 | #endif | |
509 | }; | |
510 | ||
511 | /* SPI controller data */ | |
512 | static struct bfin5xx_spi_master spi_bfin_master_info = { | |
513 | .num_chipselect = 8, | |
514 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
515 | }; | |
516 | ||
517 | static struct platform_device spi_bfin_master_device = { | |
518 | .name = "bfin-spi-master", | |
519 | .id = 1, /* Bus number */ | |
520 | .dev = { | |
521 | .platform_data = &spi_bfin_master_info, /* Passed to driver */ | |
522 | }, | |
523 | }; | |
524 | #endif /* spi master and devices */ | |
525 | ||
526 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
527 | static struct platform_device bfin_fb_device = { | |
528 | .name = "bf537-fb", | |
529 | }; | |
530 | #endif | |
531 | ||
532 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
533 | static struct resource bfin_uart_resources[] = { | |
534 | { | |
535 | .start = 0xFFC00400, | |
536 | .end = 0xFFC004FF, | |
537 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 538 | }, { |
1394f032 BW |
539 | .start = 0xFFC02000, |
540 | .end = 0xFFC020FF, | |
541 | .flags = IORESOURCE_MEM, | |
542 | }, | |
543 | }; | |
544 | ||
545 | static struct platform_device bfin_uart_device = { | |
546 | .name = "bfin-uart", | |
547 | .id = 1, | |
548 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
549 | .resource = bfin_uart_resources, | |
550 | }; | |
551 | #endif | |
552 | ||
553 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
554 | static struct platform_device i2c_bfin_twi_device = { | |
555 | .name = "i2c-bfin-twi", | |
556 | .id = 0, | |
557 | }; | |
558 | #endif | |
559 | ||
560 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
561 | static struct platform_device bfin_sport0_uart_device = { | |
562 | .name = "bfin-sport-uart", | |
563 | .id = 0, | |
564 | }; | |
565 | ||
566 | static struct platform_device bfin_sport1_uart_device = { | |
567 | .name = "bfin-sport-uart", | |
568 | .id = 1, | |
569 | }; | |
570 | #endif | |
571 | ||
572 | static struct platform_device *stamp_devices[] __initdata = { | |
573 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
574 | &bfin_pcmcia_cf_device, | |
575 | #endif | |
576 | ||
577 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
578 | &rtc_device, | |
579 | #endif | |
580 | ||
581 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
582 | &sl811_hcd_device, | |
583 | #endif | |
584 | ||
585 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
586 | &isp1362_hcd_device, | |
587 | #endif | |
588 | ||
589 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
590 | &smc91x_device, | |
591 | #endif | |
592 | ||
f40d24d9 AL |
593 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
594 | &dm9000_device, | |
595 | #endif | |
596 | ||
1394f032 BW |
597 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
598 | &bfin_mac_device, | |
599 | #endif | |
600 | ||
601 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
602 | &net2272_bfin_device, | |
603 | #endif | |
604 | ||
605 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
606 | &spi_bfin_master_device, | |
607 | #endif | |
608 | ||
609 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
610 | &bfin_fb_device, | |
611 | #endif | |
612 | ||
613 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
614 | &bfin_uart_device, | |
615 | #endif | |
616 | ||
617 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
618 | &i2c_bfin_twi_device, | |
619 | #endif | |
620 | ||
621 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
622 | &bfin_sport0_uart_device, | |
623 | &bfin_sport1_uart_device, | |
624 | #endif | |
625 | }; | |
626 | ||
627 | static int __init stamp_init(void) | |
628 | { | |
629 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
630 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
631 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
632 | spi_register_board_info(bfin_spi_board_info, | |
633 | ARRAY_SIZE(bfin_spi_board_info)); | |
634 | #endif | |
635 | return 0; | |
636 | } | |
637 | ||
638 | arch_initcall(stamp_init); |