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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/spi/flash.h> | |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
38 | #include <linux/usb_isp1362.h> | |
39 | #endif | |
1394f032 BW |
40 | #include <linux/irq.h> |
41 | #include <linux/interrupt.h> | |
1394f032 | 42 | #include <linux/usb_sl811.h> |
1f83b8f1 | 43 | #include <asm/bfin5xx_spi.h> |
1394f032 BW |
44 | #include <linux/spi/ad7877.h> |
45 | ||
46 | /* | |
47 | * Name the Board for the /proc/cpuinfo | |
48 | */ | |
49 | char *bfin_board_name = "ADDS-BF537-STAMP"; | |
50 | ||
51 | /* | |
52 | * Driver needs to know address, irq and flag pin. | |
53 | */ | |
54 | ||
55 | #define ISP1761_BASE 0x203C0000 | |
56 | #define ISP1761_IRQ IRQ_PF7 | |
57 | ||
58 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | |
59 | static struct resource bfin_isp1761_resources[] = { | |
60 | [0] = { | |
61 | .name = "isp1761-regs", | |
62 | .start = ISP1761_BASE + 0x00000000, | |
63 | .end = ISP1761_BASE + 0x000fffff, | |
64 | .flags = IORESOURCE_MEM, | |
65 | }, | |
66 | [1] = { | |
67 | .start = ISP1761_IRQ, | |
68 | .end = ISP1761_IRQ, | |
69 | .flags = IORESOURCE_IRQ, | |
70 | }, | |
71 | }; | |
72 | ||
73 | static struct platform_device bfin_isp1761_device = { | |
74 | .name = "isp1761", | |
75 | .id = 0, | |
76 | .num_resources = ARRAY_SIZE(bfin_isp1761_resources), | |
77 | .resource = bfin_isp1761_resources, | |
78 | }; | |
79 | ||
80 | static struct platform_device *bfin_isp1761_devices[] = { | |
81 | &bfin_isp1761_device, | |
82 | }; | |
83 | ||
84 | int __init bfin_isp1761_init(void) | |
85 | { | |
1f83b8f1 | 86 | unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices); |
1394f032 BW |
87 | |
88 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
89 | set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); | |
90 | ||
91 | return platform_add_devices(bfin_isp1761_devices, num_devices); | |
92 | } | |
93 | ||
94 | void __exit bfin_isp1761_exit(void) | |
95 | { | |
96 | platform_device_unregister(&bfin_isp1761_device); | |
97 | } | |
98 | ||
99 | arch_initcall(bfin_isp1761_init); | |
100 | #endif | |
101 | ||
102 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
103 | static struct resource bfin_pcmcia_cf_resources[] = { | |
104 | { | |
105 | .start = 0x20310000, /* IO PORT */ | |
106 | .end = 0x20312000, | |
107 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 108 | }, { |
d2d50aa9 | 109 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
110 | .end = 0x20311FFF, |
111 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 112 | }, { |
1394f032 BW |
113 | .start = IRQ_PF4, |
114 | .end = IRQ_PF4, | |
115 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 116 | }, { |
1394f032 BW |
117 | .start = 6, /* Card Detect PF6 */ |
118 | .end = 6, | |
119 | .flags = IORESOURCE_IRQ, | |
120 | }, | |
121 | }; | |
122 | ||
123 | static struct platform_device bfin_pcmcia_cf_device = { | |
124 | .name = "bfin_cf_pcmcia", | |
125 | .id = -1, | |
126 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
127 | .resource = bfin_pcmcia_cf_resources, | |
128 | }; | |
129 | #endif | |
130 | ||
131 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
132 | static struct platform_device rtc_device = { | |
133 | .name = "rtc-bfin", | |
134 | .id = -1, | |
135 | }; | |
136 | #endif | |
137 | ||
138 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
139 | static struct resource smc91x_resources[] = { | |
140 | { | |
141 | .name = "smc91x-regs", | |
142 | .start = 0x20300300, | |
143 | .end = 0x20300300 + 16, | |
144 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 145 | }, { |
1394f032 BW |
146 | |
147 | .start = IRQ_PF7, | |
148 | .end = IRQ_PF7, | |
149 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
150 | }, | |
151 | }; | |
152 | static struct platform_device smc91x_device = { | |
153 | .name = "smc91x", | |
154 | .id = 0, | |
155 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
156 | .resource = smc91x_resources, | |
157 | }; | |
158 | #endif | |
159 | ||
160 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
161 | static struct resource sl811_hcd_resources[] = { | |
162 | { | |
163 | .start = 0x20340000, | |
164 | .end = 0x20340000, | |
165 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 166 | }, { |
1394f032 BW |
167 | .start = 0x20340004, |
168 | .end = 0x20340004, | |
169 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 170 | }, { |
1394f032 BW |
171 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
172 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
173 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
174 | }, | |
175 | }; | |
176 | ||
177 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
178 | void sl811_port_power(struct device *dev, int is_on) | |
179 | { | |
180 | unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS); | |
181 | ||
182 | bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask); | |
183 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask); | |
184 | ||
185 | if (is_on) | |
186 | bfin_write_FIO_FLAG_S(mask); | |
187 | else | |
188 | bfin_write_FIO_FLAG_C(mask); | |
189 | } | |
190 | #endif | |
191 | ||
192 | static struct sl811_platform_data sl811_priv = { | |
193 | .potpg = 10, | |
194 | .power = 250, /* == 500mA */ | |
195 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
196 | .port_power = &sl811_port_power, | |
197 | #endif | |
198 | }; | |
199 | ||
200 | static struct platform_device sl811_hcd_device = { | |
201 | .name = "sl811-hcd", | |
202 | .id = 0, | |
203 | .dev = { | |
204 | .platform_data = &sl811_priv, | |
205 | }, | |
206 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
207 | .resource = sl811_hcd_resources, | |
208 | }; | |
209 | #endif | |
210 | ||
211 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
212 | static struct resource isp1362_hcd_resources[] = { | |
213 | { | |
214 | .start = 0x20360000, | |
215 | .end = 0x20360000, | |
216 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 217 | }, { |
1394f032 BW |
218 | .start = 0x20360004, |
219 | .end = 0x20360004, | |
220 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 221 | }, { |
1394f032 BW |
222 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
223 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
224 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
225 | }, | |
226 | }; | |
227 | ||
228 | static struct isp1362_platform_data isp1362_priv = { | |
229 | .sel15Kres = 1, | |
230 | .clknotstop = 0, | |
231 | .oc_enable = 0, | |
232 | .int_act_high = 0, | |
233 | .int_edge_triggered = 0, | |
234 | .remote_wakeup_connected = 0, | |
235 | .no_power_switching = 1, | |
236 | .power_switching_mode = 0, | |
237 | }; | |
238 | ||
239 | static struct platform_device isp1362_hcd_device = { | |
240 | .name = "isp1362-hcd", | |
241 | .id = 0, | |
242 | .dev = { | |
243 | .platform_data = &isp1362_priv, | |
244 | }, | |
245 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
246 | .resource = isp1362_hcd_resources, | |
247 | }; | |
248 | #endif | |
249 | ||
250 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
251 | static struct platform_device bfin_mac_device = { | |
252 | .name = "bfin_mac", | |
253 | }; | |
254 | #endif | |
255 | ||
256 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
257 | static struct resource net2272_bfin_resources[] = { | |
258 | { | |
259 | .start = 0x20300000, | |
260 | .end = 0x20300000 + 0x100, | |
261 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 262 | }, { |
1394f032 BW |
263 | .start = IRQ_PF7, |
264 | .end = IRQ_PF7, | |
265 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
266 | }, | |
267 | }; | |
268 | ||
269 | static struct platform_device net2272_bfin_device = { | |
270 | .name = "net2272", | |
271 | .id = -1, | |
272 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
273 | .resource = net2272_bfin_resources, | |
274 | }; | |
275 | #endif | |
276 | ||
277 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
278 | /* all SPI peripherals info goes here */ | |
279 | ||
280 | #if defined(CONFIG_MTD_M25P80) \ | |
281 | || defined(CONFIG_MTD_M25P80_MODULE) | |
282 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
283 | { | |
284 | .name = "bootloader", | |
285 | .size = 0x00020000, | |
286 | .offset = 0, | |
287 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 288 | }, { |
1394f032 BW |
289 | .name = "kernel", |
290 | .size = 0xe0000, | |
291 | .offset = 0x20000 | |
1f83b8f1 | 292 | }, { |
1394f032 BW |
293 | .name = "file system", |
294 | .size = 0x700000, | |
295 | .offset = 0x00100000, | |
296 | } | |
297 | }; | |
298 | ||
299 | static struct flash_platform_data bfin_spi_flash_data = { | |
300 | .name = "m25p80", | |
301 | .parts = bfin_spi_flash_partitions, | |
302 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
303 | .type = "m25p64", | |
304 | }; | |
305 | ||
306 | /* SPI flash chip (m25p64) */ | |
307 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
308 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
309 | .bits_per_word = 8, | |
310 | }; | |
311 | #endif | |
312 | ||
313 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
314 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
315 | /* SPI ADC chip */ | |
316 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
317 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
318 | .bits_per_word = 16, | |
319 | }; | |
320 | #endif | |
321 | ||
322 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
323 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
324 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
325 | .enable_dma = 0, | |
326 | .bits_per_word = 16, | |
327 | }; | |
328 | #endif | |
329 | ||
330 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
331 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
332 | .enable_dma = 0, | |
333 | .bits_per_word = 16, | |
334 | }; | |
335 | #endif | |
336 | ||
337 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
338 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
339 | .enable_dma = 1, | |
340 | .bits_per_word = 8, | |
341 | }; | |
342 | #endif | |
343 | ||
344 | #if defined(CONFIG_PBX) | |
345 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
346 | .ctl_reg = 0x4, /* send zero */ | |
347 | .enable_dma = 0, | |
348 | .bits_per_word = 8, | |
349 | .cs_change_per_word = 1, | |
350 | }; | |
351 | #endif | |
352 | ||
353 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
354 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
355 | .enable_dma = 0, | |
356 | .bits_per_word = 16, | |
357 | }; | |
358 | #endif | |
359 | ||
360 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
361 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
1394f032 BW |
362 | .enable_dma = 0, |
363 | .bits_per_word = 16, | |
364 | }; | |
365 | ||
366 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
367 | .model = 7877, | |
368 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
369 | .x_plate_ohms = 419, | |
370 | .y_plate_ohms = 486, | |
371 | .pressure_max = 1000, | |
372 | .pressure_min = 0, | |
373 | .stopacq_polarity = 1, | |
374 | .first_conversion_delay = 3, | |
375 | .acquisition_time = 1, | |
376 | .averaging = 1, | |
377 | .pen_down_acc_interval = 1, | |
378 | }; | |
379 | #endif | |
380 | ||
381 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
382 | #if defined(CONFIG_MTD_M25P80) \ | |
383 | || defined(CONFIG_MTD_M25P80_MODULE) | |
384 | { | |
385 | /* the modalias must be the same as spi device driver name */ | |
386 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
387 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
388 | .bus_num = 1, /* Framework bus number */ | |
389 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | |
390 | .platform_data = &bfin_spi_flash_data, | |
391 | .controller_data = &spi_flash_chip_info, | |
392 | .mode = SPI_MODE_3, | |
393 | }, | |
394 | #endif | |
395 | ||
396 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
397 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
398 | { | |
399 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
400 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
401 | .bus_num = 1, /* Framework bus number */ | |
402 | .chip_select = 1, /* Framework chip select. */ | |
403 | .platform_data = NULL, /* No spi_driver specific config */ | |
404 | .controller_data = &spi_adc_chip_info, | |
405 | }, | |
406 | #endif | |
407 | ||
408 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
409 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
410 | { | |
411 | .modalias = "ad1836-spi", | |
412 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
413 | .bus_num = 1, | |
414 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | |
415 | .controller_data = &ad1836_spi_chip_info, | |
416 | }, | |
417 | #endif | |
418 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
419 | { | |
420 | .modalias = "ad9960-spi", | |
421 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
422 | .bus_num = 1, | |
423 | .chip_select = 1, | |
424 | .controller_data = &ad9960_spi_chip_info, | |
425 | }, | |
426 | #endif | |
427 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
428 | { | |
429 | .modalias = "spi_mmc_dummy", | |
430 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
431 | .bus_num = 1, | |
432 | .chip_select = 0, | |
433 | .platform_data = NULL, | |
434 | .controller_data = &spi_mmc_chip_info, | |
435 | .mode = SPI_MODE_3, | |
436 | }, | |
437 | { | |
438 | .modalias = "spi_mmc", | |
439 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
440 | .bus_num = 1, | |
441 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | |
442 | .platform_data = NULL, | |
443 | .controller_data = &spi_mmc_chip_info, | |
444 | .mode = SPI_MODE_3, | |
445 | }, | |
446 | #endif | |
447 | #if defined(CONFIG_PBX) | |
448 | { | |
1f83b8f1 MF |
449 | .modalias = "fxs-spi", |
450 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
451 | .bus_num = 1, | |
452 | .chip_select = 3, | |
453 | .controller_data = &spi_si3xxx_chip_info, | |
1394f032 BW |
454 | .mode = SPI_MODE_3, |
455 | }, | |
456 | { | |
1f83b8f1 MF |
457 | .modalias = "fxo-spi", |
458 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
459 | .bus_num = 1, | |
460 | .chip_select = 2, | |
461 | .controller_data = &spi_si3xxx_chip_info, | |
1394f032 BW |
462 | .mode = SPI_MODE_3, |
463 | }, | |
464 | #endif | |
465 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
466 | { | |
467 | .modalias = "ad5304_spi", | |
468 | .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ | |
469 | .bus_num = 1, | |
470 | .chip_select = 2, | |
471 | .platform_data = NULL, | |
472 | .controller_data = &ad5304_chip_info, | |
473 | .mode = SPI_MODE_2, | |
474 | }, | |
475 | #endif | |
476 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
477 | { | |
478 | .modalias = "ad7877", | |
479 | .platform_data = &bfin_ad7877_ts_info, | |
480 | .irq = IRQ_PF6, | |
481 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
482 | .bus_num = 1, | |
483 | .chip_select = 1, | |
484 | .controller_data = &spi_ad7877_chip_info, | |
485 | }, | |
486 | #endif | |
487 | }; | |
488 | ||
489 | /* SPI controller data */ | |
490 | static struct bfin5xx_spi_master spi_bfin_master_info = { | |
491 | .num_chipselect = 8, | |
492 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
493 | }; | |
494 | ||
495 | static struct platform_device spi_bfin_master_device = { | |
496 | .name = "bfin-spi-master", | |
497 | .id = 1, /* Bus number */ | |
498 | .dev = { | |
499 | .platform_data = &spi_bfin_master_info, /* Passed to driver */ | |
500 | }, | |
501 | }; | |
502 | #endif /* spi master and devices */ | |
503 | ||
504 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
505 | static struct platform_device bfin_fb_device = { | |
506 | .name = "bf537-fb", | |
507 | }; | |
508 | #endif | |
509 | ||
510 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
511 | static struct resource bfin_uart_resources[] = { | |
512 | { | |
513 | .start = 0xFFC00400, | |
514 | .end = 0xFFC004FF, | |
515 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 516 | }, { |
1394f032 BW |
517 | .start = 0xFFC02000, |
518 | .end = 0xFFC020FF, | |
519 | .flags = IORESOURCE_MEM, | |
520 | }, | |
521 | }; | |
522 | ||
523 | static struct platform_device bfin_uart_device = { | |
524 | .name = "bfin-uart", | |
525 | .id = 1, | |
526 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
527 | .resource = bfin_uart_resources, | |
528 | }; | |
529 | #endif | |
530 | ||
531 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
532 | static struct platform_device i2c_bfin_twi_device = { | |
533 | .name = "i2c-bfin-twi", | |
534 | .id = 0, | |
535 | }; | |
536 | #endif | |
537 | ||
538 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
539 | static struct platform_device bfin_sport0_uart_device = { | |
540 | .name = "bfin-sport-uart", | |
541 | .id = 0, | |
542 | }; | |
543 | ||
544 | static struct platform_device bfin_sport1_uart_device = { | |
545 | .name = "bfin-sport-uart", | |
546 | .id = 1, | |
547 | }; | |
548 | #endif | |
549 | ||
550 | static struct platform_device *stamp_devices[] __initdata = { | |
551 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
552 | &bfin_pcmcia_cf_device, | |
553 | #endif | |
554 | ||
555 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
556 | &rtc_device, | |
557 | #endif | |
558 | ||
559 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
560 | &sl811_hcd_device, | |
561 | #endif | |
562 | ||
563 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
564 | &isp1362_hcd_device, | |
565 | #endif | |
566 | ||
567 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
568 | &smc91x_device, | |
569 | #endif | |
570 | ||
571 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
572 | &bfin_mac_device, | |
573 | #endif | |
574 | ||
575 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
576 | &net2272_bfin_device, | |
577 | #endif | |
578 | ||
579 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
580 | &spi_bfin_master_device, | |
581 | #endif | |
582 | ||
583 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
584 | &bfin_fb_device, | |
585 | #endif | |
586 | ||
587 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
588 | &bfin_uart_device, | |
589 | #endif | |
590 | ||
591 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
592 | &i2c_bfin_twi_device, | |
593 | #endif | |
594 | ||
595 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
596 | &bfin_sport0_uart_device, | |
597 | &bfin_sport1_uart_device, | |
598 | #endif | |
599 | }; | |
600 | ||
601 | static int __init stamp_init(void) | |
602 | { | |
603 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
604 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
605 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
606 | spi_register_board_info(bfin_spi_board_info, | |
607 | ARRAY_SIZE(bfin_spi_board_info)); | |
608 | #endif | |
609 | return 0; | |
610 | } | |
611 | ||
612 | arch_initcall(stamp_init); |