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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
fc68911e | 32 | #include <linux/kernel.h> |
1394f032 BW |
33 | #include <linux/platform_device.h> |
34 | #include <linux/mtd/mtd.h> | |
fc68911e | 35 | #include <linux/mtd/nand.h> |
1394f032 | 36 | #include <linux/mtd/partitions.h> |
fc68911e | 37 | #include <linux/mtd/plat-ram.h> |
de8c43f2 | 38 | #include <linux/mtd/physmap.h> |
1394f032 BW |
39 | #include <linux/spi/spi.h> |
40 | #include <linux/spi/flash.h> | |
41 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 42 | #include <linux/usb/isp1362.h> |
1394f032 | 43 | #endif |
0a87e3e9 | 44 | #include <linux/ata_platform.h> |
1394f032 BW |
45 | #include <linux/irq.h> |
46 | #include <linux/interrupt.h> | |
81d9c7f2 | 47 | #include <linux/i2c.h> |
27f5d75a | 48 | #include <linux/usb/sl811.h> |
f79ea4cb | 49 | #include <linux/spi/mmc_spi.h> |
c6c4d7bb | 50 | #include <asm/dma.h> |
1f83b8f1 | 51 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 52 | #include <asm/reboot.h> |
5d448dd5 | 53 | #include <asm/portmux.h> |
14b03204 | 54 | #include <asm/dpmc.h> |
1394f032 BW |
55 | |
56 | /* | |
57 | * Name the Board for the /proc/cpuinfo | |
58 | */ | |
fe85cad2 | 59 | const char bfin_board_name[] = "ADI BF537-STAMP"; |
1394f032 BW |
60 | |
61 | /* | |
62 | * Driver needs to know address, irq and flag pin. | |
63 | */ | |
64 | ||
1394f032 | 65 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
3f375690 MH |
66 | #include <linux/usb/isp1760.h> |
67 | static struct resource bfin_isp1760_resources[] = { | |
1394f032 | 68 | [0] = { |
3f375690 MH |
69 | .start = 0x203C0000, |
70 | .end = 0x203C0000 + 0x000fffff, | |
1394f032 BW |
71 | .flags = IORESOURCE_MEM, |
72 | }, | |
73 | [1] = { | |
3f375690 MH |
74 | .start = IRQ_PF7, |
75 | .end = IRQ_PF7, | |
1394f032 BW |
76 | .flags = IORESOURCE_IRQ, |
77 | }, | |
78 | }; | |
79 | ||
3f375690 MH |
80 | static struct isp1760_platform_data isp1760_priv = { |
81 | .is_isp1761 = 0, | |
82 | .port1_disable = 0, | |
83 | .bus_width_16 = 1, | |
84 | .port1_otg = 0, | |
85 | .analog_oc = 0, | |
86 | .dack_polarity_high = 0, | |
87 | .dreq_polarity_high = 0, | |
1394f032 BW |
88 | }; |
89 | ||
3f375690 MH |
90 | static struct platform_device bfin_isp1760_device = { |
91 | .name = "isp1760-hcd", | |
92 | .id = 0, | |
93 | .dev = { | |
94 | .platform_data = &isp1760_priv, | |
95 | }, | |
96 | .num_resources = ARRAY_SIZE(bfin_isp1760_resources), | |
97 | .resource = bfin_isp1760_resources, | |
1394f032 | 98 | }; |
1394f032 BW |
99 | #endif |
100 | ||
2463ef22 MH |
101 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
102 | #include <linux/input.h> | |
103 | #include <linux/gpio_keys.h> | |
104 | ||
105 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
106 | {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"}, | |
107 | {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"}, | |
108 | {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"}, | |
109 | {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"}, | |
110 | }; | |
111 | ||
112 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
113 | .buttons = bfin_gpio_keys_table, | |
114 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
115 | }; | |
116 | ||
117 | static struct platform_device bfin_device_gpiokeys = { | |
118 | .name = "gpio-keys", | |
119 | .dev = { | |
120 | .platform_data = &bfin_gpio_keys_data, | |
121 | }, | |
122 | }; | |
123 | #endif | |
124 | ||
cad2ab65 MF |
125 | static struct resource bfin_gpios_resources = { |
126 | .start = 0, | |
127 | .end = MAX_BLACKFIN_GPIOS - 1, | |
128 | .flags = IORESOURCE_IRQ, | |
129 | }; | |
130 | ||
131 | static struct platform_device bfin_gpios_device = { | |
132 | .name = "simple-gpio", | |
133 | .id = -1, | |
134 | .num_resources = 1, | |
135 | .resource = &bfin_gpios_resources, | |
136 | }; | |
137 | ||
1394f032 BW |
138 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
139 | static struct resource bfin_pcmcia_cf_resources[] = { | |
140 | { | |
141 | .start = 0x20310000, /* IO PORT */ | |
142 | .end = 0x20312000, | |
143 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 144 | }, { |
d2d50aa9 | 145 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
146 | .end = 0x20311FFF, |
147 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 148 | }, { |
1394f032 BW |
149 | .start = IRQ_PF4, |
150 | .end = IRQ_PF4, | |
151 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 152 | }, { |
1394f032 BW |
153 | .start = 6, /* Card Detect PF6 */ |
154 | .end = 6, | |
155 | .flags = IORESOURCE_IRQ, | |
156 | }, | |
157 | }; | |
158 | ||
159 | static struct platform_device bfin_pcmcia_cf_device = { | |
160 | .name = "bfin_cf_pcmcia", | |
161 | .id = -1, | |
162 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
163 | .resource = bfin_pcmcia_cf_resources, | |
164 | }; | |
165 | #endif | |
166 | ||
167 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
168 | static struct platform_device rtc_device = { | |
169 | .name = "rtc-bfin", | |
170 | .id = -1, | |
171 | }; | |
172 | #endif | |
173 | ||
174 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
175 | static struct resource smc91x_resources[] = { | |
176 | { | |
177 | .name = "smc91x-regs", | |
178 | .start = 0x20300300, | |
179 | .end = 0x20300300 + 16, | |
180 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 181 | }, { |
1394f032 BW |
182 | |
183 | .start = IRQ_PF7, | |
184 | .end = IRQ_PF7, | |
185 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
186 | }, | |
187 | }; | |
188 | static struct platform_device smc91x_device = { | |
189 | .name = "smc91x", | |
190 | .id = 0, | |
191 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
192 | .resource = smc91x_resources, | |
193 | }; | |
194 | #endif | |
195 | ||
f40d24d9 AL |
196 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
197 | static struct resource dm9000_resources[] = { | |
198 | [0] = { | |
199 | .start = 0x203FB800, | |
200 | .end = 0x203FB800 + 8, | |
201 | .flags = IORESOURCE_MEM, | |
202 | }, | |
203 | [1] = { | |
204 | .start = IRQ_PF9, | |
205 | .end = IRQ_PF9, | |
206 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
207 | }, | |
208 | }; | |
209 | ||
210 | static struct platform_device dm9000_device = { | |
211 | .name = "dm9000", | |
212 | .id = -1, | |
213 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
214 | .resource = dm9000_resources, | |
215 | }; | |
216 | #endif | |
217 | ||
561cc18b MH |
218 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
219 | static struct resource ax88180_resources[] = { | |
220 | [0] = { | |
221 | .start = 0x20300000, | |
222 | .end = 0x20300000 + 0x8000, | |
223 | .flags = IORESOURCE_MEM, | |
224 | }, | |
225 | [1] = { | |
226 | .start = IRQ_PF7, | |
227 | .end = IRQ_PF7, | |
228 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL), | |
229 | }, | |
230 | }; | |
231 | ||
232 | static struct platform_device ax88180_device = { | |
233 | .name = "ax88180", | |
234 | .id = -1, | |
235 | .num_resources = ARRAY_SIZE(ax88180_resources), | |
236 | .resource = ax88180_resources, | |
237 | }; | |
238 | #endif | |
239 | ||
1394f032 BW |
240 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
241 | static struct resource sl811_hcd_resources[] = { | |
242 | { | |
243 | .start = 0x20340000, | |
244 | .end = 0x20340000, | |
245 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 246 | }, { |
1394f032 BW |
247 | .start = 0x20340004, |
248 | .end = 0x20340004, | |
249 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 250 | }, { |
1394f032 BW |
251 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
252 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
253 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
254 | }, | |
255 | }; | |
256 | ||
257 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
258 | void sl811_port_power(struct device *dev, int is_on) | |
259 | { | |
c6c4d7bb | 260 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
acbcd263 | 261 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); |
1394f032 BW |
262 | } |
263 | #endif | |
264 | ||
265 | static struct sl811_platform_data sl811_priv = { | |
266 | .potpg = 10, | |
267 | .power = 250, /* == 500mA */ | |
268 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
269 | .port_power = &sl811_port_power, | |
270 | #endif | |
271 | }; | |
272 | ||
273 | static struct platform_device sl811_hcd_device = { | |
274 | .name = "sl811-hcd", | |
275 | .id = 0, | |
276 | .dev = { | |
277 | .platform_data = &sl811_priv, | |
278 | }, | |
279 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
280 | .resource = sl811_hcd_resources, | |
281 | }; | |
282 | #endif | |
283 | ||
284 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
285 | static struct resource isp1362_hcd_resources[] = { | |
286 | { | |
287 | .start = 0x20360000, | |
288 | .end = 0x20360000, | |
289 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 290 | }, { |
1394f032 BW |
291 | .start = 0x20360004, |
292 | .end = 0x20360004, | |
293 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 294 | }, { |
1394f032 BW |
295 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
296 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
297 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
298 | }, | |
299 | }; | |
300 | ||
301 | static struct isp1362_platform_data isp1362_priv = { | |
302 | .sel15Kres = 1, | |
303 | .clknotstop = 0, | |
304 | .oc_enable = 0, | |
305 | .int_act_high = 0, | |
306 | .int_edge_triggered = 0, | |
307 | .remote_wakeup_connected = 0, | |
308 | .no_power_switching = 1, | |
309 | .power_switching_mode = 0, | |
310 | }; | |
311 | ||
312 | static struct platform_device isp1362_hcd_device = { | |
313 | .name = "isp1362-hcd", | |
314 | .id = 0, | |
315 | .dev = { | |
316 | .platform_data = &isp1362_priv, | |
317 | }, | |
318 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
319 | .resource = isp1362_hcd_resources, | |
320 | }; | |
321 | #endif | |
322 | ||
323 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
324 | static struct platform_device bfin_mac_device = { | |
325 | .name = "bfin_mac", | |
326 | }; | |
327 | #endif | |
328 | ||
329 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
330 | static struct resource net2272_bfin_resources[] = { | |
331 | { | |
332 | .start = 0x20300000, | |
333 | .end = 0x20300000 + 0x100, | |
334 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 335 | }, { |
1394f032 BW |
336 | .start = IRQ_PF7, |
337 | .end = IRQ_PF7, | |
338 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
339 | }, | |
340 | }; | |
341 | ||
342 | static struct platform_device net2272_bfin_device = { | |
343 | .name = "net2272", | |
344 | .id = -1, | |
345 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
346 | .resource = net2272_bfin_resources, | |
347 | }; | |
348 | #endif | |
349 | ||
fc68911e MF |
350 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
351 | #ifdef CONFIG_MTD_PARTITIONS | |
352 | const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; | |
353 | ||
354 | static struct mtd_partition bfin_plat_nand_partitions[] = { | |
355 | { | |
aa582977 | 356 | .name = "linux kernel(nand)", |
fc68911e MF |
357 | .size = 0x400000, |
358 | .offset = 0, | |
359 | }, { | |
aa582977 | 360 | .name = "file system(nand)", |
fc68911e MF |
361 | .size = MTDPART_SIZ_FULL, |
362 | .offset = MTDPART_OFS_APPEND, | |
363 | }, | |
364 | }; | |
365 | #endif | |
366 | ||
367 | #define BFIN_NAND_PLAT_CLE 2 | |
368 | #define BFIN_NAND_PLAT_ALE 1 | |
369 | static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) | |
370 | { | |
371 | struct nand_chip *this = mtd->priv; | |
372 | ||
373 | if (cmd == NAND_CMD_NONE) | |
374 | return; | |
375 | ||
376 | if (ctrl & NAND_CLE) | |
377 | writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE)); | |
378 | else | |
379 | writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE)); | |
380 | } | |
381 | ||
382 | #define BFIN_NAND_PLAT_READY GPIO_PF3 | |
383 | static int bfin_plat_nand_dev_ready(struct mtd_info *mtd) | |
384 | { | |
385 | return gpio_get_value(BFIN_NAND_PLAT_READY); | |
386 | } | |
387 | ||
388 | static struct platform_nand_data bfin_plat_nand_data = { | |
389 | .chip = { | |
390 | .chip_delay = 30, | |
391 | #ifdef CONFIG_MTD_PARTITIONS | |
392 | .part_probe_types = part_probes, | |
393 | .partitions = bfin_plat_nand_partitions, | |
394 | .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), | |
395 | #endif | |
396 | }, | |
397 | .ctrl = { | |
398 | .cmd_ctrl = bfin_plat_nand_cmd_ctrl, | |
399 | .dev_ready = bfin_plat_nand_dev_ready, | |
400 | }, | |
401 | }; | |
402 | ||
403 | #define MAX(x, y) (x > y ? x : y) | |
404 | static struct resource bfin_plat_nand_resources = { | |
405 | .start = 0x20212000, | |
406 | .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)), | |
407 | .flags = IORESOURCE_IO, | |
408 | }; | |
409 | ||
410 | static struct platform_device bfin_async_nand_device = { | |
411 | .name = "gen_nand", | |
412 | .id = -1, | |
413 | .num_resources = 1, | |
414 | .resource = &bfin_plat_nand_resources, | |
415 | .dev = { | |
416 | .platform_data = &bfin_plat_nand_data, | |
417 | }, | |
418 | }; | |
419 | ||
420 | static void bfin_plat_nand_init(void) | |
421 | { | |
422 | gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat"); | |
423 | } | |
424 | #else | |
425 | static void bfin_plat_nand_init(void) {} | |
426 | #endif | |
427 | ||
793dc27b | 428 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
de8c43f2 MF |
429 | static struct mtd_partition stamp_partitions[] = { |
430 | { | |
aa582977 | 431 | .name = "bootloader(nor)", |
edf05641 | 432 | .size = 0x40000, |
de8c43f2 MF |
433 | .offset = 0, |
434 | }, { | |
aa582977 | 435 | .name = "linux kernel(nor)", |
de8c43f2 MF |
436 | .size = 0xE0000, |
437 | .offset = MTDPART_OFS_APPEND, | |
438 | }, { | |
aa582977 | 439 | .name = "file system(nor)", |
edf05641 | 440 | .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000, |
de8c43f2 MF |
441 | .offset = MTDPART_OFS_APPEND, |
442 | }, { | |
aa582977 | 443 | .name = "MAC Address(nor)", |
de8c43f2 MF |
444 | .size = MTDPART_SIZ_FULL, |
445 | .offset = 0x3F0000, | |
446 | .mask_flags = MTD_WRITEABLE, | |
447 | } | |
448 | }; | |
449 | ||
450 | static struct physmap_flash_data stamp_flash_data = { | |
451 | .width = 2, | |
452 | .parts = stamp_partitions, | |
453 | .nr_parts = ARRAY_SIZE(stamp_partitions), | |
454 | }; | |
455 | ||
456 | static struct resource stamp_flash_resource = { | |
457 | .start = 0x20000000, | |
458 | .end = 0x203fffff, | |
459 | .flags = IORESOURCE_MEM, | |
460 | }; | |
461 | ||
462 | static struct platform_device stamp_flash_device = { | |
463 | .name = "physmap-flash", | |
464 | .id = 0, | |
465 | .dev = { | |
466 | .platform_data = &stamp_flash_data, | |
467 | }, | |
468 | .num_resources = 1, | |
469 | .resource = &stamp_flash_resource, | |
470 | }; | |
793dc27b | 471 | #endif |
de8c43f2 | 472 | |
1394f032 BW |
473 | #if defined(CONFIG_MTD_M25P80) \ |
474 | || defined(CONFIG_MTD_M25P80_MODULE) | |
475 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
476 | { | |
aa582977 | 477 | .name = "bootloader(spi)", |
edf05641 | 478 | .size = 0x00040000, |
1394f032 BW |
479 | .offset = 0, |
480 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 481 | }, { |
aa582977 | 482 | .name = "linux kernel(spi)", |
1394f032 | 483 | .size = 0xe0000, |
edf05641 | 484 | .offset = MTDPART_OFS_APPEND, |
1f83b8f1 | 485 | }, { |
aa582977 | 486 | .name = "file system(spi)", |
edf05641 MF |
487 | .size = MTDPART_SIZ_FULL, |
488 | .offset = MTDPART_OFS_APPEND, | |
1394f032 BW |
489 | } |
490 | }; | |
491 | ||
492 | static struct flash_platform_data bfin_spi_flash_data = { | |
493 | .name = "m25p80", | |
494 | .parts = bfin_spi_flash_partitions, | |
495 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
88a8078b | 496 | /* .type = "m25p64", */ |
1394f032 BW |
497 | }; |
498 | ||
499 | /* SPI flash chip (m25p64) */ | |
500 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
501 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
502 | .bits_per_word = 8, | |
503 | }; | |
504 | #endif | |
505 | ||
506 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
507 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
508 | /* SPI ADC chip */ | |
509 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
510 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
511 | .bits_per_word = 16, | |
512 | }; | |
513 | #endif | |
514 | ||
515 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
516 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
517 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
518 | .enable_dma = 0, | |
519 | .bits_per_word = 16, | |
520 | }; | |
521 | #endif | |
522 | ||
523 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
524 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
525 | .enable_dma = 0, | |
526 | .bits_per_word = 16, | |
527 | }; | |
528 | #endif | |
529 | ||
f79ea4cb YL |
530 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
531 | #define MMC_SPI_CARD_DETECT_INT IRQ_PF5 | |
532 | ||
533 | static int bfin_mmc_spi_init(struct device *dev, | |
534 | irqreturn_t (*detect_int)(int, void *), void *data) | |
535 | { | |
536 | return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int, | |
537 | IRQF_TRIGGER_FALLING, "mmc-spi-detect", data); | |
538 | } | |
539 | ||
540 | static void bfin_mmc_spi_exit(struct device *dev, void *data) | |
541 | { | |
542 | free_irq(MMC_SPI_CARD_DETECT_INT, data); | |
543 | } | |
544 | ||
545 | static struct mmc_spi_platform_data bfin_mmc_spi_pdata = { | |
546 | .init = bfin_mmc_spi_init, | |
547 | .exit = bfin_mmc_spi_exit, | |
548 | .detect_delay = 100, /* msecs */ | |
549 | }; | |
550 | ||
551 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | |
552 | .enable_dma = 0, | |
553 | .bits_per_word = 8, | |
554 | }; | |
555 | #endif | |
556 | ||
1394f032 BW |
557 | #if defined(CONFIG_PBX) |
558 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
559 | .ctl_reg = 0x4, /* send zero */ | |
560 | .enable_dma = 0, | |
561 | .bits_per_word = 8, | |
562 | .cs_change_per_word = 1, | |
563 | }; | |
564 | #endif | |
565 | ||
1394f032 | 566 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
46aa04f9 | 567 | #include <linux/spi/ad7877.h> |
1394f032 | 568 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { |
1394f032 BW |
569 | .enable_dma = 0, |
570 | .bits_per_word = 16, | |
571 | }; | |
572 | ||
573 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
574 | .model = 7877, | |
575 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
576 | .x_plate_ohms = 419, | |
577 | .y_plate_ohms = 486, | |
578 | .pressure_max = 1000, | |
579 | .pressure_min = 0, | |
580 | .stopacq_polarity = 1, | |
581 | .first_conversion_delay = 3, | |
582 | .acquisition_time = 1, | |
583 | .averaging = 1, | |
584 | .pen_down_acc_interval = 1, | |
585 | }; | |
586 | #endif | |
587 | ||
46aa04f9 MH |
588 | #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) |
589 | #include <linux/spi/ad7879.h> | |
46aa04f9 MH |
590 | static const struct ad7879_platform_data bfin_ad7879_ts_info = { |
591 | .model = 7879, /* Model = AD7879 */ | |
592 | .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ | |
593 | .pressure_max = 10000, | |
594 | .pressure_min = 0, | |
595 | .first_conversion_delay = 3, /* wait 512us before do a first conversion */ | |
596 | .acquisition_time = 1, /* 4us acquisition time per sample */ | |
597 | .median = 2, /* do 8 measurements */ | |
598 | .averaging = 1, /* take the average of 4 middle samples */ | |
599 | .pen_down_acc_interval = 255, /* 9.4 ms */ | |
600 | .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ | |
601 | .gpio_default = 1, /* During initialization set GPIO = HIGH */ | |
602 | }; | |
603 | #endif | |
604 | ||
f5150155 MH |
605 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
606 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | |
607 | .enable_dma = 0, | |
608 | .bits_per_word = 16, | |
609 | }; | |
610 | #endif | |
611 | ||
6e668936 MH |
612 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
613 | static struct bfin5xx_spi_chip spidev_chip_info = { | |
614 | .enable_dma = 0, | |
615 | .bits_per_word = 8, | |
616 | }; | |
617 | #endif | |
618 | ||
2043f3f7 MH |
619 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
620 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { | |
621 | .enable_dma = 0, | |
622 | .bits_per_word = 8, | |
623 | }; | |
624 | #endif | |
625 | ||
8e9d5c7d MH |
626 | #if defined(CONFIG_MTD_DATAFLASH) \ |
627 | || defined(CONFIG_MTD_DATAFLASH_MODULE) | |
ceac2651 MH |
628 | |
629 | static struct mtd_partition bfin_spi_dataflash_partitions[] = { | |
630 | { | |
631 | .name = "bootloader(spi)", | |
632 | .size = 0x00040000, | |
633 | .offset = 0, | |
634 | .mask_flags = MTD_CAP_ROM | |
635 | }, { | |
636 | .name = "linux kernel(spi)", | |
637 | .size = 0xe0000, | |
638 | .offset = MTDPART_OFS_APPEND, | |
639 | }, { | |
640 | .name = "file system(spi)", | |
641 | .size = MTDPART_SIZ_FULL, | |
642 | .offset = MTDPART_OFS_APPEND, | |
643 | } | |
644 | }; | |
645 | ||
646 | static struct flash_platform_data bfin_spi_dataflash_data = { | |
647 | .name = "SPI Dataflash", | |
648 | .parts = bfin_spi_dataflash_partitions, | |
649 | .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions), | |
650 | }; | |
651 | ||
8e9d5c7d MH |
652 | /* DataFlash chip */ |
653 | static struct bfin5xx_spi_chip data_flash_chip_info = { | |
654 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
655 | .bits_per_word = 8, | |
656 | }; | |
657 | #endif | |
658 | ||
1394f032 BW |
659 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
660 | #if defined(CONFIG_MTD_M25P80) \ | |
661 | || defined(CONFIG_MTD_M25P80_MODULE) | |
662 | { | |
663 | /* the modalias must be the same as spi device driver name */ | |
664 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
665 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 666 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
667 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
668 | .platform_data = &bfin_spi_flash_data, | |
669 | .controller_data = &spi_flash_chip_info, | |
670 | .mode = SPI_MODE_3, | |
671 | }, | |
672 | #endif | |
8e9d5c7d MH |
673 | #if defined(CONFIG_MTD_DATAFLASH) \ |
674 | || defined(CONFIG_MTD_DATAFLASH_MODULE) | |
675 | { /* DataFlash chip */ | |
676 | .modalias = "mtd_dataflash", | |
ceac2651 | 677 | .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */ |
8e9d5c7d MH |
678 | .bus_num = 0, /* Framework bus number */ |
679 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ | |
ceac2651 | 680 | .platform_data = &bfin_spi_dataflash_data, |
8e9d5c7d MH |
681 | .controller_data = &data_flash_chip_info, |
682 | .mode = SPI_MODE_3, | |
683 | }, | |
684 | #endif | |
1394f032 BW |
685 | #if defined(CONFIG_SPI_ADC_BF533) \ |
686 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
687 | { | |
688 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
689 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 690 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
691 | .chip_select = 1, /* Framework chip select. */ |
692 | .platform_data = NULL, /* No spi_driver specific config */ | |
693 | .controller_data = &spi_adc_chip_info, | |
694 | }, | |
695 | #endif | |
696 | ||
697 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
698 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
699 | { | |
700 | .modalias = "ad1836-spi", | |
701 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 702 | .bus_num = 0, |
1394f032 BW |
703 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
704 | .controller_data = &ad1836_spi_chip_info, | |
705 | }, | |
706 | #endif | |
707 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
708 | { | |
709 | .modalias = "ad9960-spi", | |
710 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 711 | .bus_num = 0, |
1394f032 BW |
712 | .chip_select = 1, |
713 | .controller_data = &ad9960_spi_chip_info, | |
714 | }, | |
715 | #endif | |
f79ea4cb YL |
716 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
717 | { | |
718 | .modalias = "mmc_spi", | |
719 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | |
720 | .bus_num = 0, | |
721 | .chip_select = 4, | |
722 | .platform_data = &bfin_mmc_spi_pdata, | |
723 | .controller_data = &mmc_spi_chip_info, | |
724 | .mode = SPI_MODE_3, | |
725 | }, | |
726 | #endif | |
1394f032 BW |
727 | #if defined(CONFIG_PBX) |
728 | { | |
1f83b8f1 MF |
729 | .modalias = "fxs-spi", |
730 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
731 | .bus_num = 0, |
732 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 733 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
734 | .mode = SPI_MODE_3, |
735 | }, | |
736 | { | |
1f83b8f1 MF |
737 | .modalias = "fxo-spi", |
738 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
739 | .bus_num = 0, |
740 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 741 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
742 | .mode = SPI_MODE_3, |
743 | }, | |
744 | #endif | |
1394f032 BW |
745 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
746 | { | |
747 | .modalias = "ad7877", | |
748 | .platform_data = &bfin_ad7877_ts_info, | |
749 | .irq = IRQ_PF6, | |
750 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c7d48966 | 751 | .bus_num = 0, |
1394f032 BW |
752 | .chip_select = 1, |
753 | .controller_data = &spi_ad7877_chip_info, | |
754 | }, | |
755 | #endif | |
f5150155 | 756 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
46aa04f9 MH |
757 | { |
758 | .modalias = "ad7879", | |
759 | .platform_data = &bfin_ad7879_ts_info, | |
760 | .irq = IRQ_PF7, | |
761 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | |
762 | .bus_num = 0, | |
763 | .chip_select = 1, | |
764 | .controller_data = &spi_ad7879_chip_info, | |
765 | .mode = SPI_CPHA | SPI_CPOL, | |
766 | }, | |
767 | #endif | |
6e668936 MH |
768 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
769 | { | |
770 | .modalias = "spidev", | |
771 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
772 | .bus_num = 0, | |
773 | .chip_select = 1, | |
774 | .controller_data = &spidev_chip_info, | |
775 | }, | |
776 | #endif | |
2043f3f7 MH |
777 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
778 | { | |
779 | .modalias = "bfin-lq035q1-spi", | |
780 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | |
781 | .bus_num = 0, | |
46aa04f9 | 782 | .chip_select = 2, |
2043f3f7 MH |
783 | .controller_data = &lq035q1_spi_chip_info, |
784 | .mode = SPI_CPHA | SPI_CPOL, | |
785 | }, | |
786 | #endif | |
1394f032 BW |
787 | }; |
788 | ||
5bda2723 | 789 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
1394f032 | 790 | /* SPI controller data */ |
c6c4d7bb | 791 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
792 | .num_chipselect = 8, |
793 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 794 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
795 | }; |
796 | ||
c6c4d7bb BW |
797 | /* SPI (0) */ |
798 | static struct resource bfin_spi0_resource[] = { | |
799 | [0] = { | |
800 | .start = SPI0_REGBASE, | |
801 | .end = SPI0_REGBASE + 0xFF, | |
802 | .flags = IORESOURCE_MEM, | |
803 | }, | |
804 | [1] = { | |
805 | .start = CH_SPI, | |
806 | .end = CH_SPI, | |
807 | .flags = IORESOURCE_IRQ, | |
808 | }, | |
809 | }; | |
810 | ||
811 | static struct platform_device bfin_spi0_device = { | |
812 | .name = "bfin-spi", | |
813 | .id = 0, /* Bus number */ | |
814 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
815 | .resource = bfin_spi0_resource, | |
1394f032 | 816 | .dev = { |
c6c4d7bb | 817 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
818 | }, |
819 | }; | |
820 | #endif /* spi master and devices */ | |
821 | ||
822 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
823 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb BW |
824 | .name = "bf537-lq035", |
825 | }; | |
826 | #endif | |
827 | ||
828 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | |
829 | static struct platform_device bfin_fb_adv7393_device = { | |
830 | .name = "bfin-adv7393", | |
1394f032 BW |
831 | }; |
832 | #endif | |
833 | ||
2043f3f7 MH |
834 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
835 | #include <asm/bfin-lq035q1.h> | |
836 | ||
837 | static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { | |
838 | .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, | |
46aa04f9 | 839 | .use_bl = 0, /* let something else control the LCD Blacklight */ |
2043f3f7 MH |
840 | .gpio_bl = GPIO_PF7, |
841 | }; | |
842 | ||
843 | static struct resource bfin_lq035q1_resources[] = { | |
844 | { | |
845 | .start = IRQ_PPI_ERROR, | |
846 | .end = IRQ_PPI_ERROR, | |
847 | .flags = IORESOURCE_IRQ, | |
848 | }, | |
849 | }; | |
850 | ||
851 | static struct platform_device bfin_lq035q1_device = { | |
852 | .name = "bfin-lq035q1", | |
853 | .id = -1, | |
854 | .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), | |
855 | .resource = bfin_lq035q1_resources, | |
856 | .dev = { | |
857 | .platform_data = &bfin_lq035q1_data, | |
858 | }, | |
859 | }; | |
860 | #endif | |
861 | ||
1394f032 BW |
862 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
863 | static struct resource bfin_uart_resources[] = { | |
233b28a9 | 864 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
1394f032 BW |
865 | { |
866 | .start = 0xFFC00400, | |
867 | .end = 0xFFC004FF, | |
868 | .flags = IORESOURCE_MEM, | |
233b28a9 SZ |
869 | }, |
870 | #endif | |
871 | #ifdef CONFIG_SERIAL_BFIN_UART1 | |
872 | { | |
1394f032 BW |
873 | .start = 0xFFC02000, |
874 | .end = 0xFFC020FF, | |
875 | .flags = IORESOURCE_MEM, | |
876 | }, | |
233b28a9 | 877 | #endif |
1394f032 BW |
878 | }; |
879 | ||
880 | static struct platform_device bfin_uart_device = { | |
881 | .name = "bfin-uart", | |
882 | .id = 1, | |
883 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
884 | .resource = bfin_uart_resources, | |
885 | }; | |
886 | #endif | |
887 | ||
5be36d22 GY |
888 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
889 | static struct resource bfin_sir_resources[] = { | |
890 | #ifdef CONFIG_BFIN_SIR0 | |
891 | { | |
892 | .start = 0xFFC00400, | |
893 | .end = 0xFFC004FF, | |
894 | .flags = IORESOURCE_MEM, | |
895 | }, | |
896 | #endif | |
897 | #ifdef CONFIG_BFIN_SIR1 | |
898 | { | |
899 | .start = 0xFFC02000, | |
900 | .end = 0xFFC020FF, | |
901 | .flags = IORESOURCE_MEM, | |
902 | }, | |
903 | #endif | |
904 | }; | |
905 | ||
906 | static struct platform_device bfin_sir_device = { | |
907 | .name = "bfin_sir", | |
908 | .id = 0, | |
909 | .num_resources = ARRAY_SIZE(bfin_sir_resources), | |
910 | .resource = bfin_sir_resources, | |
911 | }; | |
912 | #endif | |
913 | ||
1394f032 | 914 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
c6c4d7bb BW |
915 | static struct resource bfin_twi0_resource[] = { |
916 | [0] = { | |
917 | .start = TWI0_REGBASE, | |
918 | .end = TWI0_REGBASE, | |
919 | .flags = IORESOURCE_MEM, | |
920 | }, | |
921 | [1] = { | |
922 | .start = IRQ_TWI, | |
923 | .end = IRQ_TWI, | |
924 | .flags = IORESOURCE_IRQ, | |
925 | }, | |
926 | }; | |
927 | ||
1394f032 BW |
928 | static struct platform_device i2c_bfin_twi_device = { |
929 | .name = "i2c-bfin-twi", | |
930 | .id = 0, | |
c6c4d7bb BW |
931 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
932 | .resource = bfin_twi0_resource, | |
1394f032 BW |
933 | }; |
934 | #endif | |
935 | ||
81d9c7f2 BW |
936 | #ifdef CONFIG_I2C_BOARDINFO |
937 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |
938 | #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) | |
939 | { | |
940 | I2C_BOARD_INFO("ad7142_joystick", 0x2C), | |
f5150155 | 941 | .irq = IRQ_PF5, |
81d9c7f2 BW |
942 | }, |
943 | #endif | |
944 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | |
945 | { | |
946 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | |
81d9c7f2 BW |
947 | }, |
948 | #endif | |
949 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) | |
950 | { | |
951 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), | |
f5150155 MH |
952 | .irq = IRQ_PG6, |
953 | }, | |
954 | #endif | |
955 | #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE) | |
956 | { | |
957 | I2C_BOARD_INFO("ad7879", 0x2F), | |
958 | .irq = IRQ_PG5, | |
959 | .platform_data = (void *)&bfin_ad7879_ts_info, | |
81d9c7f2 BW |
960 | }, |
961 | #endif | |
962 | }; | |
963 | #endif | |
964 | ||
1394f032 BW |
965 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
966 | static struct platform_device bfin_sport0_uart_device = { | |
967 | .name = "bfin-sport-uart", | |
968 | .id = 0, | |
969 | }; | |
970 | ||
971 | static struct platform_device bfin_sport1_uart_device = { | |
972 | .name = "bfin-sport-uart", | |
973 | .id = 1, | |
974 | }; | |
975 | #endif | |
976 | ||
c6c4d7bb | 977 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
96b86e94 | 978 | #define PATA_INT IRQ_PF5 |
c6c4d7bb BW |
979 | |
980 | static struct pata_platform_info bfin_pata_platform_data = { | |
981 | .ioport_shift = 1, | |
64e5c512 | 982 | .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED, |
c6c4d7bb BW |
983 | }; |
984 | ||
985 | static struct resource bfin_pata_resources[] = { | |
986 | { | |
987 | .start = 0x20314020, | |
988 | .end = 0x2031403F, | |
989 | .flags = IORESOURCE_MEM, | |
990 | }, | |
991 | { | |
992 | .start = 0x2031401C, | |
993 | .end = 0x2031401F, | |
994 | .flags = IORESOURCE_MEM, | |
995 | }, | |
996 | { | |
997 | .start = PATA_INT, | |
998 | .end = PATA_INT, | |
999 | .flags = IORESOURCE_IRQ, | |
1000 | }, | |
1001 | }; | |
1002 | ||
1003 | static struct platform_device bfin_pata_device = { | |
1004 | .name = "pata_platform", | |
1005 | .id = -1, | |
1006 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
1007 | .resource = bfin_pata_resources, | |
1008 | .dev = { | |
1009 | .platform_data = &bfin_pata_platform_data, | |
1010 | } | |
1011 | }; | |
1012 | #endif | |
1013 | ||
14b03204 MH |
1014 | static const unsigned int cclk_vlev_datasheet[] = |
1015 | { | |
1016 | VRPAIR(VLEV_085, 250000000), | |
1017 | VRPAIR(VLEV_090, 376000000), | |
1018 | VRPAIR(VLEV_095, 426000000), | |
1019 | VRPAIR(VLEV_100, 426000000), | |
1020 | VRPAIR(VLEV_105, 476000000), | |
1021 | VRPAIR(VLEV_110, 476000000), | |
1022 | VRPAIR(VLEV_115, 476000000), | |
1023 | VRPAIR(VLEV_120, 500000000), | |
1024 | VRPAIR(VLEV_125, 533000000), | |
1025 | VRPAIR(VLEV_130, 600000000), | |
1026 | }; | |
1027 | ||
1028 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | |
1029 | .tuple_tab = cclk_vlev_datasheet, | |
1030 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | |
1031 | .vr_settling_time = 25 /* us */, | |
1032 | }; | |
1033 | ||
1034 | static struct platform_device bfin_dpmc = { | |
1035 | .name = "bfin dpmc", | |
1036 | .dev = { | |
1037 | .platform_data = &bfin_dmpc_vreg_data, | |
1038 | }, | |
1039 | }; | |
1040 | ||
1394f032 | 1041 | static struct platform_device *stamp_devices[] __initdata = { |
14b03204 MH |
1042 | |
1043 | &bfin_dpmc, | |
1044 | ||
1394f032 BW |
1045 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
1046 | &bfin_pcmcia_cf_device, | |
1047 | #endif | |
1048 | ||
1049 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
1050 | &rtc_device, | |
1051 | #endif | |
1052 | ||
1053 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
1054 | &sl811_hcd_device, | |
1055 | #endif | |
1056 | ||
1057 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
1058 | &isp1362_hcd_device, | |
1059 | #endif | |
1060 | ||
3f375690 MH |
1061 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
1062 | &bfin_isp1760_device, | |
1063 | #endif | |
1064 | ||
1394f032 BW |
1065 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
1066 | &smc91x_device, | |
1067 | #endif | |
1068 | ||
f40d24d9 AL |
1069 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
1070 | &dm9000_device, | |
1071 | #endif | |
1072 | ||
561cc18b MH |
1073 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
1074 | &ax88180_device, | |
1075 | #endif | |
1076 | ||
1394f032 BW |
1077 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
1078 | &bfin_mac_device, | |
1079 | #endif | |
1080 | ||
1081 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
1082 | &net2272_bfin_device, | |
1083 | #endif | |
1084 | ||
1085 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 1086 | &bfin_spi0_device, |
1394f032 BW |
1087 | #endif |
1088 | ||
1089 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
1090 | &bfin_fb_device, | |
1091 | #endif | |
1092 | ||
2043f3f7 MH |
1093 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
1094 | &bfin_lq035q1_device, | |
1095 | #endif | |
1096 | ||
c6c4d7bb BW |
1097 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
1098 | &bfin_fb_adv7393_device, | |
1099 | #endif | |
1100 | ||
1394f032 BW |
1101 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
1102 | &bfin_uart_device, | |
1103 | #endif | |
1104 | ||
5be36d22 GY |
1105 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
1106 | &bfin_sir_device, | |
1107 | #endif | |
1108 | ||
1394f032 BW |
1109 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
1110 | &i2c_bfin_twi_device, | |
1111 | #endif | |
1112 | ||
1113 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
1114 | &bfin_sport0_uart_device, | |
1115 | &bfin_sport1_uart_device, | |
1116 | #endif | |
c6c4d7bb BW |
1117 | |
1118 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
1119 | &bfin_pata_device, | |
1120 | #endif | |
2463ef22 MH |
1121 | |
1122 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | |
1123 | &bfin_device_gpiokeys, | |
1124 | #endif | |
cad2ab65 MF |
1125 | |
1126 | &bfin_gpios_device, | |
793dc27b | 1127 | |
fc68911e MF |
1128 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) |
1129 | &bfin_async_nand_device, | |
1130 | #endif | |
1131 | ||
793dc27b | 1132 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
de8c43f2 | 1133 | &stamp_flash_device, |
793dc27b | 1134 | #endif |
1394f032 BW |
1135 | }; |
1136 | ||
1137 | static int __init stamp_init(void) | |
1138 | { | |
b85d858b | 1139 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
81d9c7f2 BW |
1140 | |
1141 | #ifdef CONFIG_I2C_BOARDINFO | |
1142 | i2c_register_board_info(0, bfin_i2c_board_info, | |
1143 | ARRAY_SIZE(bfin_i2c_board_info)); | |
1144 | #endif | |
1145 | ||
fc68911e | 1146 | bfin_plat_nand_init(); |
1394f032 | 1147 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
5bda2723 | 1148 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
c6c4d7bb BW |
1149 | |
1150 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
1151 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
1152 | #endif | |
81d9c7f2 | 1153 | |
1394f032 BW |
1154 | return 0; |
1155 | } | |
1156 | ||
1157 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
1158 | |
1159 | void native_machine_restart(char *cmd) | |
1160 | { | |
1161 | /* workaround reboot hang when booting from SPI */ | |
1162 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | |
1163 | bfin_gpio_reset_spi0_ssel1(); | |
1164 | } | |
137b1529 MF |
1165 | |
1166 | /* | |
1167 | * Currently the MAC address is saved in Flash by U-Boot | |
1168 | */ | |
1169 | #define FLASH_MAC 0x203f0000 | |
9862cc52 | 1170 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
1171 | { |
1172 | *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); | |
1173 | *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); | |
1174 | } | |
9862cc52 | 1175 | EXPORT_SYMBOL(bfin_get_ether_addr); |