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Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf537 / boards / stamp.c
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1394f032
BW		 1/*
2 * File: arch/blackfin/mach-bf537/boards/stamp.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
de8c43f2 35#include <linux/mtd/physmap.h>
1394f032
BW		 36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 39#include <linux/usb/isp1362.h>
1394f032 40#endif
c6c4d7bb 41#include <linux/pata_platform.h>
1394f032
BW		 42#include <linux/irq.h>
43#include <linux/interrupt.h>
27f5d75a 44#include <linux/usb/sl811.h>
c6c4d7bb 45#include <asm/dma.h>
1f83b8f1 46#include <asm/bfin5xx_spi.h>
c6c4d7bb 47#include <asm/reboot.h>
5d448dd5 48#include <asm/portmux.h>
1394f032
BW		 49#include <linux/spi/ad7877.h>
50
51/*
52 * Name the Board for the /proc/cpuinfo
53 */
066954a3 54const char bfin_board_name[] = "ADDS-BF537-STAMP";
1394f032
BW		 55
56/*
57 * Driver needs to know address, irq and flag pin.
58 */
59
60#define ISP1761_BASE 0x203C0000
61#define ISP1761_IRQ IRQ_PF7
62
63#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
64static struct resource bfin_isp1761_resources[] = {
65 [0] = {
66 .name = "isp1761-regs",
67 .start = ISP1761_BASE + 0x00000000,
68 .end = ISP1761_BASE + 0x000fffff,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = ISP1761_IRQ,
73 .end = ISP1761_IRQ,
74 .flags = IORESOURCE_IRQ,
75 },
76};
77
78static struct platform_device bfin_isp1761_device = {
79 .name = "isp1761",
80 .id = 0,
81 .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
82 .resource = bfin_isp1761_resources,
83};
84
85static struct platform_device *bfin_isp1761_devices[] = {
86 &bfin_isp1761_device,
87};
88
89int __init bfin_isp1761_init(void)
90{
1f83b8f1 91 unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
1394f032
BW		 92
93 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
94 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
95
96 return platform_add_devices(bfin_isp1761_devices, num_devices);
97}
98
99void __exit bfin_isp1761_exit(void)
100{
101 platform_device_unregister(&bfin_isp1761_device);
102}
103
104arch_initcall(bfin_isp1761_init);
105#endif
106
2463ef22
MH		 107#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
108#include <linux/input.h>
109#include <linux/gpio_keys.h>
110
111static struct gpio_keys_button bfin_gpio_keys_table[] = {
112 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
113 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
114 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
115 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
116};
117
118static struct gpio_keys_platform_data bfin_gpio_keys_data = {
119 .buttons = bfin_gpio_keys_table,
120 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
121};
122
123static struct platform_device bfin_device_gpiokeys = {
124 .name = "gpio-keys",
125 .dev = {
126 .platform_data = &bfin_gpio_keys_data,
127 },
128};
129#endif
130
1394f032
BW		 131#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
132static struct resource bfin_pcmcia_cf_resources[] = {
133 {
134 .start = 0x20310000, /* IO PORT */
135 .end = 0x20312000,
136 .flags = IORESOURCE_MEM,
1f83b8f1 137 }, {
d2d50aa9 138 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 139 .end = 0x20311FFF,
140 .flags = IORESOURCE_MEM,
1f83b8f1 141 }, {
1394f032
BW		 142 .start = IRQ_PF4,
143 .end = IRQ_PF4,
144 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 145 }, {
1394f032
BW		 146 .start = 6, /* Card Detect PF6 */
147 .end = 6,
148 .flags = IORESOURCE_IRQ,
149 },
150};
151
152static struct platform_device bfin_pcmcia_cf_device = {
153 .name = "bfin_cf_pcmcia",
154 .id = -1,
155 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
156 .resource = bfin_pcmcia_cf_resources,
157};
158#endif
159
160#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
161static struct platform_device rtc_device = {
162 .name = "rtc-bfin",
163 .id = -1,
164};
165#endif
166
167#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
168static struct resource smc91x_resources[] = {
169 {
170 .name = "smc91x-regs",
171 .start = 0x20300300,
172 .end = 0x20300300 + 16,
173 .flags = IORESOURCE_MEM,
1f83b8f1 174 }, {
1394f032
BW		 175
176 .start = IRQ_PF7,
177 .end = IRQ_PF7,
178 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
179 },
180};
181static struct platform_device smc91x_device = {
182 .name = "smc91x",
183 .id = 0,
184 .num_resources = ARRAY_SIZE(smc91x_resources),
185 .resource = smc91x_resources,
186};
187#endif
188
f40d24d9
AL		 189#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
190static struct resource dm9000_resources[] = {
191 [0] = {
192 .start = 0x203FB800,
193 .end = 0x203FB800 + 8,
194 .flags = IORESOURCE_MEM,
195 },
196 [1] = {
197 .start = IRQ_PF9,
198 .end = IRQ_PF9,
199 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
200 },
201};
202
203static struct platform_device dm9000_device = {
204 .name = "dm9000",
205 .id = -1,
206 .num_resources = ARRAY_SIZE(dm9000_resources),
207 .resource = dm9000_resources,
208};
209#endif
210
561cc18b
MH		 211#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
212static struct resource ax88180_resources[] = {
213 [0] = {
214 .start = 0x20300000,
215 .end = 0x20300000 + 0x8000,
216 .flags = IORESOURCE_MEM,
217 },
218 [1] = {
219 .start = IRQ_PF7,
220 .end = IRQ_PF7,
221 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
222 },
223};
224
225static struct platform_device ax88180_device = {
226 .name = "ax88180",
227 .id = -1,
228 .num_resources = ARRAY_SIZE(ax88180_resources),
229 .resource = ax88180_resources,
230};
231#endif
232
1394f032
BW		 233#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
234static struct resource sl811_hcd_resources[] = {
235 {
236 .start = 0x20340000,
237 .end = 0x20340000,
238 .flags = IORESOURCE_MEM,
1f83b8f1 239 }, {
1394f032
BW		 240 .start = 0x20340004,
241 .end = 0x20340004,
242 .flags = IORESOURCE_MEM,
1f83b8f1 243 }, {
1394f032
BW		 244 .start = CONFIG_USB_SL811_BFIN_IRQ,
245 .end = CONFIG_USB_SL811_BFIN_IRQ,
246 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
247 },
248};
249
250#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
251void sl811_port_power(struct device *dev, int is_on)
252{
c6c4d7bb 253 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 254 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 255}
256#endif
257
258static struct sl811_platform_data sl811_priv = {
259 .potpg = 10,
260 .power = 250, /* == 500mA */
261#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
262 .port_power = &sl811_port_power,
263#endif
264};
265
266static struct platform_device sl811_hcd_device = {
267 .name = "sl811-hcd",
268 .id = 0,
269 .dev = {
270 .platform_data = &sl811_priv,
271 },
272 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
273 .resource = sl811_hcd_resources,
274};
275#endif
276
277#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
278static struct resource isp1362_hcd_resources[] = {
279 {
280 .start = 0x20360000,
281 .end = 0x20360000,
282 .flags = IORESOURCE_MEM,
1f83b8f1 283 }, {
1394f032
BW		 284 .start = 0x20360004,
285 .end = 0x20360004,
286 .flags = IORESOURCE_MEM,
1f83b8f1 287 }, {
1394f032
BW		 288 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
289 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
290 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
291 },
292};
293
294static struct isp1362_platform_data isp1362_priv = {
295 .sel15Kres = 1,
296 .clknotstop = 0,
297 .oc_enable = 0,
298 .int_act_high = 0,
299 .int_edge_triggered = 0,
300 .remote_wakeup_connected = 0,
301 .no_power_switching = 1,
302 .power_switching_mode = 0,
303};
304
305static struct platform_device isp1362_hcd_device = {
306 .name = "isp1362-hcd",
307 .id = 0,
308 .dev = {
309 .platform_data = &isp1362_priv,
310 },
311 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
312 .resource = isp1362_hcd_resources,
313};
314#endif
315
316#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
317static struct platform_device bfin_mac_device = {
318 .name = "bfin_mac",
319};
320#endif
321
322#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
323static struct resource net2272_bfin_resources[] = {
324 {
325 .start = 0x20300000,
326 .end = 0x20300000 + 0x100,
327 .flags = IORESOURCE_MEM,
1f83b8f1 328 }, {
1394f032
BW		 329 .start = IRQ_PF7,
330 .end = IRQ_PF7,
331 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
332 },
333};
334
335static struct platform_device net2272_bfin_device = {
336 .name = "net2272",
337 .id = -1,
338 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
339 .resource = net2272_bfin_resources,
340};
341#endif
342
de8c43f2
MF		 343static struct mtd_partition stamp_partitions[] = {
344 {
345 .name = "Bootloader",
346 .size = 0x20000,
347 .offset = 0,
348 }, {
349 .name = "Kernel",
350 .size = 0xE0000,
351 .offset = MTDPART_OFS_APPEND,
352 }, {
353 .name = "RootFS",
354 .size = 0x400000 - 0x20000 - 0xE0000 - 0x10000,
355 .offset = MTDPART_OFS_APPEND,
356 }, {
357 .name = "MAC Address",
358 .size = MTDPART_SIZ_FULL,
359 .offset = 0x3F0000,
360 .mask_flags = MTD_WRITEABLE,
361 }
362};
363
364static struct physmap_flash_data stamp_flash_data = {
365 .width = 2,
366 .parts = stamp_partitions,
367 .nr_parts = ARRAY_SIZE(stamp_partitions),
368};
369
370static struct resource stamp_flash_resource = {
371 .start = 0x20000000,
372 .end = 0x203fffff,
373 .flags = IORESOURCE_MEM,
374};
375
376static struct platform_device stamp_flash_device = {
377 .name = "physmap-flash",
378 .id = 0,
379 .dev = {
380 .platform_data = &stamp_flash_data,
381 },
382 .num_resources = 1,
383 .resource = &stamp_flash_resource,
384};
385
1394f032
BW		 386#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
387/* all SPI peripherals info goes here */
388
389#if defined(CONFIG_MTD_M25P80) \
390 || defined(CONFIG_MTD_M25P80_MODULE)
391static struct mtd_partition bfin_spi_flash_partitions[] = {
392 {
393 .name = "bootloader",
394 .size = 0x00020000,
395 .offset = 0,
396 .mask_flags = MTD_CAP_ROM
1f83b8f1 397 }, {
1394f032
BW		 398 .name = "kernel",
399 .size = 0xe0000,
400 .offset = 0x20000
1f83b8f1 401 }, {
1394f032
BW		 402 .name = "file system",
403 .size = 0x700000,
404 .offset = 0x00100000,
405 }
406};
407
408static struct flash_platform_data bfin_spi_flash_data = {
409 .name = "m25p80",
410 .parts = bfin_spi_flash_partitions,
411 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
412 .type = "m25p64",
413};
414
415/* SPI flash chip (m25p64) */
416static struct bfin5xx_spi_chip spi_flash_chip_info = {
417 .enable_dma = 0, /* use dma transfer with this chip*/
418 .bits_per_word = 8,
419};
420#endif
421
422#if defined(CONFIG_SPI_ADC_BF533) \
423 || defined(CONFIG_SPI_ADC_BF533_MODULE)
424/* SPI ADC chip */
425static struct bfin5xx_spi_chip spi_adc_chip_info = {
426 .enable_dma = 1, /* use dma transfer with this chip*/
427 .bits_per_word = 16,
428};
429#endif
430
431#if defined(CONFIG_SND_BLACKFIN_AD1836) \
432 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
433static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
434 .enable_dma = 0,
435 .bits_per_word = 16,
436};
437#endif
438
439#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
440static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
441 .enable_dma = 0,
442 .bits_per_word = 16,
443};
444#endif
445
446#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
447static struct bfin5xx_spi_chip spi_mmc_chip_info = {
448 .enable_dma = 1,
449 .bits_per_word = 8,
450};
451#endif
452
453#if defined(CONFIG_PBX)
454static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
455 .ctl_reg = 0x4, /* send zero */
456 .enable_dma = 0,
457 .bits_per_word = 8,
458 .cs_change_per_word = 1,
459};
460#endif
461
462#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
463static struct bfin5xx_spi_chip ad5304_chip_info = {
464 .enable_dma = 0,
465 .bits_per_word = 16,
466};
467#endif
468
469#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
470static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 471 .enable_dma = 0,
472 .bits_per_word = 16,
473};
474
475static const struct ad7877_platform_data bfin_ad7877_ts_info = {
476 .model = 7877,
477 .vref_delay_usecs = 50, /* internal, no capacitor */
478 .x_plate_ohms = 419,
479 .y_plate_ohms = 486,
480 .pressure_max = 1000,
481 .pressure_min = 0,
482 .stopacq_polarity = 1,
483 .first_conversion_delay = 3,
484 .acquisition_time = 1,
485 .averaging = 1,
486 .pen_down_acc_interval = 1,
487};
488#endif
489
490static struct spi_board_info bfin_spi_board_info[] __initdata = {
491#if defined(CONFIG_MTD_M25P80) \
492 || defined(CONFIG_MTD_M25P80_MODULE)
493 {
494 /* the modalias must be the same as spi device driver name */
495 .modalias = "m25p80", /* Name of spi_driver for this device */
496 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 497 .bus_num = 0, /* Framework bus number */
1394f032
BW		 498 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
499 .platform_data = &bfin_spi_flash_data,
500 .controller_data = &spi_flash_chip_info,
501 .mode = SPI_MODE_3,
502 },
503#endif
504
505#if defined(CONFIG_SPI_ADC_BF533) \
506 || defined(CONFIG_SPI_ADC_BF533_MODULE)
507 {
508 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
509 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 510 .bus_num = 0, /* Framework bus number */
1394f032
BW		 511 .chip_select = 1, /* Framework chip select. */
512 .platform_data = NULL, /* No spi_driver specific config */
513 .controller_data = &spi_adc_chip_info,
514 },
515#endif
516
517#if defined(CONFIG_SND_BLACKFIN_AD1836) \
518 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
519 {
520 .modalias = "ad1836-spi",
521 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 522 .bus_num = 0,
1394f032
BW		 523 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
524 .controller_data = &ad1836_spi_chip_info,
525 },
526#endif
527#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
528 {
529 .modalias = "ad9960-spi",
530 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 531 .bus_num = 0,
1394f032
BW		 532 .chip_select = 1,
533 .controller_data = &ad9960_spi_chip_info,
534 },
535#endif
536#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
537 {
538 .modalias = "spi_mmc_dummy",
111cf97d 539 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 540 .bus_num = 0,
1394f032
BW		 541 .chip_select = 0,
542 .platform_data = NULL,
543 .controller_data = &spi_mmc_chip_info,
544 .mode = SPI_MODE_3,
545 },
546 {
547 .modalias = "spi_mmc",
111cf97d 548 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 549 .bus_num = 0,
1394f032
BW		 550 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
551 .platform_data = NULL,
552 .controller_data = &spi_mmc_chip_info,
553 .mode = SPI_MODE_3,
554 },
555#endif
556#if defined(CONFIG_PBX)
557 {
1f83b8f1
MF		 558 .modalias = "fxs-spi",
559 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb
BW		 560 .bus_num = 0,
561 .chip_select = 8 - CONFIG_J11_JUMPER,
1f83b8f1 562 .controller_data = &spi_si3xxx_chip_info,
1394f032
BW		 563 .mode = SPI_MODE_3,
564 },
565 {
1f83b8f1
MF		 566 .modalias = "fxo-spi",
567 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb
BW		 568 .bus_num = 0,
569 .chip_select = 8 - CONFIG_J19_JUMPER,
1f83b8f1 570 .controller_data = &spi_si3xxx_chip_info,
1394f032
BW		 571 .mode = SPI_MODE_3,
572 },
573#endif
574#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
575 {
576 .modalias = "ad5304_spi",
577 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 578 .bus_num = 0,
1394f032
BW		 579 .chip_select = 2,
580 .platform_data = NULL,
581 .controller_data = &ad5304_chip_info,
582 .mode = SPI_MODE_2,
583 },
584#endif
585#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
586 {
587 .modalias = "ad7877",
588 .platform_data = &bfin_ad7877_ts_info,
589 .irq = IRQ_PF6,
590 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 591 .bus_num = 0,
1394f032
BW		 592 .chip_select = 1,
593 .controller_data = &spi_ad7877_chip_info,
594 },
595#endif
596};
597
598/* SPI controller data */
c6c4d7bb 599static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 600 .num_chipselect = 8,
601 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 602 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 603};
604
c6c4d7bb
BW		 605/* SPI (0) */
606static struct resource bfin_spi0_resource[] = {
607 [0] = {
608 .start = SPI0_REGBASE,
609 .end = SPI0_REGBASE + 0xFF,
610 .flags = IORESOURCE_MEM,
611 },
612 [1] = {
613 .start = CH_SPI,
614 .end = CH_SPI,
615 .flags = IORESOURCE_IRQ,
616 },
617};
618
619static struct platform_device bfin_spi0_device = {
620 .name = "bfin-spi",
621 .id = 0, /* Bus number */
622 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
623 .resource = bfin_spi0_resource,
1394f032 624 .dev = {
c6c4d7bb 625 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 626 },
627};
628#endif /* spi master and devices */
629
630#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
631static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 632 .name = "bf537-lq035",
633};
634#endif
635
636#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
637static struct platform_device bfin_fb_adv7393_device = {
638 .name = "bfin-adv7393",
1394f032
BW		 639};
640#endif
641
642#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
643static struct resource bfin_uart_resources[] = {
233b28a9 644#ifdef CONFIG_SERIAL_BFIN_UART0
1394f032
BW		 645 {
646 .start = 0xFFC00400,
647 .end = 0xFFC004FF,
648 .flags = IORESOURCE_MEM,
233b28a9
SZ		 649 },
650#endif
651#ifdef CONFIG_SERIAL_BFIN_UART1
652 {
1394f032
BW		 653 .start = 0xFFC02000,
654 .end = 0xFFC020FF,
655 .flags = IORESOURCE_MEM,
656 },
233b28a9 657#endif
1394f032
BW		 658};
659
660static struct platform_device bfin_uart_device = {
661 .name = "bfin-uart",
662 .id = 1,
663 .num_resources = ARRAY_SIZE(bfin_uart_resources),
664 .resource = bfin_uart_resources,
665};
666#endif
667
668#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 669static struct resource bfin_twi0_resource[] = {
670 [0] = {
671 .start = TWI0_REGBASE,
672 .end = TWI0_REGBASE,
673 .flags = IORESOURCE_MEM,
674 },
675 [1] = {
676 .start = IRQ_TWI,
677 .end = IRQ_TWI,
678 .flags = IORESOURCE_IRQ,
679 },
680};
681
1394f032
BW		 682static struct platform_device i2c_bfin_twi_device = {
683 .name = "i2c-bfin-twi",
684 .id = 0,
c6c4d7bb
BW		 685 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
686 .resource = bfin_twi0_resource,
1394f032
BW		 687};
688#endif
689
690#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
691static struct platform_device bfin_sport0_uart_device = {
692 .name = "bfin-sport-uart",
693 .id = 0,
694};
695
696static struct platform_device bfin_sport1_uart_device = {
697 .name = "bfin-sport-uart",
698 .id = 1,
699};
700#endif
701
c6c4d7bb
BW		 702#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
703#define PATA_INT 55
704
705static struct pata_platform_info bfin_pata_platform_data = {
706 .ioport_shift = 1,
64e5c512 707 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 708};
709
710static struct resource bfin_pata_resources[] = {
711 {
712 .start = 0x20314020,
713 .end = 0x2031403F,
714 .flags = IORESOURCE_MEM,
715 },
716 {
717 .start = 0x2031401C,
718 .end = 0x2031401F,
719 .flags = IORESOURCE_MEM,
720 },
721 {
722 .start = PATA_INT,
723 .end = PATA_INT,
724 .flags = IORESOURCE_IRQ,
725 },
726};
727
728static struct platform_device bfin_pata_device = {
729 .name = "pata_platform",
730 .id = -1,
731 .num_resources = ARRAY_SIZE(bfin_pata_resources),
732 .resource = bfin_pata_resources,
733 .dev = {
734 .platform_data = &bfin_pata_platform_data,
735 }
736};
737#endif
738
1394f032
BW		 739static struct platform_device *stamp_devices[] __initdata = {
740#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
741 &bfin_pcmcia_cf_device,
742#endif
743
744#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
745 &rtc_device,
746#endif
747
748#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
749 &sl811_hcd_device,
750#endif
751
752#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
753 &isp1362_hcd_device,
754#endif
755
756#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
757 &smc91x_device,
758#endif
759
f40d24d9
AL		 760#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
761 &dm9000_device,
762#endif
763
561cc18b
MH		 764#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
765 &ax88180_device,
766#endif
767
1394f032
BW		 768#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
769 &bfin_mac_device,
770#endif
771
772#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
773 &net2272_bfin_device,
774#endif
775
776#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 777 &bfin_spi0_device,
1394f032
BW		 778#endif
779
780#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
781 &bfin_fb_device,
782#endif
783
c6c4d7bb
BW		 784#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
785 &bfin_fb_adv7393_device,
786#endif
787
1394f032
BW		 788#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
789 &bfin_uart_device,
790#endif
791
792#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
793 &i2c_bfin_twi_device,
794#endif
795
796#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
797 &bfin_sport0_uart_device,
798 &bfin_sport1_uart_device,
799#endif
c6c4d7bb
BW		 800
801#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
802 &bfin_pata_device,
803#endif
2463ef22
MH		 804
805#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
806 &bfin_device_gpiokeys,
807#endif
de8c43f2 808 &stamp_flash_device,
1394f032
BW		 809};
810
811static int __init stamp_init(void)
812{
813 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
814 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
815#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
816 spi_register_board_info(bfin_spi_board_info,
817 ARRAY_SIZE(bfin_spi_board_info));
818#endif
c6c4d7bb
BW		 819
820#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
821 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
822#endif
1394f032
BW		 823 return 0;
824}
825
826arch_initcall(stamp_init);
c6c4d7bb
BW		 827
828void native_machine_restart(char *cmd)
829{
830 /* workaround reboot hang when booting from SPI */
831 if ((bfin_read_SYSCR() & 0x7) == 0x3)
832 bfin_gpio_reset_spi0_ssel1();
833}
137b1529
MF		 834
835/*
836 * Currently the MAC address is saved in Flash by U-Boot
837 */
838#define FLASH_MAC 0x203f0000
9862cc52 839void bfin_get_ether_addr(char *addr)
137b1529
MF		 840{
841 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
842 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
843}
9862cc52 844EXPORT_SYMBOL(bfin_get_ether_addr);
kernel source for telekom puls (alcatel/mediatek)