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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/spi/flash.h> | |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
38 | #include <linux/usb_isp1362.h> | |
39 | #endif | |
c6c4d7bb | 40 | #include <linux/pata_platform.h> |
1394f032 BW |
41 | #include <linux/irq.h> |
42 | #include <linux/interrupt.h> | |
27f5d75a | 43 | #include <linux/usb/sl811.h> |
c6c4d7bb | 44 | #include <asm/dma.h> |
1f83b8f1 | 45 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 46 | #include <asm/reboot.h> |
1394f032 BW |
47 | #include <linux/spi/ad7877.h> |
48 | ||
49 | /* | |
50 | * Name the Board for the /proc/cpuinfo | |
51 | */ | |
066954a3 | 52 | const char bfin_board_name[] = "ADDS-BF537-STAMP"; |
1394f032 BW |
53 | |
54 | /* | |
55 | * Driver needs to know address, irq and flag pin. | |
56 | */ | |
57 | ||
58 | #define ISP1761_BASE 0x203C0000 | |
59 | #define ISP1761_IRQ IRQ_PF7 | |
60 | ||
61 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | |
62 | static struct resource bfin_isp1761_resources[] = { | |
63 | [0] = { | |
64 | .name = "isp1761-regs", | |
65 | .start = ISP1761_BASE + 0x00000000, | |
66 | .end = ISP1761_BASE + 0x000fffff, | |
67 | .flags = IORESOURCE_MEM, | |
68 | }, | |
69 | [1] = { | |
70 | .start = ISP1761_IRQ, | |
71 | .end = ISP1761_IRQ, | |
72 | .flags = IORESOURCE_IRQ, | |
73 | }, | |
74 | }; | |
75 | ||
76 | static struct platform_device bfin_isp1761_device = { | |
77 | .name = "isp1761", | |
78 | .id = 0, | |
79 | .num_resources = ARRAY_SIZE(bfin_isp1761_resources), | |
80 | .resource = bfin_isp1761_resources, | |
81 | }; | |
82 | ||
83 | static struct platform_device *bfin_isp1761_devices[] = { | |
84 | &bfin_isp1761_device, | |
85 | }; | |
86 | ||
87 | int __init bfin_isp1761_init(void) | |
88 | { | |
1f83b8f1 | 89 | unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices); |
1394f032 BW |
90 | |
91 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
92 | set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); | |
93 | ||
94 | return platform_add_devices(bfin_isp1761_devices, num_devices); | |
95 | } | |
96 | ||
97 | void __exit bfin_isp1761_exit(void) | |
98 | { | |
99 | platform_device_unregister(&bfin_isp1761_device); | |
100 | } | |
101 | ||
102 | arch_initcall(bfin_isp1761_init); | |
103 | #endif | |
104 | ||
105 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
106 | static struct resource bfin_pcmcia_cf_resources[] = { | |
107 | { | |
108 | .start = 0x20310000, /* IO PORT */ | |
109 | .end = 0x20312000, | |
110 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 111 | }, { |
d2d50aa9 | 112 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
113 | .end = 0x20311FFF, |
114 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 115 | }, { |
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116 | .start = IRQ_PF4, |
117 | .end = IRQ_PF4, | |
118 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 119 | }, { |
1394f032 BW |
120 | .start = 6, /* Card Detect PF6 */ |
121 | .end = 6, | |
122 | .flags = IORESOURCE_IRQ, | |
123 | }, | |
124 | }; | |
125 | ||
126 | static struct platform_device bfin_pcmcia_cf_device = { | |
127 | .name = "bfin_cf_pcmcia", | |
128 | .id = -1, | |
129 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
130 | .resource = bfin_pcmcia_cf_resources, | |
131 | }; | |
132 | #endif | |
133 | ||
134 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
135 | static struct platform_device rtc_device = { | |
136 | .name = "rtc-bfin", | |
137 | .id = -1, | |
138 | }; | |
139 | #endif | |
140 | ||
141 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
142 | static struct resource smc91x_resources[] = { | |
143 | { | |
144 | .name = "smc91x-regs", | |
145 | .start = 0x20300300, | |
146 | .end = 0x20300300 + 16, | |
147 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 148 | }, { |
1394f032 BW |
149 | |
150 | .start = IRQ_PF7, | |
151 | .end = IRQ_PF7, | |
152 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
153 | }, | |
154 | }; | |
155 | static struct platform_device smc91x_device = { | |
156 | .name = "smc91x", | |
157 | .id = 0, | |
158 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
159 | .resource = smc91x_resources, | |
160 | }; | |
161 | #endif | |
162 | ||
f40d24d9 AL |
163 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
164 | static struct resource dm9000_resources[] = { | |
165 | [0] = { | |
166 | .start = 0x203FB800, | |
167 | .end = 0x203FB800 + 8, | |
168 | .flags = IORESOURCE_MEM, | |
169 | }, | |
170 | [1] = { | |
171 | .start = IRQ_PF9, | |
172 | .end = IRQ_PF9, | |
173 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
174 | }, | |
175 | }; | |
176 | ||
177 | static struct platform_device dm9000_device = { | |
178 | .name = "dm9000", | |
179 | .id = -1, | |
180 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
181 | .resource = dm9000_resources, | |
182 | }; | |
183 | #endif | |
184 | ||
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185 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
186 | static struct resource sl811_hcd_resources[] = { | |
187 | { | |
188 | .start = 0x20340000, | |
189 | .end = 0x20340000, | |
190 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 191 | }, { |
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192 | .start = 0x20340004, |
193 | .end = 0x20340004, | |
194 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 195 | }, { |
1394f032 BW |
196 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
197 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
198 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
199 | }, | |
200 | }; | |
201 | ||
202 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
203 | void sl811_port_power(struct device *dev, int is_on) | |
204 | { | |
c6c4d7bb BW |
205 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
206 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS); | |
1394f032 BW |
207 | |
208 | if (is_on) | |
c6c4d7bb | 209 | gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1); |
1394f032 | 210 | else |
c6c4d7bb | 211 | gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0); |
1394f032 BW |
212 | } |
213 | #endif | |
214 | ||
215 | static struct sl811_platform_data sl811_priv = { | |
216 | .potpg = 10, | |
217 | .power = 250, /* == 500mA */ | |
218 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
219 | .port_power = &sl811_port_power, | |
220 | #endif | |
221 | }; | |
222 | ||
223 | static struct platform_device sl811_hcd_device = { | |
224 | .name = "sl811-hcd", | |
225 | .id = 0, | |
226 | .dev = { | |
227 | .platform_data = &sl811_priv, | |
228 | }, | |
229 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
230 | .resource = sl811_hcd_resources, | |
231 | }; | |
232 | #endif | |
233 | ||
234 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
235 | static struct resource isp1362_hcd_resources[] = { | |
236 | { | |
237 | .start = 0x20360000, | |
238 | .end = 0x20360000, | |
239 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 240 | }, { |
1394f032 BW |
241 | .start = 0x20360004, |
242 | .end = 0x20360004, | |
243 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 244 | }, { |
1394f032 BW |
245 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
246 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
247 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
248 | }, | |
249 | }; | |
250 | ||
251 | static struct isp1362_platform_data isp1362_priv = { | |
252 | .sel15Kres = 1, | |
253 | .clknotstop = 0, | |
254 | .oc_enable = 0, | |
255 | .int_act_high = 0, | |
256 | .int_edge_triggered = 0, | |
257 | .remote_wakeup_connected = 0, | |
258 | .no_power_switching = 1, | |
259 | .power_switching_mode = 0, | |
260 | }; | |
261 | ||
262 | static struct platform_device isp1362_hcd_device = { | |
263 | .name = "isp1362-hcd", | |
264 | .id = 0, | |
265 | .dev = { | |
266 | .platform_data = &isp1362_priv, | |
267 | }, | |
268 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
269 | .resource = isp1362_hcd_resources, | |
270 | }; | |
271 | #endif | |
272 | ||
273 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
274 | static struct platform_device bfin_mac_device = { | |
275 | .name = "bfin_mac", | |
276 | }; | |
277 | #endif | |
278 | ||
279 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
280 | static struct resource net2272_bfin_resources[] = { | |
281 | { | |
282 | .start = 0x20300000, | |
283 | .end = 0x20300000 + 0x100, | |
284 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 285 | }, { |
1394f032 BW |
286 | .start = IRQ_PF7, |
287 | .end = IRQ_PF7, | |
288 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
289 | }, | |
290 | }; | |
291 | ||
292 | static struct platform_device net2272_bfin_device = { | |
293 | .name = "net2272", | |
294 | .id = -1, | |
295 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
296 | .resource = net2272_bfin_resources, | |
297 | }; | |
298 | #endif | |
299 | ||
300 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
301 | /* all SPI peripherals info goes here */ | |
302 | ||
303 | #if defined(CONFIG_MTD_M25P80) \ | |
304 | || defined(CONFIG_MTD_M25P80_MODULE) | |
305 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
306 | { | |
307 | .name = "bootloader", | |
308 | .size = 0x00020000, | |
309 | .offset = 0, | |
310 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 311 | }, { |
1394f032 BW |
312 | .name = "kernel", |
313 | .size = 0xe0000, | |
314 | .offset = 0x20000 | |
1f83b8f1 | 315 | }, { |
1394f032 BW |
316 | .name = "file system", |
317 | .size = 0x700000, | |
318 | .offset = 0x00100000, | |
319 | } | |
320 | }; | |
321 | ||
322 | static struct flash_platform_data bfin_spi_flash_data = { | |
323 | .name = "m25p80", | |
324 | .parts = bfin_spi_flash_partitions, | |
325 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
326 | .type = "m25p64", | |
327 | }; | |
328 | ||
329 | /* SPI flash chip (m25p64) */ | |
330 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
331 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
332 | .bits_per_word = 8, | |
333 | }; | |
334 | #endif | |
335 | ||
336 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
337 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
338 | /* SPI ADC chip */ | |
339 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
340 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
341 | .bits_per_word = 16, | |
342 | }; | |
343 | #endif | |
344 | ||
345 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
346 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
347 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
348 | .enable_dma = 0, | |
349 | .bits_per_word = 16, | |
350 | }; | |
351 | #endif | |
352 | ||
353 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
354 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
355 | .enable_dma = 0, | |
356 | .bits_per_word = 16, | |
357 | }; | |
358 | #endif | |
359 | ||
360 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
361 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
362 | .enable_dma = 1, | |
363 | .bits_per_word = 8, | |
364 | }; | |
365 | #endif | |
366 | ||
367 | #if defined(CONFIG_PBX) | |
368 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
369 | .ctl_reg = 0x4, /* send zero */ | |
370 | .enable_dma = 0, | |
371 | .bits_per_word = 8, | |
372 | .cs_change_per_word = 1, | |
373 | }; | |
374 | #endif | |
375 | ||
376 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
377 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
378 | .enable_dma = 0, | |
379 | .bits_per_word = 16, | |
380 | }; | |
381 | #endif | |
382 | ||
383 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
384 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
1394f032 BW |
385 | .enable_dma = 0, |
386 | .bits_per_word = 16, | |
387 | }; | |
388 | ||
389 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
390 | .model = 7877, | |
391 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
392 | .x_plate_ohms = 419, | |
393 | .y_plate_ohms = 486, | |
394 | .pressure_max = 1000, | |
395 | .pressure_min = 0, | |
396 | .stopacq_polarity = 1, | |
397 | .first_conversion_delay = 3, | |
398 | .acquisition_time = 1, | |
399 | .averaging = 1, | |
400 | .pen_down_acc_interval = 1, | |
401 | }; | |
402 | #endif | |
403 | ||
404 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
405 | #if defined(CONFIG_MTD_M25P80) \ | |
406 | || defined(CONFIG_MTD_M25P80_MODULE) | |
407 | { | |
408 | /* the modalias must be the same as spi device driver name */ | |
409 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
410 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 411 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
412 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
413 | .platform_data = &bfin_spi_flash_data, | |
414 | .controller_data = &spi_flash_chip_info, | |
415 | .mode = SPI_MODE_3, | |
416 | }, | |
417 | #endif | |
418 | ||
419 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
420 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
421 | { | |
422 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
423 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 424 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
425 | .chip_select = 1, /* Framework chip select. */ |
426 | .platform_data = NULL, /* No spi_driver specific config */ | |
427 | .controller_data = &spi_adc_chip_info, | |
428 | }, | |
429 | #endif | |
430 | ||
431 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
432 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
433 | { | |
434 | .modalias = "ad1836-spi", | |
435 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 436 | .bus_num = 0, |
1394f032 BW |
437 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
438 | .controller_data = &ad1836_spi_chip_info, | |
439 | }, | |
440 | #endif | |
441 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
442 | { | |
443 | .modalias = "ad9960-spi", | |
444 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 445 | .bus_num = 0, |
1394f032 BW |
446 | .chip_select = 1, |
447 | .controller_data = &ad9960_spi_chip_info, | |
448 | }, | |
449 | #endif | |
450 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
451 | { | |
452 | .modalias = "spi_mmc_dummy", | |
111cf97d | 453 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 454 | .bus_num = 0, |
1394f032 BW |
455 | .chip_select = 0, |
456 | .platform_data = NULL, | |
457 | .controller_data = &spi_mmc_chip_info, | |
458 | .mode = SPI_MODE_3, | |
459 | }, | |
460 | { | |
461 | .modalias = "spi_mmc", | |
111cf97d | 462 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 463 | .bus_num = 0, |
1394f032 BW |
464 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
465 | .platform_data = NULL, | |
466 | .controller_data = &spi_mmc_chip_info, | |
467 | .mode = SPI_MODE_3, | |
468 | }, | |
469 | #endif | |
470 | #if defined(CONFIG_PBX) | |
471 | { | |
1f83b8f1 MF |
472 | .modalias = "fxs-spi", |
473 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
474 | .bus_num = 0, |
475 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 476 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
477 | .mode = SPI_MODE_3, |
478 | }, | |
479 | { | |
1f83b8f1 MF |
480 | .modalias = "fxo-spi", |
481 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
482 | .bus_num = 0, |
483 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 484 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
485 | .mode = SPI_MODE_3, |
486 | }, | |
487 | #endif | |
488 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
489 | { | |
490 | .modalias = "ad5304_spi", | |
491 | .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 492 | .bus_num = 0, |
1394f032 BW |
493 | .chip_select = 2, |
494 | .platform_data = NULL, | |
495 | .controller_data = &ad5304_chip_info, | |
496 | .mode = SPI_MODE_2, | |
497 | }, | |
498 | #endif | |
499 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
500 | { | |
501 | .modalias = "ad7877", | |
502 | .platform_data = &bfin_ad7877_ts_info, | |
503 | .irq = IRQ_PF6, | |
504 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
505 | .bus_num = 1, | |
506 | .chip_select = 1, | |
507 | .controller_data = &spi_ad7877_chip_info, | |
508 | }, | |
509 | #endif | |
510 | }; | |
511 | ||
512 | /* SPI controller data */ | |
c6c4d7bb | 513 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
514 | .num_chipselect = 8, |
515 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
516 | }; | |
517 | ||
c6c4d7bb BW |
518 | /* SPI (0) */ |
519 | static struct resource bfin_spi0_resource[] = { | |
520 | [0] = { | |
521 | .start = SPI0_REGBASE, | |
522 | .end = SPI0_REGBASE + 0xFF, | |
523 | .flags = IORESOURCE_MEM, | |
524 | }, | |
525 | [1] = { | |
526 | .start = CH_SPI, | |
527 | .end = CH_SPI, | |
528 | .flags = IORESOURCE_IRQ, | |
529 | }, | |
530 | }; | |
531 | ||
532 | static struct platform_device bfin_spi0_device = { | |
533 | .name = "bfin-spi", | |
534 | .id = 0, /* Bus number */ | |
535 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
536 | .resource = bfin_spi0_resource, | |
1394f032 | 537 | .dev = { |
c6c4d7bb | 538 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
539 | }, |
540 | }; | |
541 | #endif /* spi master and devices */ | |
542 | ||
543 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
544 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb BW |
545 | .name = "bf537-lq035", |
546 | }; | |
547 | #endif | |
548 | ||
549 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | |
550 | static struct platform_device bfin_fb_adv7393_device = { | |
551 | .name = "bfin-adv7393", | |
1394f032 BW |
552 | }; |
553 | #endif | |
554 | ||
555 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
556 | static struct resource bfin_uart_resources[] = { | |
557 | { | |
558 | .start = 0xFFC00400, | |
559 | .end = 0xFFC004FF, | |
560 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 561 | }, { |
1394f032 BW |
562 | .start = 0xFFC02000, |
563 | .end = 0xFFC020FF, | |
564 | .flags = IORESOURCE_MEM, | |
565 | }, | |
566 | }; | |
567 | ||
568 | static struct platform_device bfin_uart_device = { | |
569 | .name = "bfin-uart", | |
570 | .id = 1, | |
571 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
572 | .resource = bfin_uart_resources, | |
573 | }; | |
574 | #endif | |
575 | ||
576 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
c6c4d7bb BW |
577 | static struct resource bfin_twi0_resource[] = { |
578 | [0] = { | |
579 | .start = TWI0_REGBASE, | |
580 | .end = TWI0_REGBASE, | |
581 | .flags = IORESOURCE_MEM, | |
582 | }, | |
583 | [1] = { | |
584 | .start = IRQ_TWI, | |
585 | .end = IRQ_TWI, | |
586 | .flags = IORESOURCE_IRQ, | |
587 | }, | |
588 | }; | |
589 | ||
1394f032 BW |
590 | static struct platform_device i2c_bfin_twi_device = { |
591 | .name = "i2c-bfin-twi", | |
592 | .id = 0, | |
c6c4d7bb BW |
593 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
594 | .resource = bfin_twi0_resource, | |
1394f032 BW |
595 | }; |
596 | #endif | |
597 | ||
598 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
599 | static struct platform_device bfin_sport0_uart_device = { | |
600 | .name = "bfin-sport-uart", | |
601 | .id = 0, | |
602 | }; | |
603 | ||
604 | static struct platform_device bfin_sport1_uart_device = { | |
605 | .name = "bfin-sport-uart", | |
606 | .id = 1, | |
607 | }; | |
608 | #endif | |
609 | ||
c6c4d7bb BW |
610 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
611 | #define PATA_INT 55 | |
612 | ||
613 | static struct pata_platform_info bfin_pata_platform_data = { | |
614 | .ioport_shift = 1, | |
64e5c512 | 615 | .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED, |
c6c4d7bb BW |
616 | }; |
617 | ||
618 | static struct resource bfin_pata_resources[] = { | |
619 | { | |
620 | .start = 0x20314020, | |
621 | .end = 0x2031403F, | |
622 | .flags = IORESOURCE_MEM, | |
623 | }, | |
624 | { | |
625 | .start = 0x2031401C, | |
626 | .end = 0x2031401F, | |
627 | .flags = IORESOURCE_MEM, | |
628 | }, | |
629 | { | |
630 | .start = PATA_INT, | |
631 | .end = PATA_INT, | |
632 | .flags = IORESOURCE_IRQ, | |
633 | }, | |
634 | }; | |
635 | ||
636 | static struct platform_device bfin_pata_device = { | |
637 | .name = "pata_platform", | |
638 | .id = -1, | |
639 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
640 | .resource = bfin_pata_resources, | |
641 | .dev = { | |
642 | .platform_data = &bfin_pata_platform_data, | |
643 | } | |
644 | }; | |
645 | #endif | |
646 | ||
1394f032 BW |
647 | static struct platform_device *stamp_devices[] __initdata = { |
648 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
649 | &bfin_pcmcia_cf_device, | |
650 | #endif | |
651 | ||
652 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
653 | &rtc_device, | |
654 | #endif | |
655 | ||
656 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
657 | &sl811_hcd_device, | |
658 | #endif | |
659 | ||
660 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
661 | &isp1362_hcd_device, | |
662 | #endif | |
663 | ||
664 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
665 | &smc91x_device, | |
666 | #endif | |
667 | ||
f40d24d9 AL |
668 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
669 | &dm9000_device, | |
670 | #endif | |
671 | ||
1394f032 BW |
672 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
673 | &bfin_mac_device, | |
674 | #endif | |
675 | ||
676 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
677 | &net2272_bfin_device, | |
678 | #endif | |
679 | ||
680 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 681 | &bfin_spi0_device, |
1394f032 BW |
682 | #endif |
683 | ||
684 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
685 | &bfin_fb_device, | |
686 | #endif | |
687 | ||
c6c4d7bb BW |
688 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
689 | &bfin_fb_adv7393_device, | |
690 | #endif | |
691 | ||
1394f032 BW |
692 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
693 | &bfin_uart_device, | |
694 | #endif | |
695 | ||
696 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
697 | &i2c_bfin_twi_device, | |
698 | #endif | |
699 | ||
700 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
701 | &bfin_sport0_uart_device, | |
702 | &bfin_sport1_uart_device, | |
703 | #endif | |
c6c4d7bb BW |
704 | |
705 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
706 | &bfin_pata_device, | |
707 | #endif | |
1394f032 BW |
708 | }; |
709 | ||
710 | static int __init stamp_init(void) | |
711 | { | |
712 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
713 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
714 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
715 | spi_register_board_info(bfin_spi_board_info, | |
716 | ARRAY_SIZE(bfin_spi_board_info)); | |
717 | #endif | |
c6c4d7bb BW |
718 | |
719 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
720 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
721 | #endif | |
1394f032 BW |
722 | return 0; |
723 | } | |
724 | ||
725 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
726 | |
727 | void native_machine_restart(char *cmd) | |
728 | { | |
729 | /* workaround reboot hang when booting from SPI */ | |
730 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | |
731 | bfin_gpio_reset_spi0_ssel1(); | |
732 | } |