projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Blackfin: mass clean up of copyright/licensing info
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032
BW		 11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
fc68911e 13#include <linux/mtd/nand.h>
1394f032 14#include <linux/mtd/partitions.h>
fc68911e 15#include <linux/mtd/plat-ram.h>
de8c43f2 16#include <linux/mtd/physmap.h>
1394f032
BW		 17#include <linux/spi/spi.h>
18#include <linux/spi/flash.h>
19#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 20#include <linux/usb/isp1362.h>
1394f032 21#endif
0a87e3e9 22#include <linux/ata_platform.h>
1394f032
BW		 23#include <linux/irq.h>
24#include <linux/interrupt.h>
81d9c7f2 25#include <linux/i2c.h>
27f5d75a 26#include <linux/usb/sl811.h>
f79ea4cb 27#include <linux/spi/mmc_spi.h>
c6c4d7bb 28#include <asm/dma.h>
1f83b8f1 29#include <asm/bfin5xx_spi.h>
c6c4d7bb 30#include <asm/reboot.h>
5d448dd5 31#include <asm/portmux.h>
14b03204 32#include <asm/dpmc.h>
1394f032
BW		 33
34/*
35 * Name the Board for the /proc/cpuinfo
36 */
fe85cad2 37const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 38
39/*
40 * Driver needs to know address, irq and flag pin.
41 */
42
1394f032 43#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 44#include <linux/usb/isp1760.h>
45static struct resource bfin_isp1760_resources[] = {
1394f032 46 [0] = {
3f375690
MH		 47 .start = 0x203C0000,
48 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
3f375690
MH		 52 .start = IRQ_PF7,
53 .end = IRQ_PF7,
6a6be3d1 54 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 55 },
56};
57
3f375690
MH		 58static struct isp1760_platform_data isp1760_priv = {
59 .is_isp1761 = 0,
3f375690
MH		 60 .bus_width_16 = 1,
61 .port1_otg = 0,
62 .analog_oc = 0,
63 .dack_polarity_high = 0,
64 .dreq_polarity_high = 0,
1394f032
BW		 65};
66
3f375690
MH		 67static struct platform_device bfin_isp1760_device = {
68 .name = "isp1760-hcd",
69 .id = 0,
70 .dev = {
71 .platform_data = &isp1760_priv,
72 },
73 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
74 .resource = bfin_isp1760_resources,
1394f032 75};
1394f032
BW		 76#endif
77
2463ef22
MH		 78#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
79#include <linux/input.h>
80#include <linux/gpio_keys.h>
81
82static struct gpio_keys_button bfin_gpio_keys_table[] = {
83 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
84 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
85 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
86 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
87};
88
89static struct gpio_keys_platform_data bfin_gpio_keys_data = {
90 .buttons = bfin_gpio_keys_table,
91 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
92};
93
94static struct platform_device bfin_device_gpiokeys = {
95 .name = "gpio-keys",
96 .dev = {
97 .platform_data = &bfin_gpio_keys_data,
98 },
99};
100#endif
101
cad2ab65
MF		 102static struct resource bfin_gpios_resources = {
103 .start = 0,
104 .end = MAX_BLACKFIN_GPIOS - 1,
105 .flags = IORESOURCE_IRQ,
106};
107
108static struct platform_device bfin_gpios_device = {
109 .name = "simple-gpio",
110 .id = -1,
111 .num_resources = 1,
112 .resource = &bfin_gpios_resources,
113};
114
1394f032
BW		 115#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
116static struct resource bfin_pcmcia_cf_resources[] = {
117 {
118 .start = 0x20310000, /* IO PORT */
119 .end = 0x20312000,
120 .flags = IORESOURCE_MEM,
1f83b8f1 121 }, {
d2d50aa9 122 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 123 .end = 0x20311FFF,
124 .flags = IORESOURCE_MEM,
1f83b8f1 125 }, {
1394f032
BW		 126 .start = IRQ_PF4,
127 .end = IRQ_PF4,
128 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 129 }, {
1394f032
BW		 130 .start = 6, /* Card Detect PF6 */
131 .end = 6,
132 .flags = IORESOURCE_IRQ,
133 },
134};
135
136static struct platform_device bfin_pcmcia_cf_device = {
137 .name = "bfin_cf_pcmcia",
138 .id = -1,
139 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
140 .resource = bfin_pcmcia_cf_resources,
141};
142#endif
143
144#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
145static struct platform_device rtc_device = {
146 .name = "rtc-bfin",
147 .id = -1,
148};
149#endif
150
151#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 152#include <linux/smc91x.h>
153
154static struct smc91x_platdata smc91x_info = {
155 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
156 .leda = RPC_LED_100_10,
157 .ledb = RPC_LED_TX_RX,
158};
159
1394f032
BW		 160static struct resource smc91x_resources[] = {
161 {
162 .name = "smc91x-regs",
163 .start = 0x20300300,
164 .end = 0x20300300 + 16,
165 .flags = IORESOURCE_MEM,
1f83b8f1 166 }, {
1394f032
BW		 167
168 .start = IRQ_PF7,
169 .end = IRQ_PF7,
170 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
171 },
172};
173static struct platform_device smc91x_device = {
174 .name = "smc91x",
175 .id = 0,
176 .num_resources = ARRAY_SIZE(smc91x_resources),
177 .resource = smc91x_resources,
61f09b5a
MH		 178 .dev = {
179 .platform_data = &smc91x_info,
180 },
1394f032
BW		 181};
182#endif
183
f40d24d9
AL		 184#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
185static struct resource dm9000_resources[] = {
186 [0] = {
187 .start = 0x203FB800,
b3dec4a4 188 .end = 0x203FB800 + 1,
f40d24d9
AL		 189 .flags = IORESOURCE_MEM,
190 },
191 [1] = {
b3dec4a4
BS		 192 .start = 0x203FB804,
193 .end = 0x203FB804 + 1,
194 .flags = IORESOURCE_MEM,
195 },
196 [2] = {
f40d24d9
AL		 197 .start = IRQ_PF9,
198 .end = IRQ_PF9,
199 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
200 },
201};
202
203static struct platform_device dm9000_device = {
204 .name = "dm9000",
205 .id = -1,
206 .num_resources = ARRAY_SIZE(dm9000_resources),
207 .resource = dm9000_resources,
208};
209#endif
210
561cc18b
MH		 211#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
212static struct resource ax88180_resources[] = {
213 [0] = {
214 .start = 0x20300000,
215 .end = 0x20300000 + 0x8000,
216 .flags = IORESOURCE_MEM,
217 },
218 [1] = {
219 .start = IRQ_PF7,
220 .end = IRQ_PF7,
221 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
222 },
223};
224
225static struct platform_device ax88180_device = {
226 .name = "ax88180",
227 .id = -1,
228 .num_resources = ARRAY_SIZE(ax88180_resources),
229 .resource = ax88180_resources,
230};
231#endif
232
1394f032
BW		 233#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
234static struct resource sl811_hcd_resources[] = {
235 {
236 .start = 0x20340000,
237 .end = 0x20340000,
238 .flags = IORESOURCE_MEM,
1f83b8f1 239 }, {
1394f032
BW		 240 .start = 0x20340004,
241 .end = 0x20340004,
242 .flags = IORESOURCE_MEM,
1f83b8f1 243 }, {
1394f032
BW		 244 .start = CONFIG_USB_SL811_BFIN_IRQ,
245 .end = CONFIG_USB_SL811_BFIN_IRQ,
246 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
247 },
248};
249
250#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
251void sl811_port_power(struct device *dev, int is_on)
252{
c6c4d7bb 253 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 254 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 255}
256#endif
257
258static struct sl811_platform_data sl811_priv = {
259 .potpg = 10,
260 .power = 250, /* == 500mA */
261#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
262 .port_power = &sl811_port_power,
263#endif
264};
265
266static struct platform_device sl811_hcd_device = {
267 .name = "sl811-hcd",
268 .id = 0,
269 .dev = {
270 .platform_data = &sl811_priv,
271 },
272 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
273 .resource = sl811_hcd_resources,
274};
275#endif
276
277#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
278static struct resource isp1362_hcd_resources[] = {
279 {
280 .start = 0x20360000,
281 .end = 0x20360000,
282 .flags = IORESOURCE_MEM,
1f83b8f1 283 }, {
1394f032
BW		 284 .start = 0x20360004,
285 .end = 0x20360004,
286 .flags = IORESOURCE_MEM,
1f83b8f1 287 }, {
1394f032
BW		 288 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
289 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
290 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
291 },
292};
293
294static struct isp1362_platform_data isp1362_priv = {
295 .sel15Kres = 1,
296 .clknotstop = 0,
297 .oc_enable = 0,
298 .int_act_high = 0,
299 .int_edge_triggered = 0,
300 .remote_wakeup_connected = 0,
301 .no_power_switching = 1,
302 .power_switching_mode = 0,
303};
304
305static struct platform_device isp1362_hcd_device = {
306 .name = "isp1362-hcd",
307 .id = 0,
308 .dev = {
309 .platform_data = &isp1362_priv,
310 },
311 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
312 .resource = isp1362_hcd_resources,
313};
314#endif
315
316#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 317static struct platform_device bfin_mii_bus = {
318 .name = "bfin_mii_bus",
319};
320
1394f032
BW		 321static struct platform_device bfin_mac_device = {
322 .name = "bfin_mac",
65319628 323 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 324};
325#endif
326
327#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
328static struct resource net2272_bfin_resources[] = {
329 {
330 .start = 0x20300000,
331 .end = 0x20300000 + 0x100,
332 .flags = IORESOURCE_MEM,
1f83b8f1 333 }, {
1394f032
BW		 334 .start = IRQ_PF7,
335 .end = IRQ_PF7,
336 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
337 },
338};
339
340static struct platform_device net2272_bfin_device = {
341 .name = "net2272",
342 .id = -1,
343 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
344 .resource = net2272_bfin_resources,
345};
346#endif
347
fc68911e
MF		 348#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
349#ifdef CONFIG_MTD_PARTITIONS
350const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
351
352static struct mtd_partition bfin_plat_nand_partitions[] = {
353 {
aa582977 354 .name = "linux kernel(nand)",
fc68911e
MF		 355 .size = 0x400000,
356 .offset = 0,
357 }, {
aa582977 358 .name = "file system(nand)",
fc68911e
MF		 359 .size = MTDPART_SIZ_FULL,
360 .offset = MTDPART_OFS_APPEND,
361 },
362};
363#endif
364
365#define BFIN_NAND_PLAT_CLE 2
366#define BFIN_NAND_PLAT_ALE 1
367static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
368{
369 struct nand_chip *this = mtd->priv;
370
371 if (cmd == NAND_CMD_NONE)
372 return;
373
374 if (ctrl & NAND_CLE)
375 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
376 else
377 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
378}
379
380#define BFIN_NAND_PLAT_READY GPIO_PF3
381static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
382{
383 return gpio_get_value(BFIN_NAND_PLAT_READY);
384}
385
386static struct platform_nand_data bfin_plat_nand_data = {
387 .chip = {
388 .chip_delay = 30,
389#ifdef CONFIG_MTD_PARTITIONS
390 .part_probe_types = part_probes,
391 .partitions = bfin_plat_nand_partitions,
392 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
393#endif
394 },
395 .ctrl = {
396 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
397 .dev_ready = bfin_plat_nand_dev_ready,
398 },
399};
400
401#define MAX(x, y) (x > y ? x : y)
402static struct resource bfin_plat_nand_resources = {
403 .start = 0x20212000,
404 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
405 .flags = IORESOURCE_IO,
406};
407
408static struct platform_device bfin_async_nand_device = {
409 .name = "gen_nand",
410 .id = -1,
411 .num_resources = 1,
412 .resource = &bfin_plat_nand_resources,
413 .dev = {
414 .platform_data = &bfin_plat_nand_data,
415 },
416};
417
418static void bfin_plat_nand_init(void)
419{
420 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
421}
422#else
423static void bfin_plat_nand_init(void) {}
424#endif
425
793dc27b 426#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 427static struct mtd_partition stamp_partitions[] = {
428 {
aa582977 429 .name = "bootloader(nor)",
edf05641 430 .size = 0x40000,
de8c43f2
MF		 431 .offset = 0,
432 }, {
aa582977 433 .name = "linux kernel(nor)",
6ecb5b6d 434 .size = 0x180000,
de8c43f2
MF		 435 .offset = MTDPART_OFS_APPEND,
436 }, {
aa582977 437 .name = "file system(nor)",
6ecb5b6d 438 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 439 .offset = MTDPART_OFS_APPEND,
440 }, {
aa582977 441 .name = "MAC Address(nor)",
de8c43f2
MF		 442 .size = MTDPART_SIZ_FULL,
443 .offset = 0x3F0000,
444 .mask_flags = MTD_WRITEABLE,
445 }
446};
447
448static struct physmap_flash_data stamp_flash_data = {
449 .width = 2,
450 .parts = stamp_partitions,
451 .nr_parts = ARRAY_SIZE(stamp_partitions),
452};
453
454static struct resource stamp_flash_resource = {
455 .start = 0x20000000,
456 .end = 0x203fffff,
457 .flags = IORESOURCE_MEM,
458};
459
460static struct platform_device stamp_flash_device = {
461 .name = "physmap-flash",
462 .id = 0,
463 .dev = {
464 .platform_data = &stamp_flash_data,
465 },
466 .num_resources = 1,
467 .resource = &stamp_flash_resource,
468};
793dc27b 469#endif
de8c43f2 470
1394f032
BW		 471#if defined(CONFIG_MTD_M25P80) \
472 || defined(CONFIG_MTD_M25P80_MODULE)
473static struct mtd_partition bfin_spi_flash_partitions[] = {
474 {
aa582977 475 .name = "bootloader(spi)",
edf05641 476 .size = 0x00040000,
1394f032
BW		 477 .offset = 0,
478 .mask_flags = MTD_CAP_ROM
1f83b8f1 479 }, {
aa582977 480 .name = "linux kernel(spi)",
6ecb5b6d 481 .size = 0x180000,
edf05641 482 .offset = MTDPART_OFS_APPEND,
1f83b8f1 483 }, {
aa582977 484 .name = "file system(spi)",
edf05641
MF		 485 .size = MTDPART_SIZ_FULL,
486 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 487 }
488};
489
490static struct flash_platform_data bfin_spi_flash_data = {
491 .name = "m25p80",
492 .parts = bfin_spi_flash_partitions,
493 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 494 /* .type = "m25p64", */
1394f032
BW		 495};
496
497/* SPI flash chip (m25p64) */
498static struct bfin5xx_spi_chip spi_flash_chip_info = {
499 .enable_dma = 0, /* use dma transfer with this chip*/
500 .bits_per_word = 8,
501};
502#endif
503
a261eec0
MF		 504#if defined(CONFIG_BFIN_SPI_ADC) \
505 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 506/* SPI ADC chip */
507static struct bfin5xx_spi_chip spi_adc_chip_info = {
508 .enable_dma = 1, /* use dma transfer with this chip*/
509 .bits_per_word = 16,
510};
511#endif
512
8312440e
BS		 513#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
514 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032
BW		 515static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
516 .enable_dma = 0,
517 .bits_per_word = 16,
518};
519#endif
520
d4b834c1
BS		 521#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
522 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
523static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
524 .enable_dma = 0,
525 .bits_per_word = 8,
526 .cs_gpio = GPIO_PF5,
527};
528#endif
529
427f277e
BS		 530#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
531#include <linux/input.h>
532#include <linux/input/ad714x.h>
533static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
534 .enable_dma = 0,
535 .bits_per_word = 16,
536};
537
538static struct ad714x_slider_plat slider_plat[] = {
539 {
540 .start_stage = 0,
541 .end_stage = 7,
542 .max_coord = 128,
543 },
544};
545
546static struct ad714x_button_plat button_plat[] = {
547 {
548 .keycode = BTN_FORWARD,
549 .l_mask = 0,
550 .h_mask = 0x600,
551 },
552 {
553 .keycode = BTN_LEFT,
554 .l_mask = 0,
555 .h_mask = 0x500,
556 },
557 {
558 .keycode = BTN_MIDDLE,
559 .l_mask = 0,
560 .h_mask = 0x800,
561 },
562 {
563 .keycode = BTN_RIGHT,
564 .l_mask = 0x100,
565 .h_mask = 0x400,
566 },
567 {
568 .keycode = BTN_BACK,
569 .l_mask = 0x200,
570 .h_mask = 0x400,
571 },
572};
573static struct ad714x_platform_data ad7147_platfrom_data = {
574 .slider_num = 1,
575 .button_num = 5,
576 .slider = slider_plat,
577 .button = button_plat,
578 .stage_cfg_reg = {
579 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
580 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
581 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
582 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
583 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
584 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
585 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
586 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
587 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
588 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
589 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
590 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
591 },
592 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
593};
594#endif
595
596#if defined(CONFIG_INPUT_EVAL_AD7142EB)
597#include <linux/input.h>
598#include <linux/input/ad714x.h>
599static struct ad714x_button_plat button_plat[] = {
600 {
601 .keycode = BTN_1,
602 .l_mask = 0,
603 .h_mask = 0x1,
604 },
605 {
606 .keycode = BTN_2,
607 .l_mask = 0,
608 .h_mask = 0x2,
609 },
610 {
611 .keycode = BTN_3,
612 .l_mask = 0,
613 .h_mask = 0x4,
614 },
615 {
616 .keycode = BTN_4,
617 .l_mask = 0x0,
618 .h_mask = 0x8,
619 },
620};
621static struct ad714x_platform_data ad7142_platfrom_data = {
622 .button_num = 4,
623 .button = button_plat,
624 .stage_cfg_reg = {
625 /* fixme: figure out right setting for all comoponent according
626 * to hardware feature of EVAL-AD7142EB board */
627 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
628 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
629 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
630 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
631 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
632 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
633 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
634 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
635 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
636 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
637 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 },
640 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
641};
642#endif
643
f79ea4cb
YL		 644#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
645#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
646
647static int bfin_mmc_spi_init(struct device *dev,
648 irqreturn_t (*detect_int)(int, void *), void *data)
649{
650 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
651 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
652}
653
654static void bfin_mmc_spi_exit(struct device *dev, void *data)
655{
656 free_irq(MMC_SPI_CARD_DETECT_INT, data);
657}
658
659static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
660 .init = bfin_mmc_spi_init,
661 .exit = bfin_mmc_spi_exit,
662 .detect_delay = 100, /* msecs */
663};
664
665static struct bfin5xx_spi_chip mmc_spi_chip_info = {
666 .enable_dma = 0,
667 .bits_per_word = 8,
e68d1ebc 668 .pio_interrupt = 0,
f79ea4cb
YL		 669};
670#endif
671
1394f032 672#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 673#include <linux/spi/ad7877.h>
1394f032 674static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 675 .enable_dma = 0,
676 .bits_per_word = 16,
677};
678
679static const struct ad7877_platform_data bfin_ad7877_ts_info = {
680 .model = 7877,
681 .vref_delay_usecs = 50, /* internal, no capacitor */
682 .x_plate_ohms = 419,
683 .y_plate_ohms = 486,
684 .pressure_max = 1000,
685 .pressure_min = 0,
686 .stopacq_polarity = 1,
687 .first_conversion_delay = 3,
688 .acquisition_time = 1,
689 .averaging = 1,
690 .pen_down_acc_interval = 1,
691};
692#endif
693
46aa04f9
MH		 694#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
695#include <linux/spi/ad7879.h>
46aa04f9
MH		 696static const struct ad7879_platform_data bfin_ad7879_ts_info = {
697 .model = 7879, /* Model = AD7879 */
698 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
699 .pressure_max = 10000,
700 .pressure_min = 0,
701 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
702 .acquisition_time = 1, /* 4us acquisition time per sample */
703 .median = 2, /* do 8 measurements */
704 .averaging = 1, /* take the average of 4 middle samples */
705 .pen_down_acc_interval = 255, /* 9.4 ms */
706 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
707 .gpio_default = 1, /* During initialization set GPIO = HIGH */
708};
709#endif
710
ffc4d8bc
MH		 711#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
712#include <linux/input.h>
713#include <linux/spi/adxl34x.h>
714static const struct adxl34x_platform_data adxl34x_info = {
715 .x_axis_offset = 0,
716 .y_axis_offset = 0,
717 .z_axis_offset = 0,
718 .tap_threshold = 0x31,
719 .tap_duration = 0x10,
720 .tap_latency = 0x60,
721 .tap_window = 0xF0,
722 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
723 .act_axis_control = 0xFF,
724 .activity_threshold = 5,
725 .inactivity_threshold = 3,
726 .inactivity_time = 4,
727 .free_fall_threshold = 0x7,
728 .free_fall_time = 0x20,
729 .data_rate = 0x8,
730 .data_range = ADXL_FULL_RES,
731
732 .ev_type = EV_ABS,
733 .ev_code_x = ABS_X, /* EV_REL */
734 .ev_code_y = ABS_Y, /* EV_REL */
735 .ev_code_z = ABS_Z, /* EV_REL */
736
737 .ev_code_tap_x = BTN_TOUCH, /* EV_KEY */
738 .ev_code_tap_y = BTN_TOUCH, /* EV_KEY */
739 .ev_code_tap_z = BTN_TOUCH, /* EV_KEY */
740
741/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
742/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
743 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
744 .fifo_mode = ADXL_FIFO_STREAM,
745};
746#endif
747
f5150155
MH		 748#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
749static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
750 .enable_dma = 0,
751 .bits_per_word = 16,
752};
753#endif
754
6e668936
MH		 755#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
756static struct bfin5xx_spi_chip spidev_chip_info = {
757 .enable_dma = 0,
758 .bits_per_word = 8,
759};
760#endif
761
2043f3f7
MH		 762#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
763static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
764 .enable_dma = 0,
765 .bits_per_word = 8,
766};
767#endif
768
85a192e9
MH		 769#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
770static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
771 .enable_dma = 1,
772 .bits_per_word = 8,
773 .cs_gpio = GPIO_PF10,
774};
775#endif
776
8e9d5c7d
MH		 777#if defined(CONFIG_MTD_DATAFLASH) \
778 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 779
780static struct mtd_partition bfin_spi_dataflash_partitions[] = {
781 {
782 .name = "bootloader(spi)",
783 .size = 0x00040000,
784 .offset = 0,
785 .mask_flags = MTD_CAP_ROM
786 }, {
787 .name = "linux kernel(spi)",
6ecb5b6d 788 .size = 0x180000,
ceac2651
MH		 789 .offset = MTDPART_OFS_APPEND,
790 }, {
791 .name = "file system(spi)",
792 .size = MTDPART_SIZ_FULL,
793 .offset = MTDPART_OFS_APPEND,
794 }
795};
796
797static struct flash_platform_data bfin_spi_dataflash_data = {
798 .name = "SPI Dataflash",
799 .parts = bfin_spi_dataflash_partitions,
800 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
801};
802
8e9d5c7d
MH		 803/* DataFlash chip */
804static struct bfin5xx_spi_chip data_flash_chip_info = {
805 .enable_dma = 0, /* use dma transfer with this chip*/
806 .bits_per_word = 8,
807};
808#endif
809
1394f032
BW		 810static struct spi_board_info bfin_spi_board_info[] __initdata = {
811#if defined(CONFIG_MTD_M25P80) \
812 || defined(CONFIG_MTD_M25P80_MODULE)
813 {
814 /* the modalias must be the same as spi device driver name */
815 .modalias = "m25p80", /* Name of spi_driver for this device */
816 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 817 .bus_num = 0, /* Framework bus number */
1394f032
BW		 818 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
819 .platform_data = &bfin_spi_flash_data,
820 .controller_data = &spi_flash_chip_info,
821 .mode = SPI_MODE_3,
822 },
823#endif
8e9d5c7d
MH		 824#if defined(CONFIG_MTD_DATAFLASH) \
825 || defined(CONFIG_MTD_DATAFLASH_MODULE)
826 { /* DataFlash chip */
827 .modalias = "mtd_dataflash",
ceac2651 828 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 829 .bus_num = 0, /* Framework bus number */
830 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 831 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 832 .controller_data = &data_flash_chip_info,
833 .mode = SPI_MODE_3,
834 },
835#endif
a261eec0
MF		 836#if defined(CONFIG_BFIN_SPI_ADC) \
837 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 838 {
839 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
840 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 841 .bus_num = 0, /* Framework bus number */
1394f032
BW		 842 .chip_select = 1, /* Framework chip select. */
843 .platform_data = NULL, /* No spi_driver specific config */
844 .controller_data = &spi_adc_chip_info,
845 },
846#endif
847
8312440e
BS		 848#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
849 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032 850 {
dac98174 851 .modalias = "ad1836",
1394f032 852 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 853 .bus_num = 0,
8312440e 854 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
1394f032 855 .controller_data = &ad1836_spi_chip_info,
8312440e 856 .mode = SPI_MODE_3,
1394f032
BW		 857 },
858#endif
d4b834c1
BS		 859
860#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
861 {
dac98174 862 .modalias = "ad1938",
d4b834c1
BS		 863 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
864 .bus_num = 0,
865 .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
866 .controller_data = &ad1938_spi_chip_info,
867 .mode = SPI_MODE_3,
868 },
869#endif
870
427f277e
BS		 871#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
872 {
873 .modalias = "ad714x_captouch",
874 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
875 .irq = IRQ_PF4,
876 .bus_num = 0,
877 .chip_select = 5,
878 .mode = SPI_MODE_3,
879 .platform_data = &ad7147_platfrom_data,
880 .controller_data = &ad7147_spi_chip_info,
881 },
882#endif
883
f79ea4cb
YL		 884#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
885 {
886 .modalias = "mmc_spi",
887 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
888 .bus_num = 0,
889 .chip_select = 4,
890 .platform_data = &bfin_mmc_spi_pdata,
891 .controller_data = &mmc_spi_chip_info,
892 .mode = SPI_MODE_3,
893 },
894#endif
1394f032
BW		 895#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
896 {
897 .modalias = "ad7877",
898 .platform_data = &bfin_ad7877_ts_info,
899 .irq = IRQ_PF6,
900 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 901 .bus_num = 0,
1394f032
BW		 902 .chip_select = 1,
903 .controller_data = &spi_ad7877_chip_info,
904 },
905#endif
f5150155 906#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 907 {
908 .modalias = "ad7879",
909 .platform_data = &bfin_ad7879_ts_info,
910 .irq = IRQ_PF7,
911 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
912 .bus_num = 0,
913 .chip_select = 1,
914 .controller_data = &spi_ad7879_chip_info,
915 .mode = SPI_CPHA | SPI_CPOL,
916 },
917#endif
6e668936
MH		 918#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
919 {
920 .modalias = "spidev",
921 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
922 .bus_num = 0,
923 .chip_select = 1,
924 .controller_data = &spidev_chip_info,
925 },
926#endif
2043f3f7
MH		 927#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
928 {
929 .modalias = "bfin-lq035q1-spi",
930 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
931 .bus_num = 0,
46aa04f9 932 .chip_select = 2,
2043f3f7
MH		 933 .controller_data = &lq035q1_spi_chip_info,
934 .mode = SPI_CPHA | SPI_CPOL,
935 },
936#endif
85a192e9
MH		 937#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
938 {
939 .modalias = "enc28j60",
940 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
941 .irq = IRQ_PF6,
942 .bus_num = 0,
943 .chip_select = 0, /* GPIO controlled SSEL */
944 .controller_data = &enc28j60_spi_chip_info,
945 .mode = SPI_MODE_0,
946 },
947#endif
1394f032
BW		 948};
949
5bda2723 950#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 951/* SPI controller data */
c6c4d7bb 952static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 953 .num_chipselect = 8,
954 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 955 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 956};
957
c6c4d7bb
BW		 958/* SPI (0) */
959static struct resource bfin_spi0_resource[] = {
960 [0] = {
961 .start = SPI0_REGBASE,
962 .end = SPI0_REGBASE + 0xFF,
963 .flags = IORESOURCE_MEM,
964 },
965 [1] = {
966 .start = CH_SPI,
967 .end = CH_SPI,
e68d1ebc
YL		 968 .flags = IORESOURCE_DMA,
969 },
970 [2] = {
971 .start = IRQ_SPI,
972 .end = IRQ_SPI,
c6c4d7bb
BW		 973 .flags = IORESOURCE_IRQ,
974 },
975};
976
977static struct platform_device bfin_spi0_device = {
978 .name = "bfin-spi",
979 .id = 0, /* Bus number */
980 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
981 .resource = bfin_spi0_resource,
1394f032 982 .dev = {
c6c4d7bb 983 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 984 },
985};
986#endif /* spi master and devices */
987
1e9aa955
CC		 988#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
989
990/* SPORT SPI controller data */
991static struct bfin5xx_spi_master bfin_sport_spi0_info = {
992 .num_chipselect = 1, /* master only supports one device */
993 .enable_dma = 0, /* master don't support DMA */
994 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
995 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
996};
997
998static struct resource bfin_sport_spi0_resource[] = {
999 [0] = {
1000 .start = SPORT0_TCR1,
1001 .end = SPORT0_TCR1 + 0xFF,
1002 .flags = IORESOURCE_MEM,
1003 },
1004 [1] = {
1005 .start = IRQ_SPORT0_ERROR,
1006 .end = IRQ_SPORT0_ERROR,
1007 .flags = IORESOURCE_IRQ,
1008 },
1009};
1010
1011static struct platform_device bfin_sport_spi0_device = {
1012 .name = "bfin-sport-spi",
1013 .id = 1, /* Bus number */
1014 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1015 .resource = bfin_sport_spi0_resource,
1016 .dev = {
1017 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1018 },
1019};
1020
1021static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1022 .num_chipselect = 1, /* master only supports one device */
1023 .enable_dma = 0, /* master don't support DMA */
1024 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1025 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1026};
1027
1028static struct resource bfin_sport_spi1_resource[] = {
1029 [0] = {
1030 .start = SPORT1_TCR1,
1031 .end = SPORT1_TCR1 + 0xFF,
1032 .flags = IORESOURCE_MEM,
1033 },
1034 [1] = {
1035 .start = IRQ_SPORT1_ERROR,
1036 .end = IRQ_SPORT1_ERROR,
1037 .flags = IORESOURCE_IRQ,
1038 },
1039};
1040
1041static struct platform_device bfin_sport_spi1_device = {
1042 .name = "bfin-sport-spi",
1043 .id = 2, /* Bus number */
1044 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1045 .resource = bfin_sport_spi1_resource,
1046 .dev = {
1047 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1048 },
1049};
1050
1051#endif /* sport spi master and devices */
1052
1394f032
BW		 1053#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1054static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1055 .name = "bf537-lq035",
1056};
1057#endif
1058
1059#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1060static struct platform_device bfin_fb_adv7393_device = {
1061 .name = "bfin-adv7393",
1394f032
BW		 1062};
1063#endif
1064
2043f3f7
MH		 1065#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1066#include <asm/bfin-lq035q1.h>
1067
1068static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1069 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
46aa04f9 1070 .use_bl = 0, /* let something else control the LCD Blacklight */
2043f3f7
MH		 1071 .gpio_bl = GPIO_PF7,
1072};
1073
1074static struct resource bfin_lq035q1_resources[] = {
1075 {
1076 .start = IRQ_PPI_ERROR,
1077 .end = IRQ_PPI_ERROR,
1078 .flags = IORESOURCE_IRQ,
1079 },
1080};
1081
1082static struct platform_device bfin_lq035q1_device = {
1083 .name = "bfin-lq035q1",
1084 .id = -1,
1085 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1086 .resource = bfin_lq035q1_resources,
1087 .dev = {
1088 .platform_data = &bfin_lq035q1_data,
1089 },
1090};
1091#endif
1092
1394f032
BW		 1093#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1094static struct resource bfin_uart_resources[] = {
233b28a9 1095#ifdef CONFIG_SERIAL_BFIN_UART0
1394f032
BW		 1096 {
1097 .start = 0xFFC00400,
1098 .end = 0xFFC004FF,
1099 .flags = IORESOURCE_MEM,
233b28a9
SZ		 1100 },
1101#endif
1102#ifdef CONFIG_SERIAL_BFIN_UART1
1103 {
1394f032
BW		 1104 .start = 0xFFC02000,
1105 .end = 0xFFC020FF,
1106 .flags = IORESOURCE_MEM,
1107 },
233b28a9 1108#endif
1394f032
BW		 1109};
1110
1111static struct platform_device bfin_uart_device = {
1112 .name = "bfin-uart",
1113 .id = 1,
1114 .num_resources = ARRAY_SIZE(bfin_uart_resources),
1115 .resource = bfin_uart_resources,
1116};
1117#endif
1118
5be36d22 1119#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1120#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1121static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1122 {
1123 .start = 0xFFC00400,
1124 .end = 0xFFC004FF,
1125 .flags = IORESOURCE_MEM,
1126 },
42bd8bcb
GY		 1127 {
1128 .start = IRQ_UART0_RX,
1129 .end = IRQ_UART0_RX+1,
1130 .flags = IORESOURCE_IRQ,
1131 },
1132 {
1133 .start = CH_UART0_RX,
1134 .end = CH_UART0_RX+1,
1135 .flags = IORESOURCE_DMA,
1136 },
1137};
1138
1139static struct platform_device bfin_sir0_device = {
1140 .name = "bfin_sir",
1141 .id = 0,
1142 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1143 .resource = bfin_sir0_resources,
1144};
5be36d22
GY		 1145#endif
1146#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1147static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1148 {
1149 .start = 0xFFC02000,
1150 .end = 0xFFC020FF,
1151 .flags = IORESOURCE_MEM,
1152 },
42bd8bcb
GY		 1153 {
1154 .start = IRQ_UART1_RX,
1155 .end = IRQ_UART1_RX+1,
1156 .flags = IORESOURCE_IRQ,
1157 },
1158 {
1159 .start = CH_UART1_RX,
1160 .end = CH_UART1_RX+1,
1161 .flags = IORESOURCE_DMA,
1162 },
5be36d22
GY		 1163};
1164
42bd8bcb 1165static struct platform_device bfin_sir1_device = {
5be36d22 1166 .name = "bfin_sir",
42bd8bcb
GY		 1167 .id = 1,
1168 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1169 .resource = bfin_sir1_resources,
5be36d22
GY		 1170};
1171#endif
42bd8bcb 1172#endif
5be36d22 1173
1394f032 1174#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1175static struct resource bfin_twi0_resource[] = {
1176 [0] = {
1177 .start = TWI0_REGBASE,
1178 .end = TWI0_REGBASE,
1179 .flags = IORESOURCE_MEM,
1180 },
1181 [1] = {
1182 .start = IRQ_TWI,
1183 .end = IRQ_TWI,
1184 .flags = IORESOURCE_IRQ,
1185 },
1186};
1187
1394f032
BW		 1188static struct platform_device i2c_bfin_twi_device = {
1189 .name = "i2c-bfin-twi",
1190 .id = 0,
c6c4d7bb
BW		 1191 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1192 .resource = bfin_twi0_resource,
1394f032
BW		 1193};
1194#endif
1195
51ed9ad7
MH		 1196#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1197#include <linux/input.h>
f39d56ec 1198#include <linux/i2c/adp5588.h>
51ed9ad7
MH		 1199static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1200 [0] = KEY_GRAVE,
1201 [1] = KEY_1,
1202 [2] = KEY_2,
1203 [3] = KEY_3,
1204 [4] = KEY_4,
1205 [5] = KEY_5,
1206 [6] = KEY_6,
1207 [7] = KEY_7,
1208 [8] = KEY_8,
1209 [9] = KEY_9,
1210 [10] = KEY_0,
1211 [11] = KEY_MINUS,
1212 [12] = KEY_EQUAL,
1213 [13] = KEY_BACKSLASH,
1214 [15] = KEY_KP0,
1215 [16] = KEY_Q,
1216 [17] = KEY_W,
1217 [18] = KEY_E,
1218 [19] = KEY_R,
1219 [20] = KEY_T,
1220 [21] = KEY_Y,
1221 [22] = KEY_U,
1222 [23] = KEY_I,
1223 [24] = KEY_O,
1224 [25] = KEY_P,
1225 [26] = KEY_LEFTBRACE,
1226 [27] = KEY_RIGHTBRACE,
1227 [29] = KEY_KP1,
1228 [30] = KEY_KP2,
1229 [31] = KEY_KP3,
1230 [32] = KEY_A,
1231 [33] = KEY_S,
1232 [34] = KEY_D,
1233 [35] = KEY_F,
1234 [36] = KEY_G,
1235 [37] = KEY_H,
1236 [38] = KEY_J,
1237 [39] = KEY_K,
1238 [40] = KEY_L,
1239 [41] = KEY_SEMICOLON,
1240 [42] = KEY_APOSTROPHE,
1241 [43] = KEY_BACKSLASH,
1242 [45] = KEY_KP4,
1243 [46] = KEY_KP5,
1244 [47] = KEY_KP6,
1245 [48] = KEY_102ND,
1246 [49] = KEY_Z,
1247 [50] = KEY_X,
1248 [51] = KEY_C,
1249 [52] = KEY_V,
1250 [53] = KEY_B,
1251 [54] = KEY_N,
1252 [55] = KEY_M,
1253 [56] = KEY_COMMA,
1254 [57] = KEY_DOT,
1255 [58] = KEY_SLASH,
1256 [60] = KEY_KPDOT,
1257 [61] = KEY_KP7,
1258 [62] = KEY_KP8,
1259 [63] = KEY_KP9,
1260 [64] = KEY_SPACE,
1261 [65] = KEY_BACKSPACE,
1262 [66] = KEY_TAB,
1263 [67] = KEY_KPENTER,
1264 [68] = KEY_ENTER,
1265 [69] = KEY_ESC,
1266 [70] = KEY_DELETE,
1267 [74] = KEY_KPMINUS,
1268 [76] = KEY_UP,
1269 [77] = KEY_DOWN,
1270 [78] = KEY_RIGHT,
1271 [79] = KEY_LEFT,
1272};
1273
1274static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1275 .rows = 8,
1276 .cols = 10,
1277 .keymap = adp5588_keymap,
1278 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1279 .repeat = 0,
1280};
1281#endif
1282
3ea57218
MH		 1283#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1284#include <linux/mfd/adp5520.h>
1285
1286 /*
1287 * ADP5520/5501 Backlight Data
1288 */
1289
1290static struct adp5520_backlight_platfrom_data adp5520_backlight_data = {
1291 .fade_in = FADE_T_1200ms,
1292 .fade_out = FADE_T_1200ms,
1293 .fade_led_law = BL_LAW_LINEAR,
1294 .en_ambl_sens = 1,
1295 .abml_filt = BL_AMBL_FILT_640ms,
1296 .l1_daylight_max = BL_CUR_mA(15),
1297 .l1_daylight_dim = BL_CUR_mA(0),
1298 .l2_office_max = BL_CUR_mA(7),
1299 .l2_office_dim = BL_CUR_mA(0),
1300 .l3_dark_max = BL_CUR_mA(3),
1301 .l3_dark_dim = BL_CUR_mA(0),
1302 .l2_trip = L2_COMP_CURR_uA(700),
1303 .l2_hyst = L2_COMP_CURR_uA(50),
1304 .l3_trip = L3_COMP_CURR_uA(80),
1305 .l3_hyst = L3_COMP_CURR_uA(20),
1306};
1307
1308 /*
1309 * ADP5520/5501 LEDs Data
1310 */
1311
1312#include <linux/leds.h>
1313
1314static struct led_info adp5520_leds[] = {
1315 {
1316 .name = "adp5520-led1",
1317 .default_trigger = "none",
1318 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | LED_OFFT_600ms,
1319 },
1320#ifdef ADP5520_EN_ALL_LEDS
1321 {
1322 .name = "adp5520-led2",
1323 .default_trigger = "none",
1324 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1325 },
1326 {
1327 .name = "adp5520-led3",
1328 .default_trigger = "none",
1329 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1330 },
1331#endif
1332};
1333
1334static struct adp5520_leds_platfrom_data adp5520_leds_data = {
1335 .num_leds = ARRAY_SIZE(adp5520_leds),
1336 .leds = adp5520_leds,
1337 .fade_in = FADE_T_600ms,
1338 .fade_out = FADE_T_600ms,
1339 .led_on_time = LED_ONT_600ms,
1340};
1341
1342 /*
1343 * ADP5520 GPIO Data
1344 */
1345
1346static struct adp5520_gpio_platfrom_data adp5520_gpio_data = {
1347 .gpio_start = 50,
1348 .gpio_en_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1349 .gpio_pullup_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1350};
1351
1352 /*
1353 * ADP5520 Keypad Data
1354 */
1355
1356#include <linux/input.h>
1357static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1358 [KEY(0, 0)] = KEY_GRAVE,
1359 [KEY(0, 1)] = KEY_1,
1360 [KEY(0, 2)] = KEY_2,
1361 [KEY(0, 3)] = KEY_3,
1362 [KEY(1, 0)] = KEY_4,
1363 [KEY(1, 1)] = KEY_5,
1364 [KEY(1, 2)] = KEY_6,
1365 [KEY(1, 3)] = KEY_7,
1366 [KEY(2, 0)] = KEY_8,
1367 [KEY(2, 1)] = KEY_9,
1368 [KEY(2, 2)] = KEY_0,
1369 [KEY(2, 3)] = KEY_MINUS,
1370 [KEY(3, 0)] = KEY_EQUAL,
1371 [KEY(3, 1)] = KEY_BACKSLASH,
1372 [KEY(3, 2)] = KEY_BACKSPACE,
1373 [KEY(3, 3)] = KEY_ENTER,
1374};
1375
1376static struct adp5520_keys_platfrom_data adp5520_keys_data = {
1377 .rows_en_mask = ROW_R3 | ROW_R2 | ROW_R1 | ROW_R0,
1378 .cols_en_mask = COL_C3 | COL_C2 | COL_C1 | COL_C0,
1379 .keymap = adp5520_keymap,
1380 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1381 .repeat = 0,
1382};
1383
1384 /*
1385 * ADP5520/5501 Multifuction Device Init Data
1386 */
1387
1388static struct adp5520_subdev_info adp5520_subdevs[] = {
1389 {
1390 .name = "adp5520-backlight",
1391 .id = ID_ADP5520,
1392 .platform_data = &adp5520_backlight_data,
1393 },
1394 {
1395 .name = "adp5520-led",
1396 .id = ID_ADP5520,
1397 .platform_data = &adp5520_leds_data,
1398 },
1399 {
1400 .name = "adp5520-gpio",
1401 .id = ID_ADP5520,
1402 .platform_data = &adp5520_gpio_data,
1403 },
1404 {
1405 .name = "adp5520-keys",
1406 .id = ID_ADP5520,
1407 .platform_data = &adp5520_keys_data,
1408 },
1409};
1410
1411static struct adp5520_platform_data adp5520_pdev_data = {
1412 .num_subdevs = ARRAY_SIZE(adp5520_subdevs),
1413 .subdevs = adp5520_subdevs,
1414};
1415
1416#endif
1417
ba877d44
MH		 1418#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1419#include <linux/i2c/adp5588.h>
1420static struct adp5588_gpio_platfrom_data adp5588_gpio_data = {
1421 .gpio_start = 50,
1422 .pullup_dis_mask = 0,
1423};
1424#endif
1425
81d9c7f2 1426static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
427f277e 1427#if defined(CONFIG_INPUT_EVAL_AD7142EB)
81d9c7f2 1428 {
427f277e 1429 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1430 .irq = IRQ_PG5,
427f277e 1431 .platform_data = (void *)&ad7142_platfrom_data,
81d9c7f2
BW		 1432 },
1433#endif
ebd58333 1434#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1435 {
1436 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1437 },
1438#endif
204844eb 1439#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1440 {
1441 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1442 .irq = IRQ_PG6,
1443 },
1444#endif
1445#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1446 {
1447 I2C_BOARD_INFO("ad7879", 0x2F),
1448 .irq = IRQ_PG5,
1449 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1450 },
1451#endif
51ed9ad7
MH		 1452#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1453 {
1454 I2C_BOARD_INFO("adp5588-keys", 0x34),
1455 .irq = IRQ_PG0,
1456 .platform_data = (void *)&adp5588_kpad_data,
1457 },
1458#endif
3ea57218
MH		 1459#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1460 {
1461 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1462 .irq = IRQ_PG0,
3ea57218
MH		 1463 .platform_data = (void *)&adp5520_pdev_data,
1464 },
1465#endif
ffc4d8bc
MH		 1466#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1467 {
1468 I2C_BOARD_INFO("adxl34x", 0x53),
1469 .irq = IRQ_PG3,
1470 .platform_data = (void *)&adxl34x_info,
1471 },
1472#endif
ba877d44
MH		 1473#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1474 {
1475 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1476 .platform_data = (void *)&adp5588_gpio_data,
1477 },
1478#endif
81d9c7f2 1479};
81d9c7f2 1480
1394f032
BW		 1481#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1482static struct platform_device bfin_sport0_uart_device = {
1483 .name = "bfin-sport-uart",
1484 .id = 0,
1485};
1486
1487static struct platform_device bfin_sport1_uart_device = {
1488 .name = "bfin-sport-uart",
1489 .id = 1,
1490};
1491#endif
1492
c6c4d7bb 1493#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 1494#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1495/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 1496
2c8beb2c
MH		 1497#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1498#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 1499static struct pata_platform_info bfin_pata_platform_data = {
1500 .ioport_shift = 1,
64e5c512 1501 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 1502};
1503
1504static struct resource bfin_pata_resources[] = {
1505 {
1506 .start = 0x20314020,
1507 .end = 0x2031403F,
1508 .flags = IORESOURCE_MEM,
1509 },
1510 {
1511 .start = 0x2031401C,
1512 .end = 0x2031401F,
1513 .flags = IORESOURCE_MEM,
1514 },
1515 {
1516 .start = PATA_INT,
1517 .end = PATA_INT,
1518 .flags = IORESOURCE_IRQ,
1519 },
1520};
2c8beb2c
MH		 1521#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1522static struct pata_platform_info bfin_pata_platform_data = {
1523 .ioport_shift = 0,
1524};
648882d9
MH		 1525/* CompactFlash Storage Card Memory Mapped Adressing
1526 * /REG = A11 = 1
1527 */
2c8beb2c
MH		 1528static struct resource bfin_pata_resources[] = {
1529 {
648882d9
MH		 1530 .start = 0x20211800,
1531 .end = 0x20211807,
2c8beb2c
MH		 1532 .flags = IORESOURCE_MEM,
1533 },
1534 {
648882d9
MH		 1535 .start = 0x2021180E, /* Device Ctl */
1536 .end = 0x2021180E,
2c8beb2c
MH		 1537 .flags = IORESOURCE_MEM,
1538 },
1539};
1540#endif
c6c4d7bb
BW		 1541
1542static struct platform_device bfin_pata_device = {
1543 .name = "pata_platform",
1544 .id = -1,
1545 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1546 .resource = bfin_pata_resources,
1547 .dev = {
1548 .platform_data = &bfin_pata_platform_data,
1549 }
1550};
1551#endif
1552
14b03204
MH		 1553static const unsigned int cclk_vlev_datasheet[] =
1554{
1555 VRPAIR(VLEV_085, 250000000),
1556 VRPAIR(VLEV_090, 376000000),
1557 VRPAIR(VLEV_095, 426000000),
1558 VRPAIR(VLEV_100, 426000000),
1559 VRPAIR(VLEV_105, 476000000),
1560 VRPAIR(VLEV_110, 476000000),
1561 VRPAIR(VLEV_115, 476000000),
1562 VRPAIR(VLEV_120, 500000000),
1563 VRPAIR(VLEV_125, 533000000),
1564 VRPAIR(VLEV_130, 600000000),
1565};
1566
1567static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1568 .tuple_tab = cclk_vlev_datasheet,
1569 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1570 .vr_settling_time = 25 /* us */,
1571};
1572
1573static struct platform_device bfin_dpmc = {
1574 .name = "bfin dpmc",
1575 .dev = {
1576 .platform_data = &bfin_dmpc_vreg_data,
1577 },
1578};
1579
8312440e
BS		 1580#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1581static struct platform_device bfin_tdm = {
1582 .name = "bfin-tdm",
1583 /* TODO: add platform data here */
1584};
1585#endif
1586
1394f032 1587static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1588
1589 &bfin_dpmc,
1590
1394f032
BW		 1591#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1592 &bfin_pcmcia_cf_device,
1593#endif
1594
1595#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1596 &rtc_device,
1597#endif
1598
1599#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1600 &sl811_hcd_device,
1601#endif
1602
1603#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1604 &isp1362_hcd_device,
1605#endif
1606
3f375690
MH		 1607#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1608 &bfin_isp1760_device,
1609#endif
1610
1394f032
BW		 1611#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1612 &smc91x_device,
1613#endif
1614
f40d24d9
AL		 1615#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1616 &dm9000_device,
1617#endif
1618
561cc18b
MH		 1619#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
1620 &ax88180_device,
1621#endif
1622
1394f032 1623#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1624 &bfin_mii_bus,
1394f032
BW		 1625 &bfin_mac_device,
1626#endif
1627
1628#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1629 &net2272_bfin_device,
1630#endif
1631
1632#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 1633 &bfin_spi0_device,
1394f032
BW		 1634#endif
1635
1e9aa955
CC		 1636#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1637 &bfin_sport_spi0_device,
1638 &bfin_sport_spi1_device,
1639#endif
1640
1394f032
BW		 1641#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1642 &bfin_fb_device,
1643#endif
1644
2043f3f7
MH		 1645#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1646 &bfin_lq035q1_device,
1647#endif
1648
c6c4d7bb
BW		 1649#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1650 &bfin_fb_adv7393_device,
1651#endif
1652
1394f032
BW		 1653#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1654 &bfin_uart_device,
1655#endif
1656
5be36d22 1657#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1658#ifdef CONFIG_BFIN_SIR0
1659 &bfin_sir0_device,
1660#endif
1661#ifdef CONFIG_BFIN_SIR1
1662 &bfin_sir1_device,
1663#endif
5be36d22
GY		 1664#endif
1665
1394f032
BW		 1666#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1667 &i2c_bfin_twi_device,
1668#endif
1669
1670#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1671 &bfin_sport0_uart_device,
1672 &bfin_sport1_uart_device,
1673#endif
c6c4d7bb
BW		 1674
1675#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1676 &bfin_pata_device,
1677#endif
2463ef22
MH		 1678
1679#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1680 &bfin_device_gpiokeys,
1681#endif
cad2ab65
MF		 1682
1683 &bfin_gpios_device,
793dc27b 1684
fc68911e
MF		 1685#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1686 &bfin_async_nand_device,
1687#endif
1688
793dc27b 1689#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 1690 &stamp_flash_device,
793dc27b 1691#endif
8312440e
BS		 1692
1693#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1694 &bfin_tdm,
1695#endif
1394f032
BW		 1696};
1697
1698static int __init stamp_init(void)
1699{
b85d858b 1700 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2
BW		 1701 i2c_register_board_info(0, bfin_i2c_board_info,
1702 ARRAY_SIZE(bfin_i2c_board_info));
fc68911e 1703 bfin_plat_nand_init();
1394f032 1704 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1705 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 1706
1394f032
BW		 1707 return 0;
1708}
1709
1710arch_initcall(stamp_init);
c6c4d7bb
BW		 1711
1712void native_machine_restart(char *cmd)
1713{
1714 /* workaround reboot hang when booting from SPI */
1715 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1716 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 1717}
137b1529
MF		 1718
1719/*
1720 * Currently the MAC address is saved in Flash by U-Boot
1721 */
1722#define FLASH_MAC 0x203f0000
9862cc52 1723void bfin_get_ether_addr(char *addr)
137b1529
MF		 1724{
1725 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
1726 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
1727}
9862cc52 1728EXPORT_SYMBOL(bfin_get_ether_addr);
kernel source for telekom puls (alcatel/mediatek)