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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf533 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
de8c43f2 13#include <linux/mtd/physmap.h>
1394f032
BW		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
2120b68f 16#include <linux/spi/mmc_spi.h>
1394f032 17#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 18#include <linux/usb/isp1362.h>
1394f032 19#endif
1f83b8f1 20#include <linux/irq.h>
81d9c7f2 21#include <linux/i2c.h>
c6c4d7bb 22#include <asm/dma.h>
1394f032 23#include <asm/bfin5xx_spi.h>
c6c4d7bb 24#include <asm/reboot.h>
5d448dd5 25#include <asm/portmux.h>
14b03204 26#include <asm/dpmc.h>
1394f032
BW		 27
28/*
29 * Name the Board for the /proc/cpuinfo
30 */
fe85cad2 31const char bfin_board_name[] = "ADI BF533-STAMP";
1394f032
BW		 32
33#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
34static struct platform_device rtc_device = {
35 .name = "rtc-bfin",
36 .id = -1,
37};
38#endif
39
40/*
41 * Driver needs to know address, irq and flag pin.
42 */
43#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 44#include <linux/smc91x.h>
45
46static struct smc91x_platdata smc91x_info = {
47 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
48 .leda = RPC_LED_100_10,
49 .ledb = RPC_LED_TX_RX,
50};
51
1394f032
BW		 52static struct resource smc91x_resources[] = {
53 {
54 .name = "smc91x-regs",
55 .start = 0x20300300,
56 .end = 0x20300300 + 16,
57 .flags = IORESOURCE_MEM,
1f83b8f1 58 }, {
1394f032
BW		 59 .start = IRQ_PF7,
60 .end = IRQ_PF7,
61 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
62 },
63};
64
65static struct platform_device smc91x_device = {
66 .name = "smc91x",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(smc91x_resources),
69 .resource = smc91x_resources,
61f09b5a
MH		 70 .dev = {
71 .platform_data = &smc91x_info,
72 },
1394f032
BW		 73};
74#endif
75
76#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
77static struct resource net2272_bfin_resources[] = {
78 {
79 .start = 0x20300000,
80 .end = 0x20300000 + 0x100,
81 .flags = IORESOURCE_MEM,
9be8631b
MF		 82 }, {
83 .start = 1,
84 .flags = IORESOURCE_BUS,
1f83b8f1 85 }, {
1394f032
BW		 86 .start = IRQ_PF10,
87 .end = IRQ_PF10,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
89 },
90};
91
92static struct platform_device net2272_bfin_device = {
93 .name = "net2272",
94 .id = -1,
95 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
96 .resource = net2272_bfin_resources,
97};
98#endif
99
9cd9c616 100#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
de8c43f2
MF		 101static struct mtd_partition stamp_partitions[] = {
102 {
aa582977 103 .name = "bootloader(nor)",
edf05641 104 .size = 0x40000,
de8c43f2
MF		 105 .offset = 0,
106 }, {
aa582977 107 .name = "linux kernel(nor)",
6ecb5b6d 108 .size = 0x180000,
de8c43f2
MF		 109 .offset = MTDPART_OFS_APPEND,
110 }, {
aa582977 111 .name = "file system(nor)",
de8c43f2
MF		 112 .size = MTDPART_SIZ_FULL,
113 .offset = MTDPART_OFS_APPEND,
114 }
115};
116
117static struct physmap_flash_data stamp_flash_data = {
118 .width = 2,
119 .parts = stamp_partitions,
120 .nr_parts = ARRAY_SIZE(stamp_partitions),
121};
122
123static struct resource stamp_flash_resource[] = {
124 {
125 .name = "cfi_probe",
126 .start = 0x20000000,
127 .end = 0x203fffff,
128 .flags = IORESOURCE_MEM,
129 }, {
9cd9c616
MF		 130 .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */
131 .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */
132 .flags = IORESOURCE_MEM,
133 }, {
134 .start = GPIO_PF0,
de8c43f2
MF		 135 .flags = IORESOURCE_IRQ,
136 }
137};
138
139static struct platform_device stamp_flash_device = {
9cd9c616 140 .name = "bfin-async-flash",
de8c43f2
MF		 141 .id = 0,
142 .dev = {
143 .platform_data = &stamp_flash_data,
144 },
145 .num_resources = ARRAY_SIZE(stamp_flash_resource),
146 .resource = stamp_flash_resource,
147};
793dc27b 148#endif
de8c43f2 149
1394f032
BW		 150#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
151static struct mtd_partition bfin_spi_flash_partitions[] = {
152 {
aa582977 153 .name = "bootloader(spi)",
edf05641 154 .size = 0x00040000,
1394f032
BW		 155 .offset = 0,
156 .mask_flags = MTD_CAP_ROM
1f83b8f1 157 }, {
aa582977 158 .name = "linux kernel(spi)",
6ecb5b6d 159 .size = 0x180000,
edf05641 160 .offset = MTDPART_OFS_APPEND,
1f83b8f1 161 }, {
aa582977 162 .name = "file system(spi)",
edf05641
MF		 163 .size = MTDPART_SIZ_FULL,
164 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 165 }
166};
167
168static struct flash_platform_data bfin_spi_flash_data = {
169 .name = "m25p80",
170 .parts = bfin_spi_flash_partitions,
171 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
172 .type = "m25p64",
173};
174
175/* SPI flash chip (m25p64) */
176static struct bfin5xx_spi_chip spi_flash_chip_info = {
177 .enable_dma = 0, /* use dma transfer with this chip*/
6e668936
MH		 178};
179#endif
180
2120b68f
YL		 181#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
182#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
183static int bfin_mmc_spi_init(struct device *dev,
184 irqreturn_t (*detect_int)(int, void *), void *data)
185{
186 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
187 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
188 "mmc-spi-detect", data);
189}
190
191static void bfin_mmc_spi_exit(struct device *dev, void *data)
192{
193 free_irq(MMC_SPI_CARD_DETECT_INT, data);
194}
195
196static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
197 .init = bfin_mmc_spi_init,
198 .exit = bfin_mmc_spi_exit,
199 .detect_delay = 100, /* msecs */
200};
201
202static struct bfin5xx_spi_chip mmc_spi_chip_info = {
203 .enable_dma = 0,
2120b68f
YL		 204 .pio_interrupt = 0,
205};
206#endif
207
1394f032
BW		 208static struct spi_board_info bfin_spi_board_info[] __initdata = {
209#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
210 {
211 /* the modalias must be the same as spi device driver name */
212 .modalias = "m25p80", /* Name of spi_driver for this device */
213 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 214 .bus_num = 0, /* Framework bus number */
1394f032
BW		 215 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
216 .platform_data = &bfin_spi_flash_data,
217 .controller_data = &spi_flash_chip_info,
218 .mode = SPI_MODE_3,
219 },
220#endif
221
1f11a10d
BL		 222#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
223 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032 224 {
1f11a10d 225 .modalias = "ad1836",
858c5e9a 226 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 227 .bus_num = 0,
7ba80063
BS		 228 .chip_select = 4,
229 .platform_data = "ad1836", /* only includes chip name for the moment */
7ba80063 230 .mode = SPI_MODE_3,
1394f032
BW		 231 },
232#endif
233
6e668936
MH		 234#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
235 {
236 .modalias = "spidev",
237 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
238 .bus_num = 0,
239 .chip_select = 1,
6e668936
MH		 240 },
241#endif
2120b68f
YL		 242#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
243 {
244 .modalias = "mmc_spi",
245 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
246 .bus_num = 0,
247 .chip_select = 4,
248 .platform_data = &bfin_mmc_spi_pdata,
249 .controller_data = &mmc_spi_chip_info,
250 .mode = SPI_MODE_3,
251 },
252#endif
1394f032
BW		 253};
254
7d157fb0 255#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
c6c4d7bb
BW		 256/* SPI (0) */
257static struct resource bfin_spi0_resource[] = {
258 [0] = {
259 .start = SPI0_REGBASE,
260 .end = SPI0_REGBASE + 0xFF,
261 .flags = IORESOURCE_MEM,
262 },
263 [1] = {
264 .start = CH_SPI,
265 .end = CH_SPI,
53122693
YL		 266 .flags = IORESOURCE_DMA,
267 },
268 [2] = {
269 .start = IRQ_SPI,
270 .end = IRQ_SPI,
c6c4d7bb
BW		 271 .flags = IORESOURCE_IRQ,
272 }
273};
274
1394f032 275/* SPI controller data */
c6c4d7bb 276static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 277 .num_chipselect = 8,
278 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 279 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 280};
281
c6c4d7bb
BW		 282static struct platform_device bfin_spi0_device = {
283 .name = "bfin-spi",
284 .id = 0, /* Bus number */
285 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
286 .resource = bfin_spi0_resource,
1394f032 287 .dev = {
c6c4d7bb 288 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 289 },
290};
291#endif /* spi master and devices */
292
1394f032 293#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 294#ifdef CONFIG_SERIAL_BFIN_UART0
295static struct resource bfin_uart0_resources[] = {
1394f032 296 {
6bd1fbea
SZ		 297 .start = BFIN_UART_THR,
298 .end = BFIN_UART_GCTL+2,
1394f032
BW		 299 .flags = IORESOURCE_MEM,
300 },
edb0a640
SZ		 301 {
302 .start = IRQ_UART0_TX,
303 .end = IRQ_UART0_TX,
304 .flags = IORESOURCE_IRQ,
305 },
6bd1fbea
SZ		 306 {
307 .start = IRQ_UART0_RX,
edb0a640 308 .end = IRQ_UART0_RX,
6bd1fbea
SZ		 309 .flags = IORESOURCE_IRQ,
310 },
311 {
312 .start = IRQ_UART0_ERROR,
313 .end = IRQ_UART0_ERROR,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
317 .start = CH_UART0_TX,
318 .end = CH_UART0_TX,
319 .flags = IORESOURCE_DMA,
320 },
321 {
322 .start = CH_UART0_RX,
323 .end = CH_UART0_RX,
324 .flags = IORESOURCE_DMA,
325 },
326};
327
a8b19886 328static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea 329 P_UART0_TX, P_UART0_RX, 0
1394f032
BW		 330};
331
6bd1fbea 332static struct platform_device bfin_uart0_device = {
1394f032 333 .name = "bfin-uart",
6bd1fbea
SZ		 334 .id = 0,
335 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
336 .resource = bfin_uart0_resources,
337 .dev = {
338 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
339 },
1394f032
BW		 340};
341#endif
6bd1fbea 342#endif
1394f032 343
5be36d22 344#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 345#ifdef CONFIG_BFIN_SIR0
42bd8bcb 346static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 347 {
348 .start = 0xFFC00400,
349 .end = 0xFFC004FF,
350 .flags = IORESOURCE_MEM,
351 },
42bd8bcb
GY		 352 {
353 .start = IRQ_UART0_RX,
354 .end = IRQ_UART0_RX+1,
355 .flags = IORESOURCE_IRQ,
356 },
357 {
358 .start = CH_UART0_RX,
359 .end = CH_UART0_RX+1,
360 .flags = IORESOURCE_DMA,
361 },
5be36d22
GY		 362};
363
42bd8bcb 364static struct platform_device bfin_sir0_device = {
5be36d22
GY		 365 .name = "bfin_sir",
366 .id = 0,
42bd8bcb
GY		 367 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
368 .resource = bfin_sir0_resources,
5be36d22
GY		 369};
370#endif
42bd8bcb 371#endif
5be36d22 372
1394f032 373#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 374#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
375static struct resource bfin_sport0_uart_resources[] = {
376 {
377 .start = SPORT0_TCR1,
378 .end = SPORT0_MRCS3+4,
379 .flags = IORESOURCE_MEM,
380 },
381 {
382 .start = IRQ_SPORT0_RX,
383 .end = IRQ_SPORT0_RX+1,
384 .flags = IORESOURCE_IRQ,
385 },
386 {
387 .start = IRQ_SPORT0_ERROR,
388 .end = IRQ_SPORT0_ERROR,
389 .flags = IORESOURCE_IRQ,
390 },
391};
392
a8b19886 393static unsigned short bfin_sport0_peripherals[] = {
df5de261 394 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
e54b6730 395 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
df5de261
SZ		 396};
397
1394f032
BW		 398static struct platform_device bfin_sport0_uart_device = {
399 .name = "bfin-sport-uart",
400 .id = 0,
df5de261
SZ		 401 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
402 .resource = bfin_sport0_uart_resources,
403 .dev = {
404 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
405 },
406};
407#endif
408#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
409static struct resource bfin_sport1_uart_resources[] = {
410 {
411 .start = SPORT1_TCR1,
412 .end = SPORT1_MRCS3+4,
413 .flags = IORESOURCE_MEM,
414 },
415 {
416 .start = IRQ_SPORT1_RX,
417 .end = IRQ_SPORT1_RX+1,
418 .flags = IORESOURCE_IRQ,
419 },
420 {
421 .start = IRQ_SPORT1_ERROR,
422 .end = IRQ_SPORT1_ERROR,
423 .flags = IORESOURCE_IRQ,
424 },
425};
426
a8b19886 427static unsigned short bfin_sport1_peripherals[] = {
df5de261 428 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
e54b6730 429 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
1394f032
BW		 430};
431
432static struct platform_device bfin_sport1_uart_device = {
433 .name = "bfin-sport-uart",
434 .id = 1,
df5de261
SZ		 435 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
436 .resource = bfin_sport1_uart_resources,
437 .dev = {
438 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
439 },
1394f032
BW		 440};
441#endif
df5de261 442#endif
1394f032 443
2463ef22
MH		 444#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
445#include <linux/input.h>
446#include <linux/gpio_keys.h>
447
448static struct gpio_keys_button bfin_gpio_keys_table[] = {
f1bceb47
MH		 449 {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
450 {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
451 {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
2463ef22
MH		 452};
453
454static struct gpio_keys_platform_data bfin_gpio_keys_data = {
455 .buttons = bfin_gpio_keys_table,
456 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
457};
458
459static struct platform_device bfin_device_gpiokeys = {
460 .name = "gpio-keys",
461 .dev = {
462 .platform_data = &bfin_gpio_keys_data,
463 },
464};
465#endif
466
e3163954
BW		 467#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
468#include <linux/i2c-gpio.h>
469
470static struct i2c_gpio_platform_data i2c_gpio_data = {
3d7dc883
MF		 471 .sda_pin = GPIO_PF2,
472 .scl_pin = GPIO_PF3,
e3163954
BW		 473 .sda_is_open_drain = 0,
474 .scl_is_open_drain = 0,
7c8e62de 475 .udelay = 10,
e3163954
BW		 476};
477
478static struct platform_device i2c_gpio_device = {
479 .name = "i2c-gpio",
480 .id = 0,
481 .dev = {
482 .platform_data = &i2c_gpio_data,
483 },
484};
485#endif
486
81d9c7f2
BW		 487static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
488#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
489 {
490 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
81d9c7f2
BW		 491 .irq = 39,
492 },
493#endif
ebd58333 494#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 495 {
496 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 497 },
498#endif
204844eb 499#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 500 {
501 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
81d9c7f2
BW		 502 .irq = 39,
503 },
504#endif
50c4c086
MH		 505#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
506 {
507 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
508 },
509#endif
39d3c1ca 510#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
511 {
512 I2C_BOARD_INFO("ad5252", 0x2f),
513 },
514#endif
81d9c7f2 515};
81d9c7f2 516
14b03204
MH		 517static const unsigned int cclk_vlev_datasheet[] =
518{
519 VRPAIR(VLEV_085, 250000000),
520 VRPAIR(VLEV_090, 376000000),
521 VRPAIR(VLEV_095, 426000000),
522 VRPAIR(VLEV_100, 426000000),
523 VRPAIR(VLEV_105, 476000000),
524 VRPAIR(VLEV_110, 476000000),
525 VRPAIR(VLEV_115, 476000000),
526 VRPAIR(VLEV_120, 600000000),
527 VRPAIR(VLEV_125, 600000000),
528 VRPAIR(VLEV_130, 600000000),
529};
530
531static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
532 .tuple_tab = cclk_vlev_datasheet,
533 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
534 .vr_settling_time = 25 /* us */,
535};
536
537static struct platform_device bfin_dpmc = {
538 .name = "bfin dpmc",
539 .dev = {
540 .platform_data = &bfin_dmpc_vreg_data,
541 },
542};
543
e7da2662
BL		 544#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
545 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) \
546 || defined(CONFIG_SND_BF5XX_AC97) || \
547 defined(CONFIG_SND_BF5XX_AC97_MODULE)
548
549#include <asm/bfin_sport.h>
550
551#define SPORT_REQ(x) \
552 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
553 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
554
555static const u16 bfin_snd_pin[][7] = {
556 SPORT_REQ(0),
557 SPORT_REQ(1),
558};
559
560static struct bfin_snd_platform_data bfin_snd_data[] = {
561 {
562 .pin_req = &bfin_snd_pin[0][0],
563 },
564 {
565 .pin_req = &bfin_snd_pin[1][0],
566 },
567};
568
569#define BFIN_SND_RES(x) \
570 [x] = { \
571 { \
572 .start = SPORT##x##_TCR1, \
573 .end = SPORT##x##_TCR1, \
574 .flags = IORESOURCE_MEM \
575 }, \
576 { \
577 .start = CH_SPORT##x##_RX, \
578 .end = CH_SPORT##x##_RX, \
579 .flags = IORESOURCE_DMA, \
580 }, \
581 { \
582 .start = CH_SPORT##x##_TX, \
583 .end = CH_SPORT##x##_TX, \
584 .flags = IORESOURCE_DMA, \
585 }, \
586 { \
587 .start = IRQ_SPORT##x##_ERROR, \
588 .end = IRQ_SPORT##x##_ERROR, \
589 .flags = IORESOURCE_IRQ, \
590 } \
591 }
592
593static struct resource bfin_snd_resources[][4] = {
594 BFIN_SND_RES(0),
595 BFIN_SND_RES(1),
596};
597#endif
598
7e1082b7 599#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
e7da2662
BL		 600static struct platform_device bfin_i2s_pcm = {
601 .name = "bfin-i2s-pcm-audio",
602 .id = -1,
603};
604#endif
605
606#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
607static struct platform_device bfin_tdm_pcm = {
608 .name = "bfin-tdm-pcm-audio",
609 .id = -1,
610};
611#endif
612
613#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
614static struct platform_device bfin_ac97_pcm = {
615 .name = "bfin-ac97-pcm-audio",
616 .id = -1,
617};
618#endif
619
63f49dce
SJ		 620#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
621 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
622static const char * const ad1836_link[] = {
623 "bfin-tdm.0",
624 "spi0.4",
625};
626static struct platform_device bfin_ad1836_machine = {
627 .name = "bfin-snd-ad1836",
628 .id = -1,
629 .dev = {
630 .platform_data = (void *)ad1836_link,
631 },
632};
633#endif
634
e7da2662
BL		 635#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
636 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
637static const unsigned ad73311_gpio[] = {
638 GPIO_PF4,
639};
640
641static struct platform_device bfin_ad73311_machine = {
642 .name = "bfin-snd-ad73311",
643 .id = 1,
644 .dev = {
645 .platform_data = (void *)ad73311_gpio,
646 },
647};
648#endif
649
650#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
651static struct platform_device bfin_ad73311_codec_device = {
652 .name = "ad73311",
653 .id = -1,
654};
655#endif
656
657#if defined(CONFIG_SND_SOC_AD74111) || defined(CONFIG_SND_SOC_AD74111_MODULE)
658static struct platform_device bfin_ad74111_codec_device = {
659 .name = "ad74111",
660 .id = -1,
661};
662#endif
663
664#if defined(CONFIG_SND_BF5XX_SOC_I2S) || \
665 defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
7e1082b7
BS		 666static struct platform_device bfin_i2s = {
667 .name = "bfin-i2s",
668 .id = CONFIG_SND_BF5XX_SPORT_NUM,
e7da2662
BL		 669 .num_resources =
670 ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
671 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
672 .dev = {
673 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
674 },
7e1082b7
BS		 675};
676#endif
677
e7da2662
BL		 678#if defined(CONFIG_SND_BF5XX_SOC_TDM) || \
679 defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
7e1082b7
BS		 680static struct platform_device bfin_tdm = {
681 .name = "bfin-tdm",
682 .id = CONFIG_SND_BF5XX_SPORT_NUM,
e7da2662
BL		 683 .num_resources =
684 ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
685 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
686 .dev = {
687 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
688 },
7e1082b7
BS		 689};
690#endif
691
e7da2662
BL		 692#if defined(CONFIG_SND_BF5XX_SOC_AC97) || \
693 defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
7e1082b7
BS		 694static struct platform_device bfin_ac97 = {
695 .name = "bfin-ac97",
696 .id = CONFIG_SND_BF5XX_SPORT_NUM,
e7da2662
BL		 697 .num_resources =
698 ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
699 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
700 .dev = {
701 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
702 },
7e1082b7
BS		 703};
704#endif
705
1394f032 706static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 707
708 &bfin_dpmc,
709
1394f032
BW		 710#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
711 &rtc_device,
712#endif
713
714#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
715 &smc91x_device,
716#endif
717
718#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
719 &net2272_bfin_device,
720#endif
721
7d157fb0 722#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
c6c4d7bb 723 &bfin_spi0_device,
1394f032
BW		 724#endif
725
726#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 727#ifdef CONFIG_SERIAL_BFIN_UART0
728 &bfin_uart0_device,
729#endif
1394f032
BW		 730#endif
731
5be36d22 732#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 733#ifdef CONFIG_BFIN_SIR0
734 &bfin_sir0_device,
735#endif
5be36d22
GY		 736#endif
737
e7da2662
BL		 738#if defined(CONFIG_SERIAL_BFIN_SPORT) || \
739 defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 740#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1394f032 741 &bfin_sport0_uart_device,
df5de261
SZ		 742#endif
743#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1394f032
BW		 744 &bfin_sport1_uart_device,
745#endif
df5de261 746#endif
c6c4d7bb 747
2463ef22
MH		 748#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
749 &bfin_device_gpiokeys,
750#endif
e3163954
BW		 751
752#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
753 &i2c_gpio_device,
754#endif
cad2ab65 755
9cd9c616 756#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
de8c43f2 757 &stamp_flash_device,
793dc27b 758#endif
7e1082b7
BS		 759
760#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
e7da2662 761 &bfin_i2s_pcm,
7e1082b7
BS		 762#endif
763
764#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
e7da2662 765 &bfin_tdm_pcm,
7e1082b7
BS		 766#endif
767
768#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
e7da2662
BL		 769 &bfin_ac97_pcm,
770#endif
771
63f49dce
SJ		 772#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
773 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
774 &bfin_ad1836_machine,
775#endif
776
e7da2662
BL		 777#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
778 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
779 &bfin_ad73311_machine,
780#endif
781
782#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
783 &bfin_ad73311_codec_device,
784#endif
785
786#if defined(CONFIG_SND_SOC_AD74111) || defined(CONFIG_SND_SOC_AD74111_MODULE)
787 &bfin_ad74111_codec_device,
788#endif
789
790#if defined(CONFIG_SND_BF5XX_SOC_I2S) || \
791 defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
792 &bfin_i2s,
793#endif
794
795#if defined(CONFIG_SND_BF5XX_SOC_TDM) || \
796 defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
797 &bfin_tdm,
798#endif
799
800#if defined(CONFIG_SND_BF5XX_SOC_AC97) || \
801 defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
7e1082b7
BS		 802 &bfin_ac97,
803#endif
1394f032
BW		 804};
805
9be8631b
MF		 806static int __init net2272_init(void)
807{
808#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
809 int ret;
810
811 /* Set PF0 to 0, PF1 to 1 make /AMS3 work properly */
812 ret = gpio_request(GPIO_PF0, "net2272");
813 if (ret)
814 return ret;
815
816 ret = gpio_request(GPIO_PF1, "net2272");
817 if (ret) {
818 gpio_free(GPIO_PF0);
819 return ret;
820 }
821
822 ret = gpio_request(GPIO_PF11, "net2272");
823 if (ret) {
824 gpio_free(GPIO_PF0);
825 gpio_free(GPIO_PF1);
826 return ret;
827 }
828
829 gpio_direction_output(GPIO_PF0, 0);
830 gpio_direction_output(GPIO_PF1, 1);
831
832 /* Reset the USB chip */
833 gpio_direction_output(GPIO_PF11, 0);
834 mdelay(2);
835 gpio_set_value(GPIO_PF11, 1);
836#endif
837
838 return 0;
839}
840
1394f032
BW		 841static int __init stamp_init(void)
842{
c0fc525d
MF		 843 int ret;
844
b85d858b 845 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2 846
81d9c7f2
BW		 847 i2c_register_board_info(0, bfin_i2c_board_info,
848 ARRAY_SIZE(bfin_i2c_board_info));
81d9c7f2 849
c0fc525d
MF		 850 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
851 if (ret < 0)
852 return ret;
853
854#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
30e9b95a
MF		 855 /*
856 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
857 * the bfin-async-map driver takes care of flipping between
858 * flash and ethernet when necessary.
859 */
860 ret = gpio_request(GPIO_PF0, "enet_cpld");
861 if (!ret) {
862 gpio_direction_output(GPIO_PF0, 1);
863 gpio_free(GPIO_PF0);
864 }
c0fc525d
MF		 865#endif
866
9be8631b
MF		 867 if (net2272_init())
868 pr_warning("unable to configure net2272; it probably won't work\n");
869
5bda2723 870 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 871 return 0;
1394f032
BW		 872}
873
874arch_initcall(stamp_init);
c6c4d7bb 875
c13ce9fd
SZ		 876static struct platform_device *stamp_early_devices[] __initdata = {
877#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
878#ifdef CONFIG_SERIAL_BFIN_UART0
879 &bfin_uart0_device,
880#endif
881#endif
882
883#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
884#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
885 &bfin_sport0_uart_device,
886#endif
887#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
888 &bfin_sport1_uart_device,
889#endif
890#endif
891};
892
893void __init native_machine_early_platform_add_devices(void)
894{
895 printk(KERN_INFO "register early platform devices\n");
896 early_platform_add_devices(stamp_early_devices,
897 ARRAY_SIZE(stamp_early_devices));
898}
899
c6c4d7bb
BW		 900void native_machine_restart(char *cmd)
901{
9cd9c616 902 /* workaround pull up on cpld / flash pin not being strong enough */
30e9b95a
MF		 903 gpio_request(GPIO_PF0, "flash_cpld");
904 gpio_direction_output(GPIO_PF0, 0);
c6c4d7bb 905}
kernel source for telekom puls (alcatel/mediatek)