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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf533 / boards / ezkit.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
4d5e6fd4 13#include <linux/mtd/plat-ram.h>
7036c61f 14#include <linux/mtd/physmap.h>
1394f032
BW		 15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
67f2d33e 17#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 18#include <linux/usb/isp1362.h>
67f2d33e 19#endif
1f83b8f1 20#include <linux/irq.h>
50c4c086 21#include <linux/i2c.h>
c6c4d7bb 22#include <asm/dma.h>
1394f032 23#include <asm/bfin5xx_spi.h>
5d448dd5 24#include <asm/portmux.h>
14b03204 25#include <asm/dpmc.h>
1394f032
BW		 26
27/*
28 * Name the Board for the /proc/cpuinfo
29 */
fe85cad2 30const char bfin_board_name[] = "ADI BF533-EZKIT";
1394f032
BW		 31
32#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
33static struct platform_device rtc_device = {
34 .name = "rtc-bfin",
35 .id = -1,
36};
37#endif
38
39/*
40 * USB-LAN EzExtender board
41 * Driver needs to know address, irq and flag pin.
42 */
43#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 44#include <linux/smc91x.h>
45
46static struct smc91x_platdata smc91x_info = {
47 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
48 .leda = RPC_LED_100_10,
49 .ledb = RPC_LED_TX_RX,
50};
51
1394f032
BW		 52static struct resource smc91x_resources[] = {
53 {
54 .name = "smc91x-regs",
55 .start = 0x20310300,
56 .end = 0x20310300 + 16,
57 .flags = IORESOURCE_MEM,
1f83b8f1 58 }, {
1394f032
BW		 59 .start = IRQ_PF9,
60 .end = IRQ_PF9,
61 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
62 },
63};
64static struct platform_device smc91x_device = {
65 .name = "smc91x",
66 .id = 0,
67 .num_resources = ARRAY_SIZE(smc91x_resources),
68 .resource = smc91x_resources,
61f09b5a
MH		 69 .dev = {
70 .platform_data = &smc91x_info,
71 },
1394f032
BW		 72};
73#endif
74
7036c61f
MF		 75#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
76static struct mtd_partition ezkit_partitions_a[] = {
77 {
78 .name = "bootloader(nor a)",
79 .size = 0x40000,
80 .offset = 0,
81 }, {
82 .name = "linux kernel(nor a)",
83 .size = MTDPART_SIZ_FULL,
84 .offset = MTDPART_OFS_APPEND,
85 },
4d5e6fd4
MF		 86};
87
7036c61f
MF		 88static struct physmap_flash_data ezkit_flash_data_a = {
89 .width = 2,
90 .parts = ezkit_partitions_a,
91 .nr_parts = ARRAY_SIZE(ezkit_partitions_a),
4d5e6fd4
MF		 92};
93
7036c61f 94static struct resource ezkit_flash_resource_a = {
4d5e6fd4
MF		 95 .start = 0x20000000,
96 .end = 0x200fffff,
97 .flags = IORESOURCE_MEM,
98};
99
7036c61f
MF		 100static struct platform_device ezkit_flash_device_a = {
101 .name = "physmap-flash",
4d5e6fd4
MF		 102 .id = 0,
103 .dev = {
7036c61f 104 .platform_data = &ezkit_flash_data_a,
4d5e6fd4
MF		 105 },
106 .num_resources = 1,
7036c61f
MF		 107 .resource = &ezkit_flash_resource_a,
108};
109
110static struct mtd_partition ezkit_partitions_b[] = {
111 {
112 .name = "file system(nor b)",
113 .size = MTDPART_SIZ_FULL,
114 .offset = MTDPART_OFS_APPEND,
115 },
4d5e6fd4
MF		 116};
117
7036c61f
MF		 118static struct physmap_flash_data ezkit_flash_data_b = {
119 .width = 2,
120 .parts = ezkit_partitions_b,
121 .nr_parts = ARRAY_SIZE(ezkit_partitions_b),
4d5e6fd4
MF		 122};
123
7036c61f 124static struct resource ezkit_flash_resource_b = {
4d5e6fd4
MF		 125 .start = 0x20100000,
126 .end = 0x201fffff,
127 .flags = IORESOURCE_MEM,
128};
129
7036c61f
MF		 130static struct platform_device ezkit_flash_device_b = {
131 .name = "physmap-flash",
4d5e6fd4
MF		 132 .id = 4,
133 .dev = {
7036c61f 134 .platform_data = &ezkit_flash_data_b,
4d5e6fd4
MF		 135 },
136 .num_resources = 1,
7036c61f 137 .resource = &ezkit_flash_resource_b,
4d5e6fd4
MF		 138};
139#endif
140
141#if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE)
142static struct platdata_mtd_ram sram_data_a = {
143 .mapname = "Flash A SRAM",
144 .bankwidth = 2,
145};
146
147static struct resource sram_resource_a = {
148 .start = 0x20240000,
149 .end = 0x2024ffff,
150 .flags = IORESOURCE_MEM,
151};
152
153static struct platform_device sram_device_a = {
154 .name = "mtd-ram",
155 .id = 8,
156 .dev = {
157 .platform_data = &sram_data_a,
158 },
159 .num_resources = 1,
160 .resource = &sram_resource_a,
161};
162
163static struct platdata_mtd_ram sram_data_b = {
164 .mapname = "Flash B SRAM",
165 .bankwidth = 2,
166};
167
168static struct resource sram_resource_b = {
169 .start = 0x202c0000,
170 .end = 0x202cffff,
171 .flags = IORESOURCE_MEM,
172};
173
174static struct platform_device sram_device_b = {
175 .name = "mtd-ram",
176 .id = 9,
177 .dev = {
178 .platform_data = &sram_data_b,
179 },
180 .num_resources = 1,
181 .resource = &sram_resource_b,
182};
183#endif
184
1394f032
BW		 185#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
186static struct mtd_partition bfin_spi_flash_partitions[] = {
187 {
aa582977 188 .name = "bootloader(spi)",
1394f032
BW		 189 .size = 0x00020000,
190 .offset = 0,
191 .mask_flags = MTD_CAP_ROM
1f83b8f1 192 }, {
aa582977 193 .name = "linux kernel(spi)",
1394f032 194 .size = 0xe0000,
edf05641 195 .offset = MTDPART_OFS_APPEND,
1f83b8f1 196 }, {
aa582977 197 .name = "file system(spi)",
edf05641
MF		 198 .size = MTDPART_SIZ_FULL,
199 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 200 }
201};
202
203static struct flash_platform_data bfin_spi_flash_data = {
204 .name = "m25p80",
205 .parts = bfin_spi_flash_partitions,
206 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
207 .type = "m25p64",
208};
209
210/* SPI flash chip (m25p64) */
211static struct bfin5xx_spi_chip spi_flash_chip_info = {
212 .enable_dma = 0, /* use dma transfer with this chip*/
6e668936
MH		 213};
214#endif
215
1394f032
BW		 216static struct spi_board_info bfin_spi_board_info[] __initdata = {
217#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
218 {
219 /* the modalias must be the same as spi device driver name */
220 .modalias = "m25p80", /* Name of spi_driver for this device */
221 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 222 .bus_num = 0, /* Framework bus number */
1394f032
BW		 223 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
224 .platform_data = &bfin_spi_flash_data,
225 .controller_data = &spi_flash_chip_info,
226 .mode = SPI_MODE_3,
227 },
228#endif
229
7ba80063 230#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032 231 {
7ba80063 232 .modalias = "ad183x",
1394f032 233 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 234 .bus_num = 0,
7ba80063 235 .chip_select = 4,
1394f032
BW		 236 },
237#endif
6e668936
MH		 238#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
239 {
240 .modalias = "spidev",
241 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
242 .bus_num = 0,
243 .chip_select = 1,
6e668936
MH		 244 },
245#endif
1394f032
BW		 246};
247
7d157fb0 248#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
c6c4d7bb
BW		 249/* SPI (0) */
250static struct resource bfin_spi0_resource[] = {
251 [0] = {
252 .start = SPI0_REGBASE,
253 .end = SPI0_REGBASE + 0xFF,
254 .flags = IORESOURCE_MEM,
255 },
256 [1] = {
257 .start = CH_SPI,
258 .end = CH_SPI,
53122693
YL		 259 .flags = IORESOURCE_DMA,
260 },
261 [2] = {
262 .start = IRQ_SPI,
263 .end = IRQ_SPI,
c6c4d7bb
BW		 264 .flags = IORESOURCE_IRQ,
265 }
266};
267
1394f032 268/* SPI controller data */
c6c4d7bb 269static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 270 .num_chipselect = 8,
271 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 272 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 273};
274
c6c4d7bb
BW		 275static struct platform_device bfin_spi0_device = {
276 .name = "bfin-spi",
277 .id = 0, /* Bus number */
278 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
279 .resource = bfin_spi0_resource,
1394f032 280 .dev = {
c6c4d7bb 281 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 282 },
283};
284#endif /* spi master and devices */
285
286#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 287#ifdef CONFIG_SERIAL_BFIN_UART0
288static struct resource bfin_uart0_resources[] = {
1394f032 289 {
6bd1fbea
SZ		 290 .start = BFIN_UART_THR,
291 .end = BFIN_UART_GCTL+2,
1394f032
BW		 292 .flags = IORESOURCE_MEM,
293 },
edb0a640
SZ		 294 {
295 .start = IRQ_UART0_TX,
296 .end = IRQ_UART0_TX,
297 .flags = IORESOURCE_IRQ,
298 },
6bd1fbea
SZ		 299 {
300 .start = IRQ_UART0_RX,
edb0a640 301 .end = IRQ_UART0_RX,
6bd1fbea
SZ		 302 .flags = IORESOURCE_IRQ,
303 },
304 {
305 .start = IRQ_UART0_ERROR,
306 .end = IRQ_UART0_ERROR,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = CH_UART0_TX,
311 .end = CH_UART0_TX,
312 .flags = IORESOURCE_DMA,
313 },
314 {
315 .start = CH_UART0_RX,
316 .end = CH_UART0_RX,
317 .flags = IORESOURCE_DMA,
318 },
319};
320
a8b19886 321static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea 322 P_UART0_TX, P_UART0_RX, 0
1394f032
BW		 323};
324
6bd1fbea 325static struct platform_device bfin_uart0_device = {
1394f032 326 .name = "bfin-uart",
6bd1fbea
SZ		 327 .id = 0,
328 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
329 .resource = bfin_uart0_resources,
330 .dev = {
331 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
332 },
1394f032
BW		 333};
334#endif
6bd1fbea 335#endif
1394f032 336
5be36d22 337#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 338#ifdef CONFIG_BFIN_SIR0
42bd8bcb 339static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 340 {
341 .start = 0xFFC00400,
342 .end = 0xFFC004FF,
343 .flags = IORESOURCE_MEM,
344 },
42bd8bcb
GY		 345 {
346 .start = IRQ_UART0_RX,
347 .end = IRQ_UART0_RX+1,
348 .flags = IORESOURCE_IRQ,
349 },
350 {
351 .start = CH_UART0_RX,
352 .end = CH_UART0_RX+1,
353 .flags = IORESOURCE_DMA,
354 },
5be36d22
GY		 355};
356
42bd8bcb 357static struct platform_device bfin_sir0_device = {
5be36d22
GY		 358 .name = "bfin_sir",
359 .id = 0,
42bd8bcb
GY		 360 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
361 .resource = bfin_sir0_resources,
5be36d22
GY		 362};
363#endif
42bd8bcb 364#endif
5be36d22 365
2463ef22
MH		 366#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
367#include <linux/input.h>
368#include <linux/gpio_keys.h>
369
370static struct gpio_keys_button bfin_gpio_keys_table[] = {
371 {BTN_0, GPIO_PF7, 1, "gpio-keys: BTN0"},
372 {BTN_1, GPIO_PF8, 1, "gpio-keys: BTN1"},
373 {BTN_2, GPIO_PF9, 1, "gpio-keys: BTN2"},
374 {BTN_3, GPIO_PF10, 1, "gpio-keys: BTN3"},
375};
376
377static struct gpio_keys_platform_data bfin_gpio_keys_data = {
378 .buttons = bfin_gpio_keys_table,
379 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
380};
381
382static struct platform_device bfin_device_gpiokeys = {
383 .name = "gpio-keys",
384 .dev = {
385 .platform_data = &bfin_gpio_keys_data,
386 },
387};
388#endif
389
e3163954
BW		 390#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
391#include <linux/i2c-gpio.h>
392
393static struct i2c_gpio_platform_data i2c_gpio_data = {
3d7dc883
MF		 394 .sda_pin = GPIO_PF1,
395 .scl_pin = GPIO_PF0,
e3163954
BW		 396 .sda_is_open_drain = 0,
397 .scl_is_open_drain = 0,
398 .udelay = 40,
399};
400
401static struct platform_device i2c_gpio_device = {
402 .name = "i2c-gpio",
403 .id = 0,
404 .dev = {
405 .platform_data = &i2c_gpio_data,
406 },
407};
408#endif
409
14b03204
MH		 410static const unsigned int cclk_vlev_datasheet[] =
411{
412 VRPAIR(VLEV_085, 250000000),
413 VRPAIR(VLEV_090, 376000000),
414 VRPAIR(VLEV_095, 426000000),
415 VRPAIR(VLEV_100, 426000000),
416 VRPAIR(VLEV_105, 476000000),
417 VRPAIR(VLEV_110, 476000000),
418 VRPAIR(VLEV_115, 476000000),
419 VRPAIR(VLEV_120, 600000000),
420 VRPAIR(VLEV_125, 600000000),
421 VRPAIR(VLEV_130, 600000000),
422};
423
424static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
425 .tuple_tab = cclk_vlev_datasheet,
426 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
427 .vr_settling_time = 25 /* us */,
428};
429
430static struct platform_device bfin_dpmc = {
431 .name = "bfin dpmc",
432 .dev = {
433 .platform_data = &bfin_dmpc_vreg_data,
434 },
435};
436
50c4c086
MH		 437static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
438#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
439 {
440 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
441 },
442#endif
443};
444
7e1082b7
BS		 445#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
446static struct platform_device bfin_i2s = {
447 .name = "bfin-i2s",
448 .id = CONFIG_SND_BF5XX_SPORT_NUM,
449 /* TODO: add platform data here */
450};
451#endif
452
453#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
454static struct platform_device bfin_tdm = {
455 .name = "bfin-tdm",
456 .id = CONFIG_SND_BF5XX_SPORT_NUM,
457 /* TODO: add platform data here */
458};
459#endif
460
461#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
462static struct platform_device bfin_ac97 = {
463 .name = "bfin-ac97",
464 .id = CONFIG_SND_BF5XX_SPORT_NUM,
465 /* TODO: add platform data here */
466};
467#endif
468
1394f032 469static struct platform_device *ezkit_devices[] __initdata = {
14b03204
MH		 470
471 &bfin_dpmc,
472
7036c61f
MF		 473#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
474 &ezkit_flash_device_a,
475 &ezkit_flash_device_b,
4d5e6fd4
MF		 476#endif
477
478#if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE)
479 &sram_device_a,
480 &sram_device_b,
481#endif
482
1394f032
BW		 483#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
484 &smc91x_device,
485#endif
486
7d157fb0 487#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
c6c4d7bb
BW		 488 &bfin_spi0_device,
489#endif
490
1394f032
BW		 491#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
492 &rtc_device,
493#endif
494
e062ceab 495#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 496#ifdef CONFIG_SERIAL_BFIN_UART0
497 &bfin_uart0_device,
498#endif
e062ceab
SZ		 499#endif
500
5be36d22 501#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 502#ifdef CONFIG_BFIN_SIR0
503 &bfin_sir0_device,
504#endif
5be36d22
GY		 505#endif
506
2463ef22
MH		 507#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
508 &bfin_device_gpiokeys,
509#endif
e3163954
BW		 510
511#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
512 &i2c_gpio_device,
513#endif
7e1082b7
BS		 514
515#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
516 &bfin_i2s,
517#endif
518
519#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
520 &bfin_tdm,
521#endif
522
523#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
524 &bfin_ac97,
525#endif
1394f032
BW		 526};
527
528static int __init ezkit_init(void)
529{
b85d858b 530 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032 531 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1394f032 532 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
50c4c086
MH		 533 i2c_register_board_info(0, bfin_i2c_board_info,
534 ARRAY_SIZE(bfin_i2c_board_info));
1394f032
BW		 535 return 0;
536}
537
538arch_initcall(ezkit_init);
c13ce9fd
SZ		 539
540static struct platform_device *ezkit_early_devices[] __initdata = {
541#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
542#ifdef CONFIG_SERIAL_BFIN_UART0
543 &bfin_uart0_device,
544#endif
545#endif
546};
547
548void __init native_machine_early_platform_add_devices(void)
549{
550 printk(KERN_INFO "register early platform devices\n");
551 early_platform_add_devices(ezkit_early_devices,
552 ARRAY_SIZE(ezkit_early_devices));
553}
kernel source for telekom puls (alcatel/mediatek)