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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / mach-bf533 / boards / blackstamp.c
CommitLineData
130de7ce 1/*
96f1050d 2 * Board Info File for the BlackStamp
130de7ce 3 *
130de7ce 4 * Copyright 2004-2008 Analog Devices Inc.
96f1050d
RG		 5 * 2008 Benjamin Matthews <bmat@lle.rochester.edu>
6 * 2005 National ICT Australia (NICTA)
7 * Aidan Williams <aidan@nicta.com.au>
130de7ce
BM		 8 *
9 * More info about the BlackStamp at:
10 * http://blackfin.uclinux.org/gf/project/blackstamp/
11 *
12 * Licensed under the GPL-2 or later.
13 */
14
15#include <linux/device.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/mtd.h>
18#include <linux/mtd/partitions.h>
19#include <linux/mtd/physmap.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/flash.h>
22#include <linux/irq.h>
23#include <linux/i2c.h>
24#include <asm/dma.h>
25#include <asm/bfin5xx_spi.h>
26#include <asm/portmux.h>
27#include <asm/dpmc.h>
28
29/*
30 * Name the Board for the /proc/cpuinfo
31 */
32const char bfin_board_name[] = "BlackStamp";
33
34#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
35static struct platform_device rtc_device = {
36 .name = "rtc-bfin",
37 .id = -1,
38};
39#endif
40
41/*
42 * Driver needs to know address, irq and flag pin.
43 */
44#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 45#include <linux/smc91x.h>
46
47static struct smc91x_platdata smc91x_info = {
48 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
49 .leda = RPC_LED_100_10,
50 .ledb = RPC_LED_TX_RX,
51};
52
130de7ce
BM		 53static struct resource smc91x_resources[] = {
54 {
55 .name = "smc91x-regs",
56 .start = 0x20300300,
57 .end = 0x20300300 + 16,
58 .flags = IORESOURCE_MEM,
59 }, {
60 .start = IRQ_PF3,
61 .end = IRQ_PF3,
62 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
63 },
64};
65
66static struct platform_device smc91x_device = {
67 .name = "smc91x",
68 .id = 0,
69 .num_resources = ARRAY_SIZE(smc91x_resources),
70 .resource = smc91x_resources,
61f09b5a
MH		 71 .dev = {
72 .platform_data = &smc91x_info,
73 },
130de7ce
BM		 74};
75#endif
76
77#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
78static struct mtd_partition bfin_spi_flash_partitions[] = {
79 {
80 .name = "bootloader(spi)",
81 .size = 0x00040000,
82 .offset = 0,
83 .mask_flags = MTD_CAP_ROM
84 }, {
85 .name = "linux kernel(spi)",
86 .size = 0x180000,
87 .offset = MTDPART_OFS_APPEND,
88 }, {
89 .name = "file system(spi)",
90 .size = MTDPART_SIZ_FULL,
91 .offset = MTDPART_OFS_APPEND,
92 }
93};
94
95static struct flash_platform_data bfin_spi_flash_data = {
96 .name = "m25p80",
97 .parts = bfin_spi_flash_partitions,
98 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
99 .type = "m25p64",
100};
101
102/* SPI flash chip (m25p64) */
103static struct bfin5xx_spi_chip spi_flash_chip_info = {
104 .enable_dma = 0, /* use dma transfer with this chip*/
130de7ce
BM		 105};
106#endif
107
f3f704d3
MH		 108#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
109static struct bfin5xx_spi_chip mmc_spi_chip_info = {
110 .enable_dma = 0,
130de7ce
BM		 111};
112#endif
113
114static struct spi_board_info bfin_spi_board_info[] __initdata = {
115#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
116 {
117 /* the modalias must be the same as spi device driver name */
118 .modalias = "m25p80", /* Name of spi_driver for this device */
119 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
120 .bus_num = 0, /* Framework bus number */
121 .chip_select = 2, /* Framework chip select. */
122 .platform_data = &bfin_spi_flash_data,
123 .controller_data = &spi_flash_chip_info,
124 .mode = SPI_MODE_3,
125 },
126#endif
127
f3f704d3 128#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
130de7ce 129 {
f3f704d3 130 .modalias = "mmc_spi",
130de7ce
BM		 131 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
132 .bus_num = 0,
f3f704d3
MH		 133 .chip_select = 5,
134 .controller_data = &mmc_spi_chip_info,
130de7ce
BM		 135 .mode = SPI_MODE_3,
136 },
137#endif
138
139#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
140 {
141 .modalias = "spidev",
142 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
143 .bus_num = 0,
144 .chip_select = 7,
130de7ce
BM		 145 },
146#endif
147};
148
7d157fb0 149#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
130de7ce
BM		 150/* SPI (0) */
151static struct resource bfin_spi0_resource[] = {
152 [0] = {
153 .start = SPI0_REGBASE,
154 .end = SPI0_REGBASE + 0xFF,
155 .flags = IORESOURCE_MEM,
156 },
157 [1] = {
158 .start = CH_SPI,
159 .end = CH_SPI,
53122693
YL		 160 .flags = IORESOURCE_DMA,
161 },
162 [2] = {
163 .start = IRQ_SPI,
164 .end = IRQ_SPI,
130de7ce
BM		 165 .flags = IORESOURCE_IRQ,
166 }
167};
168
169/* SPI controller data */
170static struct bfin5xx_spi_master bfin_spi0_info = {
171 .num_chipselect = 8,
172 .enable_dma = 1, /* master has the ability to do dma transfer */
173 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
174};
175
176static struct platform_device bfin_spi0_device = {
177 .name = "bfin-spi",
178 .id = 0, /* Bus number */
179 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
180 .resource = bfin_spi0_resource,
181 .dev = {
182 .platform_data = &bfin_spi0_info, /* Passed to driver */
183 },
184};
185#endif /* spi master and devices */
186
187#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 188#ifdef CONFIG_SERIAL_BFIN_UART0
189static struct resource bfin_uart0_resources[] = {
130de7ce 190 {
6bd1fbea
SZ		 191 .start = BFIN_UART_THR,
192 .end = BFIN_UART_GCTL+2,
130de7ce
BM		 193 .flags = IORESOURCE_MEM,
194 },
edb0a640
SZ		 195 {
196 .start = IRQ_UART0_TX,
197 .end = IRQ_UART0_TX,
198 .flags = IORESOURCE_IRQ,
199 },
6bd1fbea
SZ		 200 {
201 .start = IRQ_UART0_RX,
edb0a640 202 .end = IRQ_UART0_RX,
6bd1fbea
SZ		 203 .flags = IORESOURCE_IRQ,
204 },
205 {
206 .start = IRQ_UART0_ERROR,
207 .end = IRQ_UART0_ERROR,
208 .flags = IORESOURCE_IRQ,
209 },
210 {
211 .start = CH_UART0_TX,
212 .end = CH_UART0_TX,
213 .flags = IORESOURCE_DMA,
214 },
215 {
216 .start = CH_UART0_RX,
217 .end = CH_UART0_RX,
218 .flags = IORESOURCE_DMA,
219 },
220};
221
a8b19886 222static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea 223 P_UART0_TX, P_UART0_RX, 0
130de7ce
BM		 224};
225
6bd1fbea 226static struct platform_device bfin_uart0_device = {
130de7ce 227 .name = "bfin-uart",
6bd1fbea
SZ		 228 .id = 0,
229 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
230 .resource = bfin_uart0_resources,
231 .dev = {
232 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
233 },
130de7ce
BM		 234};
235#endif
6bd1fbea 236#endif
130de7ce
BM		 237
238#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
130de7ce 239#ifdef CONFIG_BFIN_SIR0
42bd8bcb 240static struct resource bfin_sir0_resources[] = {
130de7ce
BM		 241 {
242 .start = 0xFFC00400,
243 .end = 0xFFC004FF,
244 .flags = IORESOURCE_MEM,
245 },
42bd8bcb
GY		 246 {
247 .start = IRQ_UART0_RX,
248 .end = IRQ_UART0_RX+1,
249 .flags = IORESOURCE_IRQ,
250 },
251 {
252 .start = CH_UART0_RX,
253 .end = CH_UART0_RX+1,
254 .flags = IORESOURCE_DMA,
255 },
130de7ce
BM		 256};
257
42bd8bcb 258static struct platform_device bfin_sir0_device = {
130de7ce
BM		 259 .name = "bfin_sir",
260 .id = 0,
42bd8bcb
GY		 261 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
262 .resource = bfin_sir0_resources,
130de7ce
BM		 263};
264#endif
42bd8bcb 265#endif
130de7ce
BM		 266
267#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 268#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
269static struct resource bfin_sport0_uart_resources[] = {
270 {
271 .start = SPORT0_TCR1,
272 .end = SPORT0_MRCS3+4,
273 .flags = IORESOURCE_MEM,
274 },
275 {
276 .start = IRQ_SPORT0_RX,
277 .end = IRQ_SPORT0_RX+1,
278 .flags = IORESOURCE_IRQ,
279 },
280 {
281 .start = IRQ_SPORT0_ERROR,
282 .end = IRQ_SPORT0_ERROR,
283 .flags = IORESOURCE_IRQ,
284 },
285};
286
a8b19886 287static unsigned short bfin_sport0_peripherals[] = {
df5de261 288 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
e54b6730 289 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
df5de261
SZ		 290};
291
130de7ce
BM		 292static struct platform_device bfin_sport0_uart_device = {
293 .name = "bfin-sport-uart",
294 .id = 0,
df5de261
SZ		 295 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
296 .resource = bfin_sport0_uart_resources,
297 .dev = {
298 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
299 },
300};
301#endif
302#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
303static struct resource bfin_sport1_uart_resources[] = {
304 {
305 .start = SPORT1_TCR1,
306 .end = SPORT1_MRCS3+4,
307 .flags = IORESOURCE_MEM,
308 },
309 {
310 .start = IRQ_SPORT1_RX,
311 .end = IRQ_SPORT1_RX+1,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_SPORT1_ERROR,
316 .end = IRQ_SPORT1_ERROR,
317 .flags = IORESOURCE_IRQ,
318 },
319};
320
a8b19886 321static unsigned short bfin_sport1_peripherals[] = {
df5de261 322 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
e54b6730 323 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
130de7ce
BM		 324};
325
326static struct platform_device bfin_sport1_uart_device = {
327 .name = "bfin-sport-uart",
328 .id = 1,
df5de261
SZ		 329 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
330 .resource = bfin_sport1_uart_resources,
331 .dev = {
332 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
333 },
130de7ce
BM		 334};
335#endif
df5de261 336#endif
130de7ce
BM		 337
338#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
339#include <linux/input.h>
340#include <linux/gpio_keys.h>
341
342static struct gpio_keys_button bfin_gpio_keys_table[] = {
343 {BTN_0, GPIO_PF4, 0, "gpio-keys: BTN0"},
344 {BTN_1, GPIO_PF5, 0, "gpio-keys: BTN1"},
345 {BTN_2, GPIO_PF6, 0, "gpio-keys: BTN2"},
346}; /* Mapped to the first three PF Test Points */
347
348static struct gpio_keys_platform_data bfin_gpio_keys_data = {
349 .buttons = bfin_gpio_keys_table,
350 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
351};
352
353static struct platform_device bfin_device_gpiokeys = {
354 .name = "gpio-keys",
355 .dev = {
356 .platform_data = &bfin_gpio_keys_data,
357 },
358};
359#endif
360
130de7ce
BM		 361#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
362#include <linux/i2c-gpio.h>
363
364static struct i2c_gpio_platform_data i2c_gpio_data = {
3d7dc883
MF		 365 .sda_pin = GPIO_PF8,
366 .scl_pin = GPIO_PF9,
130de7ce
BM		 367 .sda_is_open_drain = 0,
368 .scl_is_open_drain = 0,
369 .udelay = 40,
370}; /* This hasn't actually been used these pins
371 * are (currently) free pins on the expansion connector */
372
373static struct platform_device i2c_gpio_device = {
374 .name = "i2c-gpio",
375 .id = 0,
376 .dev = {
377 .platform_data = &i2c_gpio_data,
378 },
379};
380#endif
381
130de7ce
BM		 382static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
383};
130de7ce
BM		 384
385static const unsigned int cclk_vlev_datasheet[] =
386{
387 VRPAIR(VLEV_085, 250000000),
388 VRPAIR(VLEV_090, 376000000),
389 VRPAIR(VLEV_095, 426000000),
390 VRPAIR(VLEV_100, 426000000),
391 VRPAIR(VLEV_105, 476000000),
392 VRPAIR(VLEV_110, 476000000),
393 VRPAIR(VLEV_115, 476000000),
394 VRPAIR(VLEV_120, 600000000),
395 VRPAIR(VLEV_125, 600000000),
396 VRPAIR(VLEV_130, 600000000),
397};
398
399static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
400 .tuple_tab = cclk_vlev_datasheet,
401 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
402 .vr_settling_time = 25 /* us */,
403};
404
405static struct platform_device bfin_dpmc = {
406 .name = "bfin dpmc",
407 .dev = {
408 .platform_data = &bfin_dmpc_vreg_data,
409 },
410};
411
412static struct platform_device *stamp_devices[] __initdata = {
413
414 &bfin_dpmc,
415
416#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
417 &rtc_device,
418#endif
419
420#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
421 &smc91x_device,
422#endif
423
424
7d157fb0 425#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
130de7ce
BM		 426 &bfin_spi0_device,
427#endif
428
429#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 430#ifdef CONFIG_SERIAL_BFIN_UART0
431 &bfin_uart0_device,
432#endif
130de7ce
BM		 433#endif
434
435#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 436#ifdef CONFIG_BFIN_SIR0
437 &bfin_sir0_device,
438#endif
130de7ce
BM		 439#endif
440
441#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 442#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
130de7ce 443 &bfin_sport0_uart_device,
df5de261
SZ		 444#endif
445#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
130de7ce
BM		 446 &bfin_sport1_uart_device,
447#endif
df5de261 448#endif
130de7ce
BM		 449
450#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
451 &bfin_device_gpiokeys,
452#endif
453
454#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
455 &i2c_gpio_device,
456#endif
130de7ce
BM		 457};
458
459static int __init blackstamp_init(void)
460{
461 int ret;
462
463 printk(KERN_INFO "%s(): registering device resources\n", __func__);
464
130de7ce
BM		 465 i2c_register_board_info(0, bfin_i2c_board_info,
466 ARRAY_SIZE(bfin_i2c_board_info));
130de7ce
BM		 467
468 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
469 if (ret < 0)
470 return ret;
471
472#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
30e9b95a
MF		 473 /*
474 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
475 * the bfin-async-map driver takes care of flipping between
476 * flash and ethernet when necessary.
477 */
478 ret = gpio_request(GPIO_PF0, "enet_cpld");
479 if (!ret) {
480 gpio_direction_output(GPIO_PF0, 1);
481 gpio_free(GPIO_PF0);
482 }
130de7ce
BM		 483#endif
484
485 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
486 return 0;
487}
488
489arch_initcall(blackstamp_init);
c13ce9fd
SZ		 490
491static struct platform_device *stamp_early_devices[] __initdata = {
492#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
493#ifdef CONFIG_SERIAL_BFIN_UART0
494 &bfin_uart0_device,
495#endif
496#endif
497
498#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
499#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
500 &bfin_sport0_uart_device,
501#endif
502#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
503 &bfin_sport1_uart_device,
504#endif
505#endif
506};
507
508void __init native_machine_early_platform_add_devices(void)
509{
510 printk(KERN_INFO "register early platform devices\n");
511 early_platform_add_devices(stamp_early_devices,
512 ARRAY_SIZE(stamp_early_devices));
513}
kernel source for telekom puls (alcatel/mediatek)