projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 59003145 | 1 | /* |
| 96f1050d | 2 | * Copyright 2007-2009 Analog Devices Inc. |
| 59003145 | 3 | * |
| 96f1050d | 4 | * Licensed under the GPL-2 or later. |
| 59003145 MH |
5 | */ |
| 6 | ||
| 7 | #ifndef __MACH_BF527_H__ | |
| 8 | #define __MACH_BF527_H__ | |
| 9 | ||
| 59003145 MH |
10 | #define OFFSET_(x) ((x) & 0x0000FFFF) |
| 11 | ||
| 12 | /*some misc defines*/ | |
| 13 | #define IMASK_IVG15 0x8000 | |
| 14 | #define IMASK_IVG14 0x4000 | |
| 15 | #define IMASK_IVG13 0x2000 | |
| 16 | #define IMASK_IVG12 0x1000 | |
| 17 | ||
| 18 | #define IMASK_IVG11 0x0800 | |
| 19 | #define IMASK_IVG10 0x0400 | |
| 20 | #define IMASK_IVG9 0x0200 | |
| 21 | #define IMASK_IVG8 0x0100 | |
| 22 | ||
| 23 | #define IMASK_IVG7 0x0080 | |
| 24 | #define IMASK_IVGTMR 0x0040 | |
| 25 | #define IMASK_IVGHW 0x0020 | |
| 26 | ||
| 27 | /***************************/ | |
| 28 | ||
| 29 | #define BFIN_DSUBBANKS 4 | |
| 30 | #define BFIN_DWAYS 2 | |
| 31 | #define BFIN_DLINES 64 | |
| 32 | #define BFIN_ISUBBANKS 4 | |
| 33 | #define BFIN_IWAYS 4 | |
| 34 | #define BFIN_ILINES 32 | |
| 35 | ||
| 36 | #define WAY0_L 0x1 | |
| 37 | #define WAY1_L 0x2 | |
| 38 | #define WAY01_L 0x3 | |
| 39 | #define WAY2_L 0x4 | |
| 40 | #define WAY02_L 0x5 | |
| 41 | #define WAY12_L 0x6 | |
| 42 | #define WAY012_L 0x7 | |
| 43 | ||
| 44 | #define WAY3_L 0x8 | |
| 45 | #define WAY03_L 0x9 | |
| 46 | #define WAY13_L 0xA | |
| 47 | #define WAY013_L 0xB | |
| 48 | ||
| 49 | #define WAY32_L 0xC | |
| 50 | #define WAY320_L 0xD | |
| 51 | #define WAY321_L 0xE | |
| 52 | #define WAYALL_L 0xF | |
| 53 | ||
| 54 | #define DMC_ENABLE (2<<2) /*yes, 2, not 1 */ | |
| 55 | ||
| 56 | /********************************* EBIU Settings ************************************/ | |
| 57 | #define AMBCTL0VAL ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0) | |
| 58 | #define AMBCTL1VAL ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2) | |
| 59 | ||
| 60 | #ifdef CONFIG_C_AMBEN_ALL | |
| 61 | #define V_AMBEN AMBEN_ALL | |
| 62 | #endif | |
| 63 | #ifdef CONFIG_C_AMBEN | |
| 64 | #define V_AMBEN 0x0 | |
| 65 | #endif | |
| 66 | #ifdef CONFIG_C_AMBEN_B0 | |
| 67 | #define V_AMBEN AMBEN_B0 | |
| 68 | #endif | |
| 69 | #ifdef CONFIG_C_AMBEN_B0_B1 | |
| 70 | #define V_AMBEN AMBEN_B0_B1 | |
| 71 | #endif | |
| 72 | #ifdef CONFIG_C_AMBEN_B0_B1_B2 | |
| 73 | #define V_AMBEN AMBEN_B0_B1_B2 | |
| 74 | #endif | |
| 75 | #ifdef CONFIG_C_AMCKEN | |
| 76 | #define V_AMCKEN AMCKEN | |
| 77 | #else | |
| 78 | #define V_AMCKEN 0x0 | |
| 79 | #endif | |
| 80 | #ifdef CONFIG_C_CDPRIO | |
| 81 | #define V_CDPRIO 0x100 | |
| 82 | #else | |
| 83 | #define V_CDPRIO 0x0 | |
| 84 | #endif | |
| 85 | ||
| 86 | #define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO) | |
| 87 | ||
| 88 | #ifdef CONFIG_BF527 | |
| 89 | #define CPU "BF527" | |
| 06af15e0 | 90 | #define CPUID 0x27e0 |
| e482cad2 RG |
91 | #endif |
| 92 | #ifdef CONFIG_BF526 | |
| 93 | #define CPU "BF526" | |
| 94 | #define CPUID 0x27e4 | |
| 59003145 MH |
95 | #endif |
| 96 | #ifdef CONFIG_BF525 | |
| 97 | #define CPU "BF525" | |
| 06af15e0 | 98 | #define CPUID 0x27e0 |
| e482cad2 RG |
99 | #endif |
| 100 | #ifdef CONFIG_BF524 | |
| 101 | #define CPU "BF524" | |
| 102 | #define CPUID 0x27e4 | |
| 103 | #endif | |
| 104 | #ifdef CONFIG_BF523 | |
| 105 | #define CPU "BF523" | |
| 06af15e0 | 106 | #define CPUID 0x27e0 |
| 59003145 MH |
107 | #endif |
| 108 | #ifdef CONFIG_BF522 | |
| 109 | #define CPU "BF522" | |
| e482cad2 | 110 | #define CPUID 0x27e4 |
| 59003145 | 111 | #endif |
| e482cad2 | 112 | |
| 59003145 | 113 | #ifndef CPU |
| 2563265b | 114 | #error "Unknown CPU type - This kernel doesn't seem to be configured properly" |
| 59003145 MH |
115 | #endif |
| 116 | ||
| 117 | #endif /* __MACH_BF527_H__ */ |