Blackfin arch: move out irq related functions
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / kernel / vmlinux.lds.S
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1/*
2 * File: arch/blackfin/kernel/vmlinux.lds.S
3 * Based on: none - original work
4 * Author:
5 *
6 * Created: Tue Sep 21 2004
7 * Description: Master linker script for blackfin architecture
8 *
9 * Modified:
de6a9520 10 * Copyright 2004-2007 Analog Devices Inc.
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11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#define VMLINUX_SYMBOL(_sym_) _##_sym_
31
32#include <asm-generic/vmlinux.lds.h>
33#include <asm/mem_map.h>
520473b0 34#include <asm/page.h>
0fa63ad7 35#include <asm/thread_info.h>
1394f032 36
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37OUTPUT_FORMAT("elf32-bfin")
38ENTRY(__start)
39_jiffies = _jiffies_64;
40
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41SECTIONS
42{
43 . = CONFIG_BOOT_LOAD;
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44 /* Neither the text, ro_data or bss section need to be aligned
45 * So pack them back to back
46 */
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47 .text :
48 {
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49 __text = .;
50 _text = .;
51 __stext = .;
7664709b 52 TEXT_TEXT
1394f032 53 SCHED_TEXT
de6a9520 54 LOCK_TEXT
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55 KPROBES_TEXT
56 *(.text.*)
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57 *(.fixup)
58
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59#if !L1_CODE_LENGTH
60 *(.l1.text)
61#endif
62
1394f032 63 . = ALIGN(16);
de6a9520 64 ___start___ex_table = .;
1394f032 65 *(__ex_table)
de6a9520 66 ___stop___ex_table = .;
1394f032 67
1394f032 68 __etext = .;
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69 }
70
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71 /* Just in case the first read only is a 32-bit access */
72 RO_DATA(4)
73
74 .bss :
75 {
76 . = ALIGN(4);
77 ___bss_start = .;
78 *(.bss .bss.*)
79 *(COMMON)
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80#if !L1_DATA_A_LENGTH
81 *(.l1.bss)
82#endif
83#if !L1_DATA_B_LENGTH
84 *(.l1.bss.B)
85#endif
13752046 86 . = ALIGN(4);
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87 ___bss_stop = .;
88 }
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89
90 .data :
91 {
92 __sdata = .;
b7627acc 93 /* This gets done first, so the glob doesn't suck it in */
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94 . = ALIGN(32);
95 *(.data.cacheline_aligned)
96
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97#if !L1_DATA_A_LENGTH
98 . = ALIGN(32);
99 *(.data_l1.cacheline_aligned)
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100 *(.l1.data)
101#endif
102#if !L1_DATA_B_LENGTH
103 *(.l1.data.B)
b85b82d9 104#endif
07aa7be5 105#if !L2_LENGTH
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106 . = ALIGN(32);
107 *(.data_l2.cacheline_aligned)
108 *(.l2.data)
109#endif
b85b82d9 110
27d875f2 111 DATA_DATA
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112 CONSTRUCTORS
113
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114 /* make sure the init_task is aligned to the
115 * kernel thread size so we can locate the kernel
116 * stack properly and quickly.
117 */
0fa63ad7 118 . = ALIGN(THREAD_SIZE);
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119 *(.init_task.data)
120
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121 __edata = .;
122 }
1394f032 123
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124 /* The init section should be last, so when we free it, it goes into
125 * the general memory pool, and (hopefully) will decrease fragmentation
126 * a tiny bit. The init section has a _requirement_ that it be
127 * PAGE_SIZE aligned
128 */
129 . = ALIGN(PAGE_SIZE);
de6a9520 130 ___init_begin = .;
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131
132 .init.text :
1394f032 133 {
0fa63ad7 134 . = ALIGN(PAGE_SIZE);
1394f032 135 __sinittext = .;
01ba2bdc 136 INIT_TEXT
1394f032 137 __einittext = .;
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138 }
139 .init.data :
140 {
141 . = ALIGN(16);
01ba2bdc 142 INIT_DATA
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143 }
144 .init.setup :
145 {
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146 . = ALIGN(16);
147 ___setup_start = .;
148 *(.init.setup)
149 ___setup_end = .;
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150 }
151 .initcall.init :
152 {
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153 ___initcall_start = .;
154 INITCALLS
155 ___initcall_end = .;
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156 }
157 .con_initcall.init :
158 {
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159 ___con_initcall_start = .;
160 *(.con_initcall.init)
161 ___con_initcall_end = .;
27d875f2 162 }
46fa5eec 163 PERCPU(4)
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164 SECURITY_INIT
165 .init.ramfs :
166 {
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167 . = ALIGN(4);
168 ___initramfs_start = .;
169 *(.init.ramfs)
170 ___initramfs_end = .;
de6a9520 171 }
1394f032 172
de6a9520 173 __l1_lma_start = .;
1394f032 174
27d875f2 175 .text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
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176 {
177 . = ALIGN(4);
de6a9520 178 __stext_l1 = .;
bc6e0fa1 179 *(.l1.text)
1394f032 180 . = ALIGN(4);
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181 __etext_l1 = .;
182 }
1394f032 183
de6a9520 184 .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
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185 {
186 . = ALIGN(4);
de6a9520 187 __sdata_l1 = .;
bc6e0fa1 188 *(.l1.data)
de6a9520 189 __edata_l1 = .;
1394f032 190
1394f032 191 . = ALIGN(32);
bc6e0fa1 192 *(.data_l1.cacheline_aligned)
1394f032 193
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194 . = ALIGN(4);
195 __sbss_l1 = .;
196 *(.l1.bss)
1394f032 197 . = ALIGN(4);
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198 __ebss_l1 = .;
199 }
200
201 .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
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202 {
203 . = ALIGN(4);
204 __sdata_b_l1 = .;
bc6e0fa1 205 *(.l1.data.B)
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206 __edata_b_l1 = .;
207
208 . = ALIGN(4);
209 __sbss_b_l1 = .;
bc6e0fa1 210 *(.l1.bss.B)
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211 . = ALIGN(4);
212 __ebss_b_l1 = .;
de6a9520 213 }
1394f032 214
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215 __l2_lma_start = .;
216
217 .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1))
218 {
219 . = ALIGN(4);
220 __stext_l2 = .;
07aa7be5 221 *(.l2.text)
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222 . = ALIGN(4);
223 __etext_l2 = .;
224
225 . = ALIGN(4);
226 __sdata_l2 = .;
07aa7be5 227 *(.l2.data)
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228 __edata_l2 = .;
229
230 . = ALIGN(32);
231 *(.data_l2.cacheline_aligned)
232
233 . = ALIGN(4);
234 __sbss_l2 = .;
07aa7be5 235 *(.l2.bss)
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236 . = ALIGN(4);
237 __ebss_l2 = .;
238 }
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239 /* Force trailing alignment of our init section so that when we
240 * free our init memory, we don't leave behind a partial page.
241 */
242 . = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
243 . = ALIGN(PAGE_SIZE);
244 ___init_end = .;
245
b7627acc 246 __end =.;
de6a9520 247
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248 STABS_DEBUG
249
250 DWARF_DEBUG
251
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252 /DISCARD/ :
253 {
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254 EXIT_TEXT
255 EXIT_DATA
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256 *(.exitcall.exit)
257 }
1394f032 258}