[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / blackfin / include / asm / io.h

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#ifndef _BFIN_IO_H
#define _BFIN_IO_H

#ifdef __KERNEL__

#ifndef __ASSEMBLY__
#include <linux/types.h>
#endif
#include <linux/compiler.h>

/*
 * These are for ISA/PCI shared memory _only_ and should never be used
 * on any other type of memory, including Zorro memory. They are meant to
 * access the bus in the bus byte order which is little-endian!.
 *
 * readX/writeX() are used to access memory mapped devices. On some
 * architectures the memory mapped IO stuff needs to be accessed
 * differently. On the bfin architecture, we just read/write the
 * memory location directly.
 */
#ifndef __ASSEMBLY__

static inline unsigned char readb(const volatile void __iomem *addr)
{
	unsigned int val;
	int tmp;

	__asm__ __volatile__ ("cli %1;\n\t"
			"NOP; NOP; SSYNC;\n\t"
			"%0 = b [%2] (z);\n\t"
			"sti %1;\n\t"
			: "=d"(val), "=d"(tmp): "a"(addr)
			);

	return (unsigned char) val;
}

static inline unsigned short readw(const volatile void __iomem *addr)
{
	unsigned int val;
	int tmp;

	__asm__ __volatile__ ("cli %1;\n\t"
			"NOP; NOP; SSYNC;\n\t"
			"%0 = w [%2] (z);\n\t"
			"sti %1;\n\t"
		      	: "=d"(val), "=d"(tmp): "a"(addr)
			);

	return (unsigned short) val;
}

static inline unsigned int readl(const volatile void __iomem *addr)
{
	unsigned int val;
	int tmp;

	__asm__ __volatile__ ("cli %1;\n\t"
			"NOP; NOP; SSYNC;\n\t"
			"%0 = [%2];\n\t"
			"sti %1;\n\t"
		      	: "=d"(val), "=d"(tmp): "a"(addr)
			);
	return val;
}

#endif /*  __ASSEMBLY__ */

#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))
#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))
#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))

#define __raw_readb readb
#define __raw_readw readw
#define __raw_readl readl
#define __raw_writeb writeb
#define __raw_writew writew
#define __raw_writel writel
#define memset_io(a,b,c)	memset((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c)	memcpy((a),(void *)(b),(c))
#define memcpy_toio(a,b,c)	memcpy((void *)(a),(b),(c))

/* Convert "I/O port addresses" to actual addresses.  i.e. ugly casts. */
#define __io(port) ((void *)(unsigned long)(port))

#define inb(port)    readb(__io(port))
#define inw(port)    readw(__io(port))
#define inl(port)    readl(__io(port))
#define outb(x,port) writeb(x,__io(port))
#define outw(x,port) writew(x,__io(port))
#define outl(x,port) writel(x,__io(port))

#define inb_p(port)    inb(__io(port))
#define inw_p(port)    inw(__io(port))
#define inl_p(port)    inl(__io(port))
#define outb_p(x,port) outb(x,__io(port))
#define outw_p(x,port) outw(x,__io(port))
#define outl_p(x,port) outl(x,__io(port))

#define ioread8_rep(a,d,c)	readsb(a,d,c)
#define ioread16_rep(a,d,c)	readsw(a,d,c)
#define ioread32_rep(a,d,c)	readsl(a,d,c)
#define iowrite8_rep(a,s,c)	writesb(a,s,c)
#define iowrite16_rep(a,s,c)	writesw(a,s,c)
#define iowrite32_rep(a,s,c)	writesl(a,s,c)

#define ioread8(X)			readb(X)
#define ioread16(X)			readw(X)
#define ioread32(X)			readl(X)
#define iowrite8(val,X)			writeb(val,X)
#define iowrite16(val,X)		writew(val,X)
#define iowrite32(val,X)		writel(val,X)

#define mmiowb() wmb()

#define IO_SPACE_LIMIT 0xffffffff

/* Values for nocacheflag and cmode */
#define IOMAP_NOCACHE_SER		1

#ifndef __ASSEMBLY__

extern void outsb(unsigned long port, const void *addr, unsigned long count);
extern void outsw(unsigned long port, const void *addr, unsigned long count);
extern void outsw_8(unsigned long port, const void *addr, unsigned long count);
extern void outsl(unsigned long port, const void *addr, unsigned long count);

extern void insb(unsigned long port, void *addr, unsigned long count);
extern void insw(unsigned long port, void *addr, unsigned long count);
extern void insw_8(unsigned long port, void *addr, unsigned long count);
extern void insl(unsigned long port, void *addr, unsigned long count);
extern void insl_16(unsigned long port, void *addr, unsigned long count);

extern void dma_outsb(unsigned long port, const void *addr, unsigned short count);
extern void dma_outsw(unsigned long port, const void *addr, unsigned short count);
extern void dma_outsl(unsigned long port, const void *addr, unsigned short count);

extern void dma_insb(unsigned long port, void *addr, unsigned short count);
extern void dma_insw(unsigned long port, void *addr, unsigned short count);
extern void dma_insl(unsigned long port, void *addr, unsigned short count);

static inline void readsl(const void __iomem *addr, void *buf, int len)
{
	insl((unsigned long)addr, buf, len);
}

static inline void readsw(const void __iomem *addr, void *buf, int len)
{
	insw((unsigned long)addr, buf, len);
}

static inline void readsb(const void __iomem *addr, void *buf, int len)
{
	insb((unsigned long)addr, buf, len);
}

static inline void writesl(const void __iomem *addr, const void *buf, int len)
{
	outsl((unsigned long)addr, buf, len);
}

static inline void writesw(const void __iomem *addr, const void *buf, int len)
{
	outsw((unsigned long)addr, buf, len);
}

static inline void writesb(const void __iomem *addr, const void *buf, int len)
{
	outsb((unsigned long)addr, buf, len);
}

/*
 * Map some physical address range into the kernel address space.
 */
static inline void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
				int cacheflag)
{
	return (void __iomem *)physaddr;
}

/*
 * Unmap a ioremap()ed region again
 */
static inline void iounmap(void *addr)
{
}

/*
 * __iounmap unmaps nearly everything, so be careful
 * it doesn't free currently pointer/page tables anymore but it
 * wans't used anyway and might be added later.
 */
static inline void __iounmap(void *addr, unsigned long size)
{
}

/*
 * Set new cache mode for some kernel address space.
 * The caller must push data for that range itself, if such data may already
 * be in the cache.
 */
static inline void kernel_set_cachemode(void *addr, unsigned long size,
					int cmode)
{
}

static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
{
	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}
static inline void __iomem *ioremap_nocache(unsigned long physaddr,
					    unsigned long size)
{
	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}

extern void blkfin_inv_cache_all(void);

#endif

#define	ioport_map(port, nr)		((void __iomem*)(port))
#define	ioport_unmap(addr)

/* Pages to physical address... */
#define page_to_bus(page)       ((page - mem_map) << PAGE_SHIFT)

#define phys_to_virt(vaddr)	((void *) (vaddr))
#define virt_to_phys(vaddr)	((unsigned long) (vaddr))

#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt

/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

#endif				/* __KERNEL__ */

#endif				/* _BFIN_IO_H */
Commit	Line	Data
96f1050d RG	1	/*
	2	* Copyright 2004-2009 Analog Devices Inc.
	3	*
	4	* Licensed under the GPL-2 or later.
	5	*/
	6
1394f032 BW	7	#ifndef _BFIN_IO_H
	8	#define _BFIN_IO_H
	9
	10	#ifdef __KERNEL__
	11
	12	#ifndef __ASSEMBLY__
	13	#include <linux/types.h>
	14	#endif
	15	#include <linux/compiler.h>
	16
	17	/*
	18	* These are for ISA/PCI shared memory _only_ and should never be used
	19	* on any other type of memory, including Zorro memory. They are meant to
	20	* access the bus in the bus byte order which is little-endian!.
	21	*
	22	* readX/writeX() are used to access memory mapped devices. On some
	23	* architectures the memory mapped IO stuff needs to be accessed
	24	* differently. On the bfin architecture, we just read/write the
	25	* memory location directly.
	26	*/
	27	#ifndef __ASSEMBLY__
	28
216e39db	29	static inline unsigned char readb(const volatile void __iomem *addr)
1394f032 BW	30	{
	31	unsigned int val;
	32	int tmp;
	33
	34	__asm__ __volatile__ ("cli %1;\n\t"
	35	"NOP; NOP; SSYNC;\n\t"
	36	"%0 = b [%2] (z);\n\t"
	37	"sti %1;\n\t"
	38	: "=d"(val), "=d"(tmp): "a"(addr)
	39	);
	40
	41	return (unsigned char) val;
	42	}
	43
216e39db	44	static inline unsigned short readw(const volatile void __iomem *addr)
1394f032 BW	45	{
	46	unsigned int val;
	47	int tmp;
	48
	49	__asm__ __volatile__ ("cli %1;\n\t"
	50	"NOP; NOP; SSYNC;\n\t"
	51	"%0 = w [%2] (z);\n\t"
	52	"sti %1;\n\t"
	53	: "=d"(val), "=d"(tmp): "a"(addr)
	54	);
	55
	56	return (unsigned short) val;
	57	}
	58
216e39db	59	static inline unsigned int readl(const volatile void __iomem *addr)
1394f032 BW	60	{
	61	unsigned int val;
	62	int tmp;
	63
	64	__asm__ __volatile__ ("cli %1;\n\t"
	65	"NOP; NOP; SSYNC;\n\t"
	66	"%0 = [%2];\n\t"
	67	"sti %1;\n\t"
	68	: "=d"(val), "=d"(tmp): "a"(addr)
	69	);
	70	return val;
	71	}
	72
	73	#endif /* __ASSEMBLY__ */
	74
	75	#define writeb(b,addr) (void)(((volatile unsigned char ) (addr)) = (b))
	76	#define writew(b,addr) (void)(((volatile unsigned short ) (addr)) = (b))
	77	#define writel(b,addr) (void)(((volatile unsigned int ) (addr)) = (b))
	78
	79	#define __raw_readb readb
	80	#define __raw_readw readw
	81	#define __raw_readl readl
	82	#define __raw_writeb writeb
	83	#define __raw_writew writew
	84	#define __raw_writel writel
	85	#define memset_io(a,b,c) memset((void *)(a),(b),(c))
	86	#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
	87	#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
	88
f75196c4 MF	89	/* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */
	90	#define __io(port) ((void *)(unsigned long)(port))
	91
	92	#define inb(port) readb(__io(port))
	93	#define inw(port) readw(__io(port))
	94	#define inl(port) readl(__io(port))
	95	#define outb(x,port) writeb(x,__io(port))
	96	#define outw(x,port) writew(x,__io(port))
	97	#define outl(x,port) writel(x,__io(port))
	98
	99	#define inb_p(port) inb(__io(port))
	100	#define inw_p(port) inw(__io(port))
	101	#define inl_p(port) inl(__io(port))
	102	#define outb_p(x,port) outb(x,__io(port))
	103	#define outw_p(x,port) outw(x,__io(port))
	104	#define outl_p(x,port) outl(x,__io(port))
1394f032	105
55e247e7 SZ	106	#define ioread8_rep(a,d,c) readsb(a,d,c)
	107	#define ioread16_rep(a,d,c) readsw(a,d,c)
	108	#define ioread32_rep(a,d,c) readsl(a,d,c)
	109	#define iowrite8_rep(a,s,c) writesb(a,s,c)
	110	#define iowrite16_rep(a,s,c) writesw(a,s,c)
	111	#define iowrite32_rep(a,s,c) writesl(a,s,c)
1394f032 BW	112
	113	#define ioread8(X) readb(X)
	114	#define ioread16(X) readw(X)
	115	#define ioread32(X) readl(X)
	116	#define iowrite8(val,X) writeb(val,X)
	117	#define iowrite16(val,X) writew(val,X)
	118	#define iowrite32(val,X) writel(val,X)
	119
ecdbfc1a MF	120	#define mmiowb() wmb()
ecdbfc1a MF	121
1394f032 BW	122	#define IO_SPACE_LIMIT 0xffffffff
	123
	124	/* Values for nocacheflag and cmode */
	125	#define IOMAP_NOCACHE_SER 1
	126
	127	#ifndef __ASSEMBLY__
	128
b7b2d344 BW	129	extern void outsb(unsigned long port, const void *addr, unsigned long count);
b7b2d344 BW	130	extern void outsw(unsigned long port, const void *addr, unsigned long count);
59069676	131	extern void outsw_8(unsigned long port, const void *addr, unsigned long count);
b7b2d344	132	extern void outsl(unsigned long port, const void *addr, unsigned long count);
1394f032	133
b7b2d344 BW	134	extern void insb(unsigned long port, void *addr, unsigned long count);
b7b2d344 BW	135	extern void insw(unsigned long port, void *addr, unsigned long count);
59069676	136	extern void insw_8(unsigned long port, void *addr, unsigned long count);
b7b2d344	137	extern void insl(unsigned long port, void *addr, unsigned long count);
5c91fb90	138	extern void insl_16(unsigned long port, void *addr, unsigned long count);
23ee968d	139
b7b2d344 BW	140	extern void dma_outsb(unsigned long port, const void *addr, unsigned short count);
	141	extern void dma_outsw(unsigned long port, const void *addr, unsigned short count);
	142	extern void dma_outsl(unsigned long port, const void *addr, unsigned short count);
23ee968d	143
b7b2d344 BW	144	extern void dma_insb(unsigned long port, void *addr, unsigned short count);
	145	extern void dma_insw(unsigned long port, void *addr, unsigned short count);
	146	extern void dma_insl(unsigned long port, void *addr, unsigned short count);
1394f032	147
121e598f BW	148	static inline void readsl(const void __iomem addr, void buf, int len)
	149	{
	150	insl((unsigned long)addr, buf, len);
	151	}
	152
	153	static inline void readsw(const void __iomem addr, void buf, int len)
	154	{
	155	insw((unsigned long)addr, buf, len);
	156	}
	157
	158	static inline void readsb(const void __iomem addr, void buf, int len)
	159	{
	160	insb((unsigned long)addr, buf, len);
	161	}
	162
	163	static inline void writesl(const void __iomem addr, const void buf, int len)
	164	{
	165	outsl((unsigned long)addr, buf, len);
	166	}
	167
	168	static inline void writesw(const void __iomem addr, const void buf, int len)
	169	{
	170	outsw((unsigned long)addr, buf, len);
	171	}
	172
	173	static inline void writesb(const void __iomem addr, const void buf, int len)
	174	{
	175	outsb((unsigned long)addr, buf, len);
	176	}
	177
1394f032 BW	178	/*
	179	* Map some physical address range into the kernel address space.
	180	*/
	181	static inline void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
	182	int cacheflag)
	183	{
	184	return (void __iomem *)physaddr;
	185	}
	186
	187	/*
	188	* Unmap a ioremap()ed region again
	189	*/
	190	static inline void iounmap(void *addr)
	191	{
	192	}
	193
	194	/*
	195	* __iounmap unmaps nearly everything, so be careful
	196	* it doesn't free currently pointer/page tables anymore but it
	197	* wans't used anyway and might be added later.
	198	*/
	199	static inline void __iounmap(void *addr, unsigned long size)
	200	{
	201	}
	202
	203	/*
	204	* Set new cache mode for some kernel address space.
	205	* The caller must push data for that range itself, if such data may already
	206	* be in the cache.
	207	*/
	208	static inline void kernel_set_cachemode(void *addr, unsigned long size,
	209	int cmode)
	210	{
	211	}
	212
	213	static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
	214	{
	215	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
	216	}
	217	static inline void __iomem *ioremap_nocache(unsigned long physaddr,
	218	unsigned long size)
	219	{
	220	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
	221	}
	222
	223	extern void blkfin_inv_cache_all(void);
	224
	225	#endif
	226
	227	#define ioport_map(port, nr) ((void __iomem*)(port))
	228	#define ioport_unmap(addr)
	229
1394f032	230	/* Pages to physical address... */
1394f032 BW	231	#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
1394f032 BW	232
1394f032 BW	233	#define phys_to_virt(vaddr) ((void *) (vaddr))
	234	#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
	235
	236	#define virt_to_bus virt_to_phys
	237	#define bus_to_virt phys_to_virt
	238
	239	/*
	240	* Convert a physical pointer to a virtual kernel pointer for /dev/mem
	241	* access
	242	*/
	243	#define xlate_dev_mem_ptr(p) __va(p)
	244
	245	/*
	246	* Convert a virtual cached pointer to an uncached pointer
	247	*/
	248	#define xlate_dev_kmem_ptr(p) p
	249
	250	#endif /* __KERNEL__ */
	251
	252	#endif /* _BFIN_IO_H */