Merge branch 'audit.b50' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/audit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / avr32 / kernel / time.c
CommitLineData
5f97f7f9 1/*
7760989e 2 * Copyright (C) 2004-2007 Atmel Corporation
5f97f7f9 3 *
5f97f7f9
HS
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
5f97f7f9 8#include <linux/clk.h>
e723ff66 9#include <linux/clockchips.h>
5f97f7f9
HS
10#include <linux/time.h>
11#include <linux/module.h>
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/kernel_stat.h>
15#include <linux/errno.h>
16#include <linux/init.h>
17#include <linux/profile.h>
18#include <linux/sysdev.h>
7760989e 19#include <linux/err.h>
5f97f7f9
HS
20
21#include <asm/div64.h>
22#include <asm/sysreg.h>
23#include <asm/io.h>
24#include <asm/sections.h>
25
e723ff66 26#include <asm/arch/pm.h>
7760989e 27
7760989e 28
e723ff66 29static cycle_t read_cycle_count(void)
5f97f7f9
HS
30{
31 return (cycle_t)sysreg_read(COUNT);
32}
33
62c6df62
DB
34/*
35 * The architectural cycle count registers are a fine clocksource unless
36 * the system idle loop use sleep states like "idle": the CPU cycles
37 * measured by COUNT (and COMPARE) don't happen during sleep states.
e723ff66 38 * Their duration also changes if cpufreq changes the CPU clock rate.
62c6df62
DB
39 * So we rate the clocksource using COUNT as very low quality.
40 */
e723ff66
DB
41static struct clocksource counter = {
42 .name = "avr32_counter",
62c6df62 43 .rating = 50,
5f97f7f9
HS
44 .read = read_cycle_count,
45 .mask = CLOCKSOURCE_MASK(32),
46 .shift = 16,
2693506c 47 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
5f97f7f9
HS
48};
49
e723ff66 50static irqreturn_t timer_interrupt(int irq, void *dev_id)
5f97f7f9 51{
e723ff66 52 struct clock_event_device *evdev = dev_id;
7760989e 53
e723ff66
DB
54 /*
55 * Disable the interrupt until the clockevent subsystem
56 * reprograms it.
57 */
58 sysreg_write(COMPARE, 0);
7760989e 59
e723ff66
DB
60 evdev->event_handler(evdev);
61 return IRQ_HANDLED;
62}
7760989e 63
e723ff66
DB
64static struct irqaction timer_irqaction = {
65 .handler = timer_interrupt,
66 .flags = IRQF_TIMER | IRQF_DISABLED,
67 .name = "avr32_comparator",
68};
7760989e 69
e723ff66
DB
70static int comparator_next_event(unsigned long delta,
71 struct clock_event_device *evdev)
72{
73 unsigned long flags;
7760989e 74
e723ff66 75 raw_local_irq_save(flags);
7760989e 76
e723ff66
DB
77 /* The time to read COUNT then update COMPARE must be less
78 * than the min_delta_ns value for this clockevent source.
79 */
80 sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1);
5f97f7f9 81
e723ff66 82 raw_local_irq_restore(flags);
7760989e
HCE
83
84 return 0;
5f97f7f9
HS
85}
86
e723ff66
DB
87static void comparator_mode(enum clock_event_mode mode,
88 struct clock_event_device *evdev)
5f97f7f9 89{
e723ff66
DB
90 switch (mode) {
91 case CLOCK_EVT_MODE_ONESHOT:
92 pr_debug("%s: start\n", evdev->name);
93 /* FALLTHROUGH */
94 case CLOCK_EVT_MODE_RESUME:
95 cpu_disable_idle_sleep();
96 break;
97 case CLOCK_EVT_MODE_UNUSED:
98 case CLOCK_EVT_MODE_SHUTDOWN:
99 sysreg_write(COMPARE, 0);
100 pr_debug("%s: stop\n", evdev->name);
101 cpu_enable_idle_sleep();
102 break;
103 default:
104 BUG();
105 }
5f97f7f9
HS
106}
107
e723ff66
DB
108static struct clock_event_device comparator = {
109 .name = "avr32_comparator",
110 .features = CLOCK_EVT_FEAT_ONESHOT,
111 .shift = 16,
112 .rating = 50,
113 .cpumask = CPU_MASK_CPU0,
114 .set_next_event = comparator_next_event,
115 .set_mode = comparator_mode,
116};
5f97f7f9 117
5f97f7f9
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118void __init time_init(void)
119{
e723ff66 120 unsigned long counter_hz;
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121 int ret;
122
62c6df62 123 xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0);
5f97f7f9
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124 xtime.tv_nsec = 0;
125
126 set_normalized_timespec(&wall_to_monotonic,
127 -xtime.tv_sec, -xtime.tv_nsec);
128
e723ff66
DB
129 /* figure rate for counter */
130 counter_hz = clk_get_rate(boot_cpu_data.clk);
131 counter.mult = clocksource_hz2mult(counter_hz, counter.shift);
5f97f7f9 132
e723ff66 133 ret = clocksource_register(&counter);
5f97f7f9 134 if (ret)
7760989e 135 pr_debug("timer: could not register clocksource: %d\n", ret);
5f97f7f9 136
e723ff66
DB
137 /* setup COMPARE clockevent */
138 comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
139 comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
140 comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
141
142 sysreg_write(COMPARE, 0);
143 timer_irqaction.dev_id = &comparator;
144
145 ret = setup_irq(0, &timer_irqaction);
146 if (ret)
147 pr_debug("timer: could not request IRQ 0: %d\n", ret);
148 else {
149 clockevents_register_device(&comparator);
150
151 pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name,
152 ((counter_hz + 500) / 1000) / 1000,
153 ((counter_hz + 500) / 1000) % 1000);
7760989e 154 }
5f97f7f9 155}