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6170a974 CM |
1 | /* |
2 | * Copyright (C) 2012 ARM Ltd. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | #ifndef __ASM_FUTEX_H | |
17 | #define __ASM_FUTEX_H | |
18 | ||
19 | #ifdef __KERNEL__ | |
20 | ||
21 | #include <linux/futex.h> | |
22 | #include <linux/uaccess.h> | |
338d4f49 | 23 | |
6170a974 CM |
24 | #include <asm/errno.h> |
25 | ||
26 | #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \ | |
a858462e CM |
27 | do { \ |
28 | uaccess_enable(); \ | |
6170a974 | 29 | asm volatile( \ |
0ea366f5 | 30 | " prfm pstl1strm, %2\n" \ |
8e86f0b4 | 31 | "1: ldxr %w1, %2\n" \ |
6170a974 CM |
32 | insn "\n" \ |
33 | "2: stlxr %w3, %w0, %2\n" \ | |
34 | " cbnz %w3, 1b\n" \ | |
8e86f0b4 | 35 | " dmb ish\n" \ |
6170a974 CM |
36 | "3:\n" \ |
37 | " .pushsection .fixup,\"ax\"\n" \ | |
4da7a56c | 38 | " .align 2\n" \ |
6170a974 CM |
39 | "4: mov %w0, %w5\n" \ |
40 | " b 3b\n" \ | |
41 | " .popsection\n" \ | |
161994d1 AB |
42 | _ASM_EXTABLE(1b, 4b) \ |
43 | _ASM_EXTABLE(2b, 4b) \ | |
6170a974 CM |
44 | : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \ |
45 | : "r" (oparg), "Ir" (-EFAULT) \ | |
a858462e CM |
46 | : "memory"); \ |
47 | uaccess_disable(); \ | |
48 | } while (0) | |
6170a974 CM |
49 | |
50 | static inline int | |
51 | futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr) | |
52 | { | |
53 | int op = (encoded_op >> 28) & 7; | |
54 | int cmp = (encoded_op >> 24) & 15; | |
55 | int oparg = (encoded_op << 8) >> 20; | |
56 | int cmparg = (encoded_op << 20) >> 20; | |
57 | int oldval = 0, ret, tmp; | |
58 | ||
59 | if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) | |
60 | oparg = 1 << oparg; | |
61 | ||
62 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) | |
63 | return -EFAULT; | |
64 | ||
2f09b227 | 65 | pagefault_disable(); |
6170a974 CM |
66 | |
67 | switch (op) { | |
68 | case FUTEX_OP_SET: | |
69 | __futex_atomic_op("mov %w0, %w4", | |
70 | ret, oldval, uaddr, tmp, oparg); | |
71 | break; | |
72 | case FUTEX_OP_ADD: | |
73 | __futex_atomic_op("add %w0, %w1, %w4", | |
74 | ret, oldval, uaddr, tmp, oparg); | |
75 | break; | |
76 | case FUTEX_OP_OR: | |
77 | __futex_atomic_op("orr %w0, %w1, %w4", | |
78 | ret, oldval, uaddr, tmp, oparg); | |
79 | break; | |
80 | case FUTEX_OP_ANDN: | |
81 | __futex_atomic_op("and %w0, %w1, %w4", | |
82 | ret, oldval, uaddr, tmp, ~oparg); | |
83 | break; | |
84 | case FUTEX_OP_XOR: | |
85 | __futex_atomic_op("eor %w0, %w1, %w4", | |
86 | ret, oldval, uaddr, tmp, oparg); | |
87 | break; | |
88 | default: | |
89 | ret = -ENOSYS; | |
90 | } | |
91 | ||
2f09b227 | 92 | pagefault_enable(); |
6170a974 CM |
93 | |
94 | if (!ret) { | |
95 | switch (cmp) { | |
96 | case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; | |
97 | case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; | |
98 | case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; | |
99 | case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; | |
100 | case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; | |
101 | case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; | |
102 | default: ret = -ENOSYS; | |
103 | } | |
104 | } | |
105 | return ret; | |
106 | } | |
107 | ||
108 | static inline int | |
109 | futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, | |
110 | u32 oldval, u32 newval) | |
111 | { | |
112 | int ret = 0; | |
113 | u32 val, tmp; | |
114 | ||
115 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) | |
116 | return -EFAULT; | |
117 | ||
a858462e | 118 | uaccess_enable(); |
6170a974 | 119 | asm volatile("// futex_atomic_cmpxchg_inatomic\n" |
0ea366f5 | 120 | " prfm pstl1strm, %2\n" |
8e86f0b4 | 121 | "1: ldxr %w1, %2\n" |
6170a974 CM |
122 | " sub %w3, %w1, %w4\n" |
123 | " cbnz %w3, 3f\n" | |
124 | "2: stlxr %w3, %w5, %2\n" | |
125 | " cbnz %w3, 1b\n" | |
8e86f0b4 | 126 | " dmb ish\n" |
6170a974 CM |
127 | "3:\n" |
128 | " .pushsection .fixup,\"ax\"\n" | |
129 | "4: mov %w0, %w6\n" | |
130 | " b 3b\n" | |
131 | " .popsection\n" | |
161994d1 AB |
132 | _ASM_EXTABLE(1b, 4b) |
133 | _ASM_EXTABLE(2b, 4b) | |
6170a974 CM |
134 | : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp) |
135 | : "r" (oldval), "r" (newval), "Ir" (-EFAULT) | |
95c41896 | 136 | : "memory"); |
a858462e | 137 | uaccess_disable(); |
6170a974 CM |
138 | |
139 | *uval = val; | |
140 | return ret; | |
141 | } | |
142 | ||
143 | #endif /* __KERNEL__ */ | |
144 | #endif /* __ASM_FUTEX_H */ |