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61c542bf KK |
1 | /* linux/arch/arm/plat-samsung/devs.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * Base SAMSUNG platform device definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/timer.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/serial_core.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/string.h> | |
24 | #include <linux/dma-mapping.h> | |
57167149 KK |
25 | #include <linux/fb.h> |
26 | #include <linux/gfp.h> | |
0523ec3a KK |
27 | #include <linux/mtd/mtd.h> |
28 | #include <linux/mtd/onenand.h> | |
bad1e6aa KK |
29 | #include <linux/mtd/partitions.h> |
30 | #include <linux/mmc/host.h> | |
57167149 | 31 | #include <linux/ioport.h> |
715a3e41 | 32 | #include <linux/platform_data/s3c-hsudc.h> |
126625e1 | 33 | #include <linux/platform_data/s3c-hsotg.h> |
61c542bf KK |
34 | |
35 | #include <asm/irq.h> | |
57167149 | 36 | #include <asm/pmu.h> |
61c542bf KK |
37 | #include <asm/mach/arch.h> |
38 | #include <asm/mach/map.h> | |
39 | #include <asm/mach/irq.h> | |
40 | ||
41 | #include <mach/hardware.h> | |
42 | #include <mach/dma.h> | |
43 | #include <mach/irqs.h> | |
44 | #include <mach/map.h> | |
45 | ||
46 | #include <plat/cpu.h> | |
47 | #include <plat/devs.h> | |
bad1e6aa | 48 | #include <plat/adc.h> |
436d42c6 AB |
49 | #include <linux/platform_data/ata-samsung_cf.h> |
50 | #include <linux/platform_data/usb-ehci-s5p.h> | |
61c542bf KK |
51 | #include <plat/fb.h> |
52 | #include <plat/fb-s3c2410.h> | |
436d42c6 AB |
53 | #include <linux/platform_data/hwmon-s3c.h> |
54 | #include <linux/platform_data/i2c-s3c2410.h> | |
bad1e6aa | 55 | #include <plat/keypad.h> |
436d42c6 AB |
56 | #include <linux/platform_data/mmc-s3cmci.h> |
57 | #include <linux/platform_data/mtd-nand-s3c2410.h> | |
bad1e6aa | 58 | #include <plat/sdhci.h> |
436d42c6 AB |
59 | #include <linux/platform_data/touchscreen-s3c2410.h> |
60 | #include <linux/platform_data/usb-s3c2410_udc.h> | |
61 | #include <linux/platform_data/usb-ohci-s3c2410.h> | |
57167149 KK |
62 | #include <plat/usb-phy.h> |
63 | #include <plat/regs-iic.h> | |
61c542bf KK |
64 | #include <plat/regs-serial.h> |
65 | #include <plat/regs-spi.h> | |
436d42c6 | 66 | #include <linux/platform_data/spi-s3c64xx.h> |
61c542bf KK |
67 | |
68 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | |
69 | ||
70 | /* AC97 */ | |
71 | #ifdef CONFIG_CPU_S3C2440 | |
72 | static struct resource s3c_ac97_resource[] = { | |
e663cb76 KK |
73 | [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), |
74 | [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), | |
75 | [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"), | |
76 | [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"), | |
77 | [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"), | |
61c542bf KK |
78 | }; |
79 | ||
80 | struct platform_device s3c_device_ac97 = { | |
81 | .name = "samsung-ac97", | |
82 | .id = -1, | |
83 | .num_resources = ARRAY_SIZE(s3c_ac97_resource), | |
84 | .resource = s3c_ac97_resource, | |
85 | .dev = { | |
86 | .dma_mask = &samsung_device_dma_mask, | |
87 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
88 | } | |
89 | }; | |
90 | #endif /* CONFIG_CPU_S3C2440 */ | |
91 | ||
92 | /* ADC */ | |
93 | ||
94 | #ifdef CONFIG_PLAT_S3C24XX | |
95 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
96 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
97 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
98 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
61c542bf KK |
99 | }; |
100 | ||
101 | struct platform_device s3c_device_adc = { | |
102 | .name = "s3c24xx-adc", | |
103 | .id = -1, | |
104 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
105 | .resource = s3c_adc_resource, | |
106 | }; | |
107 | #endif /* CONFIG_PLAT_S3C24XX */ | |
108 | ||
bad1e6aa KK |
109 | #if defined(CONFIG_SAMSUNG_DEV_ADC) |
110 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
111 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
112 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
113 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
bad1e6aa KK |
114 | }; |
115 | ||
116 | struct platform_device s3c_device_adc = { | |
117 | .name = "samsung-adc", | |
118 | .id = -1, | |
119 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
120 | .resource = s3c_adc_resource, | |
121 | }; | |
122 | #endif /* CONFIG_SAMSUNG_DEV_ADC */ | |
123 | ||
61c542bf KK |
124 | /* Camif Controller */ |
125 | ||
126 | #ifdef CONFIG_CPU_S3C2440 | |
127 | static struct resource s3c_camif_resource[] = { | |
e663cb76 | 128 | [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), |
705c75e3 SN |
129 | [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C), |
130 | [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P), | |
61c542bf KK |
131 | }; |
132 | ||
133 | struct platform_device s3c_device_camif = { | |
134 | .name = "s3c2440-camif", | |
135 | .id = -1, | |
136 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | |
137 | .resource = s3c_camif_resource, | |
138 | .dev = { | |
139 | .dma_mask = &samsung_device_dma_mask, | |
140 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
141 | } | |
142 | }; | |
143 | #endif /* CONFIG_CPU_S3C2440 */ | |
144 | ||
bad1e6aa KK |
145 | /* ASOC DMA */ |
146 | ||
147 | struct platform_device samsung_asoc_dma = { | |
148 | .name = "samsung-audio", | |
149 | .id = -1, | |
150 | .dev = { | |
151 | .dma_mask = &samsung_device_dma_mask, | |
152 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
153 | } | |
154 | }; | |
155 | ||
156 | struct platform_device samsung_asoc_idma = { | |
157 | .name = "samsung-idma", | |
158 | .id = -1, | |
159 | .dev = { | |
160 | .dma_mask = &samsung_device_dma_mask, | |
161 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
162 | } | |
163 | }; | |
164 | ||
165 | /* FB */ | |
166 | ||
167 | #ifdef CONFIG_S3C_DEV_FB | |
168 | static struct resource s3c_fb_resource[] = { | |
e663cb76 KK |
169 | [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), |
170 | [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), | |
171 | [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), | |
172 | [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), | |
bad1e6aa KK |
173 | }; |
174 | ||
175 | struct platform_device s3c_device_fb = { | |
176 | .name = "s3c-fb", | |
177 | .id = -1, | |
178 | .num_resources = ARRAY_SIZE(s3c_fb_resource), | |
179 | .resource = s3c_fb_resource, | |
180 | .dev = { | |
181 | .dma_mask = &samsung_device_dma_mask, | |
182 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
183 | }, | |
184 | }; | |
185 | ||
186 | void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | |
187 | { | |
188 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
189 | &s3c_device_fb); | |
190 | } | |
191 | #endif /* CONFIG_S3C_DEV_FB */ | |
192 | ||
57167149 KK |
193 | /* FIMC */ |
194 | ||
195 | #ifdef CONFIG_S5P_DEV_FIMC0 | |
196 | static struct resource s5p_fimc0_resource[] = { | |
e663cb76 KK |
197 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K), |
198 | [1] = DEFINE_RES_IRQ(IRQ_FIMC0), | |
57167149 KK |
199 | }; |
200 | ||
201 | struct platform_device s5p_device_fimc0 = { | |
202 | .name = "s5p-fimc", | |
203 | .id = 0, | |
204 | .num_resources = ARRAY_SIZE(s5p_fimc0_resource), | |
205 | .resource = s5p_fimc0_resource, | |
206 | .dev = { | |
207 | .dma_mask = &samsung_device_dma_mask, | |
208 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
209 | }, | |
210 | }; | |
07e87e15 SN |
211 | |
212 | struct platform_device s5p_device_fimc_md = { | |
213 | .name = "s5p-fimc-md", | |
214 | .id = -1, | |
215 | }; | |
57167149 KK |
216 | #endif /* CONFIG_S5P_DEV_FIMC0 */ |
217 | ||
218 | #ifdef CONFIG_S5P_DEV_FIMC1 | |
219 | static struct resource s5p_fimc1_resource[] = { | |
e663cb76 KK |
220 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K), |
221 | [1] = DEFINE_RES_IRQ(IRQ_FIMC1), | |
57167149 KK |
222 | }; |
223 | ||
224 | struct platform_device s5p_device_fimc1 = { | |
225 | .name = "s5p-fimc", | |
226 | .id = 1, | |
227 | .num_resources = ARRAY_SIZE(s5p_fimc1_resource), | |
228 | .resource = s5p_fimc1_resource, | |
229 | .dev = { | |
230 | .dma_mask = &samsung_device_dma_mask, | |
231 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
232 | }, | |
233 | }; | |
234 | #endif /* CONFIG_S5P_DEV_FIMC1 */ | |
235 | ||
236 | #ifdef CONFIG_S5P_DEV_FIMC2 | |
237 | static struct resource s5p_fimc2_resource[] = { | |
e663cb76 KK |
238 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K), |
239 | [1] = DEFINE_RES_IRQ(IRQ_FIMC2), | |
57167149 KK |
240 | }; |
241 | ||
242 | struct platform_device s5p_device_fimc2 = { | |
243 | .name = "s5p-fimc", | |
244 | .id = 2, | |
245 | .num_resources = ARRAY_SIZE(s5p_fimc2_resource), | |
246 | .resource = s5p_fimc2_resource, | |
247 | .dev = { | |
248 | .dma_mask = &samsung_device_dma_mask, | |
249 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
250 | }, | |
251 | }; | |
252 | #endif /* CONFIG_S5P_DEV_FIMC2 */ | |
253 | ||
254 | #ifdef CONFIG_S5P_DEV_FIMC3 | |
255 | static struct resource s5p_fimc3_resource[] = { | |
e663cb76 KK |
256 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K), |
257 | [1] = DEFINE_RES_IRQ(IRQ_FIMC3), | |
57167149 KK |
258 | }; |
259 | ||
260 | struct platform_device s5p_device_fimc3 = { | |
261 | .name = "s5p-fimc", | |
262 | .id = 3, | |
263 | .num_resources = ARRAY_SIZE(s5p_fimc3_resource), | |
264 | .resource = s5p_fimc3_resource, | |
265 | .dev = { | |
266 | .dma_mask = &samsung_device_dma_mask, | |
267 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
268 | }, | |
269 | }; | |
270 | #endif /* CONFIG_S5P_DEV_FIMC3 */ | |
271 | ||
561ab530 KD |
272 | /* G2D */ |
273 | ||
274 | #ifdef CONFIG_S5P_DEV_G2D | |
275 | static struct resource s5p_g2d_resource[] = { | |
24eec601 TB |
276 | [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K), |
277 | [1] = DEFINE_RES_IRQ(IRQ_2D), | |
561ab530 KD |
278 | }; |
279 | ||
280 | struct platform_device s5p_device_g2d = { | |
281 | .name = "s5p-g2d", | |
282 | .id = 0, | |
283 | .num_resources = ARRAY_SIZE(s5p_g2d_resource), | |
284 | .resource = s5p_g2d_resource, | |
285 | .dev = { | |
286 | .dma_mask = &samsung_device_dma_mask, | |
287 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
288 | }, | |
289 | }; | |
290 | #endif /* CONFIG_S5P_DEV_G2D */ | |
291 | ||
3dbe6d4c AP |
292 | #ifdef CONFIG_S5P_DEV_JPEG |
293 | static struct resource s5p_jpeg_resource[] = { | |
294 | [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K), | |
295 | [1] = DEFINE_RES_IRQ(IRQ_JPEG), | |
296 | }; | |
297 | ||
298 | struct platform_device s5p_device_jpeg = { | |
299 | .name = "s5p-jpeg", | |
300 | .id = 0, | |
301 | .num_resources = ARRAY_SIZE(s5p_jpeg_resource), | |
302 | .resource = s5p_jpeg_resource, | |
303 | .dev = { | |
304 | .dma_mask = &samsung_device_dma_mask, | |
305 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
306 | }, | |
307 | }; | |
308 | #endif /* CONFIG_S5P_DEV_JPEG */ | |
309 | ||
57167149 KK |
310 | /* FIMD0 */ |
311 | ||
312 | #ifdef CONFIG_S5P_DEV_FIMD0 | |
313 | static struct resource s5p_fimd0_resource[] = { | |
e663cb76 KK |
314 | [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K), |
315 | [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC), | |
316 | [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO), | |
317 | [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM), | |
57167149 KK |
318 | }; |
319 | ||
320 | struct platform_device s5p_device_fimd0 = { | |
321 | .name = "s5p-fb", | |
322 | .id = 0, | |
323 | .num_resources = ARRAY_SIZE(s5p_fimd0_resource), | |
324 | .resource = s5p_fimd0_resource, | |
325 | .dev = { | |
326 | .dma_mask = &samsung_device_dma_mask, | |
327 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
328 | }, | |
329 | }; | |
330 | ||
331 | void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd) | |
332 | { | |
333 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
334 | &s5p_device_fimd0); | |
335 | } | |
336 | #endif /* CONFIG_S5P_DEV_FIMD0 */ | |
337 | ||
bad1e6aa KK |
338 | /* HWMON */ |
339 | ||
340 | #ifdef CONFIG_S3C_DEV_HWMON | |
341 | struct platform_device s3c_device_hwmon = { | |
342 | .name = "s3c-hwmon", | |
343 | .id = -1, | |
344 | .dev.parent = &s3c_device_adc.dev, | |
345 | }; | |
346 | ||
347 | void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | |
348 | { | |
349 | s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), | |
350 | &s3c_device_hwmon); | |
351 | } | |
352 | #endif /* CONFIG_S3C_DEV_HWMON */ | |
353 | ||
354 | /* HSMMC */ | |
355 | ||
bad1e6aa KK |
356 | #ifdef CONFIG_S3C_DEV_HSMMC |
357 | static struct resource s3c_hsmmc_resource[] = { | |
e663cb76 KK |
358 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), |
359 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), | |
bad1e6aa KK |
360 | }; |
361 | ||
362 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | |
363 | .max_width = 4, | |
364 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
365 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
366 | }; |
367 | ||
368 | struct platform_device s3c_device_hsmmc0 = { | |
369 | .name = "s3c-sdhci", | |
370 | .id = 0, | |
371 | .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), | |
372 | .resource = s3c_hsmmc_resource, | |
373 | .dev = { | |
374 | .dma_mask = &samsung_device_dma_mask, | |
375 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
376 | .platform_data = &s3c_hsmmc0_def_platdata, | |
377 | }, | |
378 | }; | |
379 | ||
380 | void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | |
381 | { | |
382 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); | |
383 | } | |
384 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
385 | ||
386 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
387 | static struct resource s3c_hsmmc1_resource[] = { | |
e663cb76 KK |
388 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), |
389 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), | |
bad1e6aa KK |
390 | }; |
391 | ||
392 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | |
393 | .max_width = 4, | |
394 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
395 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
396 | }; |
397 | ||
398 | struct platform_device s3c_device_hsmmc1 = { | |
399 | .name = "s3c-sdhci", | |
400 | .id = 1, | |
401 | .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), | |
402 | .resource = s3c_hsmmc1_resource, | |
403 | .dev = { | |
404 | .dma_mask = &samsung_device_dma_mask, | |
405 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
406 | .platform_data = &s3c_hsmmc1_def_platdata, | |
407 | }, | |
408 | }; | |
409 | ||
410 | void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | |
411 | { | |
412 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); | |
413 | } | |
414 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
415 | ||
416 | /* HSMMC2 */ | |
417 | ||
418 | #ifdef CONFIG_S3C_DEV_HSMMC2 | |
419 | static struct resource s3c_hsmmc2_resource[] = { | |
e663cb76 KK |
420 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), |
421 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), | |
bad1e6aa KK |
422 | }; |
423 | ||
424 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | |
425 | .max_width = 4, | |
426 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
427 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
428 | }; |
429 | ||
430 | struct platform_device s3c_device_hsmmc2 = { | |
431 | .name = "s3c-sdhci", | |
432 | .id = 2, | |
433 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | |
434 | .resource = s3c_hsmmc2_resource, | |
435 | .dev = { | |
436 | .dma_mask = &samsung_device_dma_mask, | |
437 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
438 | .platform_data = &s3c_hsmmc2_def_platdata, | |
439 | }, | |
440 | }; | |
441 | ||
442 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | |
443 | { | |
444 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); | |
445 | } | |
446 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
447 | ||
448 | #ifdef CONFIG_S3C_DEV_HSMMC3 | |
449 | static struct resource s3c_hsmmc3_resource[] = { | |
e663cb76 KK |
450 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), |
451 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), | |
bad1e6aa KK |
452 | }; |
453 | ||
454 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | |
455 | .max_width = 4, | |
456 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
457 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
458 | }; |
459 | ||
460 | struct platform_device s3c_device_hsmmc3 = { | |
461 | .name = "s3c-sdhci", | |
462 | .id = 3, | |
463 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | |
464 | .resource = s3c_hsmmc3_resource, | |
465 | .dev = { | |
466 | .dma_mask = &samsung_device_dma_mask, | |
467 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
468 | .platform_data = &s3c_hsmmc3_def_platdata, | |
469 | }, | |
470 | }; | |
471 | ||
472 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | |
473 | { | |
474 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); | |
475 | } | |
476 | #endif /* CONFIG_S3C_DEV_HSMMC3 */ | |
477 | ||
478 | /* I2C */ | |
479 | ||
480 | static struct resource s3c_i2c0_resource[] = { | |
e663cb76 KK |
481 | [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), |
482 | [1] = DEFINE_RES_IRQ(IRQ_IIC), | |
bad1e6aa KK |
483 | }; |
484 | ||
485 | struct platform_device s3c_device_i2c0 = { | |
486 | .name = "s3c2410-i2c", | |
487 | #ifdef CONFIG_S3C_DEV_I2C1 | |
488 | .id = 0, | |
489 | #else | |
490 | .id = -1, | |
491 | #endif | |
492 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), | |
493 | .resource = s3c_i2c0_resource, | |
494 | }; | |
495 | ||
496 | struct s3c2410_platform_i2c default_i2c_data __initdata = { | |
497 | .flags = 0, | |
498 | .slave_addr = 0x10, | |
499 | .frequency = 100*1000, | |
500 | .sda_delay = 100, | |
501 | }; | |
502 | ||
503 | void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |
504 | { | |
505 | struct s3c2410_platform_i2c *npd; | |
506 | ||
693cec97 | 507 | if (!pd) { |
bad1e6aa | 508 | pd = &default_i2c_data; |
693cec97 SN |
509 | pd->bus_num = 0; |
510 | } | |
bad1e6aa KK |
511 | |
512 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
513 | &s3c_device_i2c0); | |
514 | ||
515 | if (!npd->cfg_gpio) | |
516 | npd->cfg_gpio = s3c_i2c0_cfg_gpio; | |
517 | } | |
518 | ||
519 | #ifdef CONFIG_S3C_DEV_I2C1 | |
520 | static struct resource s3c_i2c1_resource[] = { | |
e663cb76 KK |
521 | [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), |
522 | [1] = DEFINE_RES_IRQ(IRQ_IIC1), | |
bad1e6aa KK |
523 | }; |
524 | ||
525 | struct platform_device s3c_device_i2c1 = { | |
526 | .name = "s3c2410-i2c", | |
527 | .id = 1, | |
528 | .num_resources = ARRAY_SIZE(s3c_i2c1_resource), | |
529 | .resource = s3c_i2c1_resource, | |
530 | }; | |
531 | ||
532 | void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |
533 | { | |
534 | struct s3c2410_platform_i2c *npd; | |
535 | ||
536 | if (!pd) { | |
537 | pd = &default_i2c_data; | |
538 | pd->bus_num = 1; | |
539 | } | |
540 | ||
541 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
542 | &s3c_device_i2c1); | |
543 | ||
544 | if (!npd->cfg_gpio) | |
545 | npd->cfg_gpio = s3c_i2c1_cfg_gpio; | |
546 | } | |
547 | #endif /* CONFIG_S3C_DEV_I2C1 */ | |
548 | ||
549 | #ifdef CONFIG_S3C_DEV_I2C2 | |
550 | static struct resource s3c_i2c2_resource[] = { | |
e663cb76 KK |
551 | [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), |
552 | [1] = DEFINE_RES_IRQ(IRQ_IIC2), | |
bad1e6aa KK |
553 | }; |
554 | ||
555 | struct platform_device s3c_device_i2c2 = { | |
556 | .name = "s3c2410-i2c", | |
557 | .id = 2, | |
558 | .num_resources = ARRAY_SIZE(s3c_i2c2_resource), | |
559 | .resource = s3c_i2c2_resource, | |
560 | }; | |
561 | ||
562 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |
563 | { | |
564 | struct s3c2410_platform_i2c *npd; | |
565 | ||
566 | if (!pd) { | |
567 | pd = &default_i2c_data; | |
568 | pd->bus_num = 2; | |
569 | } | |
570 | ||
571 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
572 | &s3c_device_i2c2); | |
573 | ||
574 | if (!npd->cfg_gpio) | |
575 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | |
576 | } | |
577 | #endif /* CONFIG_S3C_DEV_I2C2 */ | |
578 | ||
579 | #ifdef CONFIG_S3C_DEV_I2C3 | |
580 | static struct resource s3c_i2c3_resource[] = { | |
e663cb76 KK |
581 | [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), |
582 | [1] = DEFINE_RES_IRQ(IRQ_IIC3), | |
bad1e6aa KK |
583 | }; |
584 | ||
585 | struct platform_device s3c_device_i2c3 = { | |
586 | .name = "s3c2440-i2c", | |
587 | .id = 3, | |
588 | .num_resources = ARRAY_SIZE(s3c_i2c3_resource), | |
589 | .resource = s3c_i2c3_resource, | |
590 | }; | |
591 | ||
592 | void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | |
593 | { | |
594 | struct s3c2410_platform_i2c *npd; | |
595 | ||
596 | if (!pd) { | |
597 | pd = &default_i2c_data; | |
598 | pd->bus_num = 3; | |
599 | } | |
600 | ||
601 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
602 | &s3c_device_i2c3); | |
603 | ||
604 | if (!npd->cfg_gpio) | |
605 | npd->cfg_gpio = s3c_i2c3_cfg_gpio; | |
606 | } | |
607 | #endif /*CONFIG_S3C_DEV_I2C3 */ | |
608 | ||
609 | #ifdef CONFIG_S3C_DEV_I2C4 | |
610 | static struct resource s3c_i2c4_resource[] = { | |
e663cb76 KK |
611 | [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), |
612 | [1] = DEFINE_RES_IRQ(IRQ_IIC4), | |
bad1e6aa KK |
613 | }; |
614 | ||
615 | struct platform_device s3c_device_i2c4 = { | |
616 | .name = "s3c2440-i2c", | |
617 | .id = 4, | |
618 | .num_resources = ARRAY_SIZE(s3c_i2c4_resource), | |
619 | .resource = s3c_i2c4_resource, | |
620 | }; | |
621 | ||
622 | void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | |
623 | { | |
624 | struct s3c2410_platform_i2c *npd; | |
625 | ||
626 | if (!pd) { | |
627 | pd = &default_i2c_data; | |
628 | pd->bus_num = 4; | |
629 | } | |
630 | ||
631 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
632 | &s3c_device_i2c4); | |
633 | ||
634 | if (!npd->cfg_gpio) | |
635 | npd->cfg_gpio = s3c_i2c4_cfg_gpio; | |
636 | } | |
637 | #endif /*CONFIG_S3C_DEV_I2C4 */ | |
638 | ||
639 | #ifdef CONFIG_S3C_DEV_I2C5 | |
640 | static struct resource s3c_i2c5_resource[] = { | |
e663cb76 KK |
641 | [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), |
642 | [1] = DEFINE_RES_IRQ(IRQ_IIC5), | |
bad1e6aa KK |
643 | }; |
644 | ||
645 | struct platform_device s3c_device_i2c5 = { | |
646 | .name = "s3c2440-i2c", | |
647 | .id = 5, | |
648 | .num_resources = ARRAY_SIZE(s3c_i2c5_resource), | |
649 | .resource = s3c_i2c5_resource, | |
650 | }; | |
651 | ||
652 | void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | |
653 | { | |
654 | struct s3c2410_platform_i2c *npd; | |
655 | ||
656 | if (!pd) { | |
657 | pd = &default_i2c_data; | |
658 | pd->bus_num = 5; | |
659 | } | |
660 | ||
661 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
662 | &s3c_device_i2c5); | |
663 | ||
664 | if (!npd->cfg_gpio) | |
665 | npd->cfg_gpio = s3c_i2c5_cfg_gpio; | |
666 | } | |
667 | #endif /*CONFIG_S3C_DEV_I2C5 */ | |
668 | ||
669 | #ifdef CONFIG_S3C_DEV_I2C6 | |
670 | static struct resource s3c_i2c6_resource[] = { | |
e663cb76 KK |
671 | [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), |
672 | [1] = DEFINE_RES_IRQ(IRQ_IIC6), | |
bad1e6aa KK |
673 | }; |
674 | ||
675 | struct platform_device s3c_device_i2c6 = { | |
676 | .name = "s3c2440-i2c", | |
677 | .id = 6, | |
678 | .num_resources = ARRAY_SIZE(s3c_i2c6_resource), | |
679 | .resource = s3c_i2c6_resource, | |
680 | }; | |
681 | ||
682 | void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | |
683 | { | |
684 | struct s3c2410_platform_i2c *npd; | |
685 | ||
686 | if (!pd) { | |
687 | pd = &default_i2c_data; | |
688 | pd->bus_num = 6; | |
689 | } | |
690 | ||
691 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
692 | &s3c_device_i2c6); | |
693 | ||
694 | if (!npd->cfg_gpio) | |
695 | npd->cfg_gpio = s3c_i2c6_cfg_gpio; | |
696 | } | |
697 | #endif /* CONFIG_S3C_DEV_I2C6 */ | |
698 | ||
699 | #ifdef CONFIG_S3C_DEV_I2C7 | |
700 | static struct resource s3c_i2c7_resource[] = { | |
e663cb76 KK |
701 | [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), |
702 | [1] = DEFINE_RES_IRQ(IRQ_IIC7), | |
bad1e6aa KK |
703 | }; |
704 | ||
705 | struct platform_device s3c_device_i2c7 = { | |
706 | .name = "s3c2440-i2c", | |
707 | .id = 7, | |
708 | .num_resources = ARRAY_SIZE(s3c_i2c7_resource), | |
709 | .resource = s3c_i2c7_resource, | |
710 | }; | |
711 | ||
712 | void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | |
713 | { | |
714 | struct s3c2410_platform_i2c *npd; | |
715 | ||
716 | if (!pd) { | |
717 | pd = &default_i2c_data; | |
718 | pd->bus_num = 7; | |
719 | } | |
720 | ||
721 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
722 | &s3c_device_i2c7); | |
723 | ||
724 | if (!npd->cfg_gpio) | |
725 | npd->cfg_gpio = s3c_i2c7_cfg_gpio; | |
726 | } | |
727 | #endif /* CONFIG_S3C_DEV_I2C7 */ | |
728 | ||
57167149 KK |
729 | /* I2C HDMIPHY */ |
730 | ||
731 | #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY | |
732 | static struct resource s5p_i2c_resource[] = { | |
e663cb76 KK |
733 | [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K), |
734 | [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY), | |
57167149 KK |
735 | }; |
736 | ||
737 | struct platform_device s5p_device_i2c_hdmiphy = { | |
738 | .name = "s3c2440-hdmiphy-i2c", | |
739 | .id = -1, | |
740 | .num_resources = ARRAY_SIZE(s5p_i2c_resource), | |
741 | .resource = s5p_i2c_resource, | |
742 | }; | |
743 | ||
744 | void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) | |
745 | { | |
746 | struct s3c2410_platform_i2c *npd; | |
747 | ||
748 | if (!pd) { | |
749 | pd = &default_i2c_data; | |
750 | ||
751 | if (soc_is_exynos4210()) | |
752 | pd->bus_num = 8; | |
753 | else if (soc_is_s5pv210()) | |
754 | pd->bus_num = 3; | |
755 | else | |
756 | pd->bus_num = 0; | |
757 | } | |
758 | ||
759 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
760 | &s5p_device_i2c_hdmiphy); | |
761 | } | |
762 | #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */ | |
763 | ||
61c542bf KK |
764 | /* I2S */ |
765 | ||
766 | #ifdef CONFIG_PLAT_S3C24XX | |
767 | static struct resource s3c_iis_resource[] = { | |
e663cb76 | 768 | [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), |
61c542bf KK |
769 | }; |
770 | ||
771 | struct platform_device s3c_device_iis = { | |
772 | .name = "s3c24xx-iis", | |
773 | .id = -1, | |
774 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | |
775 | .resource = s3c_iis_resource, | |
776 | .dev = { | |
777 | .dma_mask = &samsung_device_dma_mask, | |
778 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
779 | } | |
780 | }; | |
781 | #endif /* CONFIG_PLAT_S3C24XX */ | |
782 | ||
bad1e6aa KK |
783 | /* IDE CFCON */ |
784 | ||
785 | #ifdef CONFIG_SAMSUNG_DEV_IDE | |
786 | static struct resource s3c_cfcon_resource[] = { | |
e663cb76 KK |
787 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), |
788 | [1] = DEFINE_RES_IRQ(IRQ_CFCON), | |
bad1e6aa KK |
789 | }; |
790 | ||
791 | struct platform_device s3c_device_cfcon = { | |
792 | .id = 0, | |
793 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | |
794 | .resource = s3c_cfcon_resource, | |
795 | }; | |
796 | ||
eff4c58d | 797 | void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) |
bad1e6aa KK |
798 | { |
799 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | |
800 | &s3c_device_cfcon); | |
801 | } | |
802 | #endif /* CONFIG_SAMSUNG_DEV_IDE */ | |
803 | ||
804 | /* KEYPAD */ | |
805 | ||
806 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | |
807 | static struct resource samsung_keypad_resources[] = { | |
e663cb76 KK |
808 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), |
809 | [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), | |
bad1e6aa KK |
810 | }; |
811 | ||
812 | struct platform_device samsung_device_keypad = { | |
813 | .name = "samsung-keypad", | |
814 | .id = -1, | |
815 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | |
816 | .resource = samsung_keypad_resources, | |
817 | }; | |
818 | ||
819 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | |
820 | { | |
821 | struct samsung_keypad_platdata *npd; | |
822 | ||
823 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | |
824 | &samsung_device_keypad); | |
825 | ||
826 | if (!npd->cfg_gpio) | |
827 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | |
828 | } | |
829 | #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ | |
830 | ||
61c542bf KK |
831 | /* LCD Controller */ |
832 | ||
833 | #ifdef CONFIG_PLAT_S3C24XX | |
834 | static struct resource s3c_lcd_resource[] = { | |
e663cb76 KK |
835 | [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), |
836 | [1] = DEFINE_RES_IRQ(IRQ_LCD), | |
61c542bf KK |
837 | }; |
838 | ||
839 | struct platform_device s3c_device_lcd = { | |
840 | .name = "s3c2410-lcd", | |
841 | .id = -1, | |
842 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | |
843 | .resource = s3c_lcd_resource, | |
844 | .dev = { | |
845 | .dma_mask = &samsung_device_dma_mask, | |
846 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
847 | } | |
848 | }; | |
849 | ||
850 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |
851 | { | |
852 | struct s3c2410fb_mach_info *npd; | |
853 | ||
854 | npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); | |
855 | if (npd) { | |
856 | npd->displays = kmemdup(pd->displays, | |
857 | sizeof(struct s3c2410fb_display) * npd->num_displays, | |
858 | GFP_KERNEL); | |
859 | if (!npd->displays) | |
860 | printk(KERN_ERR "no memory for LCD display data\n"); | |
861 | } else { | |
862 | printk(KERN_ERR "no memory for LCD platform data\n"); | |
863 | } | |
864 | } | |
865 | #endif /* CONFIG_PLAT_S3C24XX */ | |
866 | ||
57167149 KK |
867 | /* MFC */ |
868 | ||
869 | #ifdef CONFIG_S5P_DEV_MFC | |
870 | static struct resource s5p_mfc_resource[] = { | |
e663cb76 KK |
871 | [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K), |
872 | [1] = DEFINE_RES_IRQ(IRQ_MFC), | |
57167149 KK |
873 | }; |
874 | ||
875 | struct platform_device s5p_device_mfc = { | |
876 | .name = "s5p-mfc", | |
877 | .id = -1, | |
878 | .num_resources = ARRAY_SIZE(s5p_mfc_resource), | |
879 | .resource = s5p_mfc_resource, | |
880 | }; | |
881 | ||
882 | /* | |
883 | * MFC hardware has 2 memory interfaces which are modelled as two separate | |
884 | * platform devices to let dma-mapping distinguish between them. | |
885 | * | |
886 | * MFC parent device (s5p_device_mfc) must be registered before memory | |
887 | * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r). | |
888 | */ | |
889 | ||
890 | struct platform_device s5p_device_mfc_l = { | |
891 | .name = "s5p-mfc-l", | |
892 | .id = -1, | |
893 | .dev = { | |
894 | .parent = &s5p_device_mfc.dev, | |
895 | .dma_mask = &samsung_device_dma_mask, | |
896 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
897 | }, | |
898 | }; | |
899 | ||
900 | struct platform_device s5p_device_mfc_r = { | |
901 | .name = "s5p-mfc-r", | |
902 | .id = -1, | |
903 | .dev = { | |
904 | .parent = &s5p_device_mfc.dev, | |
905 | .dma_mask = &samsung_device_dma_mask, | |
906 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
907 | }, | |
908 | }; | |
909 | #endif /* CONFIG_S5P_DEV_MFC */ | |
910 | ||
911 | /* MIPI CSIS */ | |
912 | ||
913 | #ifdef CONFIG_S5P_DEV_CSIS0 | |
914 | static struct resource s5p_mipi_csis0_resource[] = { | |
75ac7284 | 915 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K), |
e663cb76 | 916 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0), |
57167149 KK |
917 | }; |
918 | ||
919 | struct platform_device s5p_device_mipi_csis0 = { | |
920 | .name = "s5p-mipi-csis", | |
921 | .id = 0, | |
922 | .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), | |
923 | .resource = s5p_mipi_csis0_resource, | |
924 | }; | |
925 | #endif /* CONFIG_S5P_DEV_CSIS0 */ | |
926 | ||
927 | #ifdef CONFIG_S5P_DEV_CSIS1 | |
928 | static struct resource s5p_mipi_csis1_resource[] = { | |
75ac7284 | 929 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K), |
e663cb76 | 930 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1), |
57167149 KK |
931 | }; |
932 | ||
933 | struct platform_device s5p_device_mipi_csis1 = { | |
934 | .name = "s5p-mipi-csis", | |
935 | .id = 1, | |
936 | .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), | |
937 | .resource = s5p_mipi_csis1_resource, | |
938 | }; | |
939 | #endif | |
940 | ||
bad1e6aa KK |
941 | /* NAND */ |
942 | ||
943 | #ifdef CONFIG_S3C_DEV_NAND | |
944 | static struct resource s3c_nand_resource[] = { | |
e663cb76 | 945 | [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), |
bad1e6aa KK |
946 | }; |
947 | ||
948 | struct platform_device s3c_device_nand = { | |
949 | .name = "s3c2410-nand", | |
950 | .id = -1, | |
951 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | |
952 | .resource = s3c_nand_resource, | |
953 | }; | |
954 | ||
955 | /* | |
956 | * s3c_nand_copy_set() - copy nand set data | |
957 | * @set: The new structure, directly copied from the old. | |
958 | * | |
959 | * Copy all the fields from the NAND set field from what is probably __initdata | |
960 | * to new kernel memory. The code returns 0 if the copy happened correctly or | |
961 | * an error code for the calling function to display. | |
962 | * | |
963 | * Note, we currently do not try and look to see if we've already copied the | |
964 | * data in a previous set. | |
965 | */ | |
966 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | |
967 | { | |
968 | void *ptr; | |
969 | int size; | |
970 | ||
971 | size = sizeof(struct mtd_partition) * set->nr_partitions; | |
972 | if (size) { | |
973 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | |
974 | set->partitions = ptr; | |
975 | ||
976 | if (!ptr) | |
977 | return -ENOMEM; | |
978 | } | |
979 | ||
980 | if (set->nr_map && set->nr_chips) { | |
981 | size = sizeof(int) * set->nr_chips; | |
982 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | |
983 | set->nr_map = ptr; | |
984 | ||
985 | if (!ptr) | |
986 | return -ENOMEM; | |
987 | } | |
988 | ||
989 | if (set->ecc_layout) { | |
990 | ptr = kmemdup(set->ecc_layout, | |
991 | sizeof(struct nand_ecclayout), GFP_KERNEL); | |
992 | set->ecc_layout = ptr; | |
993 | ||
994 | if (!ptr) | |
995 | return -ENOMEM; | |
996 | } | |
997 | ||
998 | return 0; | |
999 | } | |
1000 | ||
1001 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |
1002 | { | |
1003 | struct s3c2410_platform_nand *npd; | |
1004 | int size; | |
1005 | int ret; | |
1006 | ||
1007 | /* note, if we get a failure in allocation, we simply drop out of the | |
1008 | * function. If there is so little memory available at initialisation | |
1009 | * time then there is little chance the system is going to run. | |
1010 | */ | |
1011 | ||
1012 | npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand), | |
1013 | &s3c_device_nand); | |
1014 | if (!npd) | |
1015 | return; | |
1016 | ||
1017 | /* now see if we need to copy any of the nand set data */ | |
1018 | ||
1019 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | |
1020 | if (size) { | |
1021 | struct s3c2410_nand_set *from = npd->sets; | |
1022 | struct s3c2410_nand_set *to; | |
1023 | int i; | |
1024 | ||
1025 | to = kmemdup(from, size, GFP_KERNEL); | |
1026 | npd->sets = to; /* set, even if we failed */ | |
1027 | ||
1028 | if (!to) { | |
1029 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | |
1030 | return; | |
1031 | } | |
1032 | ||
1033 | for (i = 0; i < npd->nr_sets; i++) { | |
1034 | ret = s3c_nand_copy_set(to); | |
1035 | if (ret) { | |
1036 | printk(KERN_ERR "%s: failed to copy set %d\n", | |
1037 | __func__, i); | |
1038 | return; | |
1039 | } | |
1040 | to++; | |
1041 | } | |
1042 | } | |
1043 | } | |
1044 | #endif /* CONFIG_S3C_DEV_NAND */ | |
1045 | ||
1046 | /* ONENAND */ | |
1047 | ||
1048 | #ifdef CONFIG_S3C_DEV_ONENAND | |
1049 | static struct resource s3c_onenand_resources[] = { | |
e663cb76 KK |
1050 | [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), |
1051 | [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), | |
1052 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND), | |
bad1e6aa KK |
1053 | }; |
1054 | ||
1055 | struct platform_device s3c_device_onenand = { | |
1056 | .name = "samsung-onenand", | |
1057 | .id = 0, | |
1058 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | |
1059 | .resource = s3c_onenand_resources, | |
1060 | }; | |
1061 | #endif /* CONFIG_S3C_DEV_ONENAND */ | |
1062 | ||
0523ec3a KK |
1063 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 |
1064 | static struct resource s3c64xx_onenand1_resources[] = { | |
e663cb76 KK |
1065 | [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), |
1066 | [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), | |
1067 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), | |
0523ec3a KK |
1068 | }; |
1069 | ||
1070 | struct platform_device s3c64xx_device_onenand1 = { | |
1071 | .name = "samsung-onenand", | |
1072 | .id = 1, | |
1073 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | |
1074 | .resource = s3c64xx_onenand1_resources, | |
1075 | }; | |
1076 | ||
eff4c58d | 1077 | void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) |
0523ec3a KK |
1078 | { |
1079 | s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), | |
1080 | &s3c64xx_device_onenand1); | |
1081 | } | |
1082 | #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ | |
1083 | ||
57167149 KK |
1084 | #ifdef CONFIG_S5P_DEV_ONENAND |
1085 | static struct resource s5p_onenand_resources[] = { | |
e663cb76 KK |
1086 | [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K), |
1087 | [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K), | |
1088 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI), | |
57167149 KK |
1089 | }; |
1090 | ||
1091 | struct platform_device s5p_device_onenand = { | |
1092 | .name = "s5pc110-onenand", | |
1093 | .id = -1, | |
1094 | .num_resources = ARRAY_SIZE(s5p_onenand_resources), | |
1095 | .resource = s5p_onenand_resources, | |
1096 | }; | |
1097 | #endif /* CONFIG_S5P_DEV_ONENAND */ | |
1098 | ||
1099 | /* PMU */ | |
1100 | ||
1101 | #ifdef CONFIG_PLAT_S5P | |
e663cb76 KK |
1102 | static struct resource s5p_pmu_resource[] = { |
1103 | DEFINE_RES_IRQ(IRQ_PMU) | |
57167149 KK |
1104 | }; |
1105 | ||
6d259a25 | 1106 | static struct platform_device s5p_device_pmu = { |
57167149 KK |
1107 | .name = "arm-pmu", |
1108 | .id = ARM_PMU_DEVICE_CPU, | |
e663cb76 KK |
1109 | .num_resources = ARRAY_SIZE(s5p_pmu_resource), |
1110 | .resource = s5p_pmu_resource, | |
57167149 KK |
1111 | }; |
1112 | ||
1113 | static int __init s5p_pmu_init(void) | |
1114 | { | |
1115 | platform_device_register(&s5p_device_pmu); | |
1116 | return 0; | |
1117 | } | |
1118 | arch_initcall(s5p_pmu_init); | |
1119 | #endif /* CONFIG_PLAT_S5P */ | |
1120 | ||
bad1e6aa KK |
1121 | /* PWM Timer */ |
1122 | ||
1123 | #ifdef CONFIG_SAMSUNG_DEV_PWM | |
1124 | ||
1125 | #define TIMER_RESOURCE_SIZE (1) | |
1126 | ||
1127 | #define TIMER_RESOURCE(_tmr, _irq) \ | |
1128 | (struct resource [TIMER_RESOURCE_SIZE]) { \ | |
1129 | [0] = { \ | |
1130 | .start = _irq, \ | |
1131 | .end = _irq, \ | |
1132 | .flags = IORESOURCE_IRQ \ | |
1133 | } \ | |
1134 | } | |
1135 | ||
1136 | #define DEFINE_S3C_TIMER(_tmr_no, _irq) \ | |
1137 | .name = "s3c24xx-pwm", \ | |
1138 | .id = _tmr_no, \ | |
1139 | .num_resources = TIMER_RESOURCE_SIZE, \ | |
1140 | .resource = TIMER_RESOURCE(_tmr_no, _irq), \ | |
1141 | ||
1142 | /* | |
1143 | * since we already have an static mapping for the timer, | |
1144 | * we do not bother setting any IO resource for the base. | |
1145 | */ | |
1146 | ||
1147 | struct platform_device s3c_device_timer[] = { | |
1148 | [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) }, | |
1149 | [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) }, | |
1150 | [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) }, | |
1151 | [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) }, | |
1152 | [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) }, | |
1153 | }; | |
1154 | #endif /* CONFIG_SAMSUNG_DEV_PWM */ | |
1155 | ||
61c542bf KK |
1156 | /* RTC */ |
1157 | ||
1158 | #ifdef CONFIG_PLAT_S3C24XX | |
1159 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
1160 | [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), |
1161 | [1] = DEFINE_RES_IRQ(IRQ_RTC), | |
1162 | [2] = DEFINE_RES_IRQ(IRQ_TICK), | |
61c542bf KK |
1163 | }; |
1164 | ||
1165 | struct platform_device s3c_device_rtc = { | |
1166 | .name = "s3c2410-rtc", | |
1167 | .id = -1, | |
1168 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
1169 | .resource = s3c_rtc_resource, | |
1170 | }; | |
1171 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1172 | ||
bad1e6aa KK |
1173 | #ifdef CONFIG_S3C_DEV_RTC |
1174 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
1175 | [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), |
1176 | [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), | |
1177 | [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), | |
bad1e6aa KK |
1178 | }; |
1179 | ||
1180 | struct platform_device s3c_device_rtc = { | |
1181 | .name = "s3c64xx-rtc", | |
1182 | .id = -1, | |
1183 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
1184 | .resource = s3c_rtc_resource, | |
1185 | }; | |
1186 | #endif /* CONFIG_S3C_DEV_RTC */ | |
1187 | ||
61c542bf KK |
1188 | /* SDI */ |
1189 | ||
1190 | #ifdef CONFIG_PLAT_S3C24XX | |
1191 | static struct resource s3c_sdi_resource[] = { | |
e663cb76 KK |
1192 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), |
1193 | [1] = DEFINE_RES_IRQ(IRQ_SDI), | |
61c542bf KK |
1194 | }; |
1195 | ||
1196 | struct platform_device s3c_device_sdi = { | |
1197 | .name = "s3c2410-sdi", | |
1198 | .id = -1, | |
1199 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | |
1200 | .resource = s3c_sdi_resource, | |
1201 | }; | |
1202 | ||
1203 | void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | |
1204 | { | |
1205 | s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), | |
1206 | &s3c_device_sdi); | |
1207 | } | |
1208 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1209 | ||
1210 | /* SPI */ | |
1211 | ||
1212 | #ifdef CONFIG_PLAT_S3C24XX | |
1213 | static struct resource s3c_spi0_resource[] = { | |
e663cb76 KK |
1214 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), |
1215 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), | |
61c542bf KK |
1216 | }; |
1217 | ||
1218 | struct platform_device s3c_device_spi0 = { | |
1219 | .name = "s3c2410-spi", | |
1220 | .id = 0, | |
1221 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | |
1222 | .resource = s3c_spi0_resource, | |
1223 | .dev = { | |
1224 | .dma_mask = &samsung_device_dma_mask, | |
1225 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1226 | } | |
1227 | }; | |
1228 | ||
1229 | static struct resource s3c_spi1_resource[] = { | |
e663cb76 KK |
1230 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), |
1231 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), | |
61c542bf KK |
1232 | }; |
1233 | ||
1234 | struct platform_device s3c_device_spi1 = { | |
1235 | .name = "s3c2410-spi", | |
1236 | .id = 1, | |
1237 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | |
1238 | .resource = s3c_spi1_resource, | |
1239 | .dev = { | |
1240 | .dma_mask = &samsung_device_dma_mask, | |
1241 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1242 | } | |
1243 | }; | |
1244 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1245 | ||
1246 | /* Touchscreen */ | |
1247 | ||
1248 | #ifdef CONFIG_PLAT_S3C24XX | |
1249 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
1250 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
1251 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
61c542bf KK |
1252 | }; |
1253 | ||
1254 | struct platform_device s3c_device_ts = { | |
1255 | .name = "s3c2410-ts", | |
1256 | .id = -1, | |
1257 | .dev.parent = &s3c_device_adc.dev, | |
1258 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
1259 | .resource = s3c_ts_resource, | |
1260 | }; | |
1261 | ||
1262 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | |
1263 | { | |
1264 | s3c_set_platdata(hard_s3c2410ts_info, | |
1265 | sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); | |
1266 | } | |
1267 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1268 | ||
bad1e6aa KK |
1269 | #ifdef CONFIG_SAMSUNG_DEV_TS |
1270 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
1271 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
1272 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
bad1e6aa KK |
1273 | }; |
1274 | ||
1275 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { | |
1276 | .delay = 10000, | |
1277 | .presc = 49, | |
1278 | .oversampling_shift = 2, | |
1279 | }; | |
1280 | ||
1281 | struct platform_device s3c_device_ts = { | |
1282 | .name = "s3c64xx-ts", | |
1283 | .id = -1, | |
1284 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
1285 | .resource = s3c_ts_resource, | |
1286 | }; | |
1287 | ||
1288 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | |
1289 | { | |
1290 | if (!pd) | |
1291 | pd = &default_ts_data; | |
1292 | ||
1293 | s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), | |
1294 | &s3c_device_ts); | |
1295 | } | |
1296 | #endif /* CONFIG_SAMSUNG_DEV_TS */ | |
1297 | ||
57167149 KK |
1298 | /* TV */ |
1299 | ||
1300 | #ifdef CONFIG_S5P_DEV_TV | |
1301 | ||
1302 | static struct resource s5p_hdmi_resources[] = { | |
e663cb76 KK |
1303 | [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M), |
1304 | [1] = DEFINE_RES_IRQ(IRQ_HDMI), | |
57167149 KK |
1305 | }; |
1306 | ||
1307 | struct platform_device s5p_device_hdmi = { | |
1308 | .name = "s5p-hdmi", | |
1309 | .id = -1, | |
1310 | .num_resources = ARRAY_SIZE(s5p_hdmi_resources), | |
1311 | .resource = s5p_hdmi_resources, | |
1312 | }; | |
1313 | ||
1314 | static struct resource s5p_sdo_resources[] = { | |
e663cb76 KK |
1315 | [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K), |
1316 | [1] = DEFINE_RES_IRQ(IRQ_SDO), | |
57167149 KK |
1317 | }; |
1318 | ||
1319 | struct platform_device s5p_device_sdo = { | |
1320 | .name = "s5p-sdo", | |
1321 | .id = -1, | |
1322 | .num_resources = ARRAY_SIZE(s5p_sdo_resources), | |
1323 | .resource = s5p_sdo_resources, | |
1324 | }; | |
1325 | ||
1326 | static struct resource s5p_mixer_resources[] = { | |
e663cb76 KK |
1327 | [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"), |
1328 | [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"), | |
1329 | [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"), | |
57167149 KK |
1330 | }; |
1331 | ||
1332 | struct platform_device s5p_device_mixer = { | |
1333 | .name = "s5p-mixer", | |
1334 | .id = -1, | |
1335 | .num_resources = ARRAY_SIZE(s5p_mixer_resources), | |
1336 | .resource = s5p_mixer_resources, | |
1337 | .dev = { | |
1338 | .dma_mask = &samsung_device_dma_mask, | |
1339 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1340 | } | |
1341 | }; | |
1342 | #endif /* CONFIG_S5P_DEV_TV */ | |
1343 | ||
bad1e6aa KK |
1344 | /* USB */ |
1345 | ||
1346 | #ifdef CONFIG_S3C_DEV_USB_HOST | |
1347 | static struct resource s3c_usb_resource[] = { | |
e663cb76 KK |
1348 | [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), |
1349 | [1] = DEFINE_RES_IRQ(IRQ_USBH), | |
bad1e6aa KK |
1350 | }; |
1351 | ||
1352 | struct platform_device s3c_device_ohci = { | |
1353 | .name = "s3c2410-ohci", | |
1354 | .id = -1, | |
1355 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | |
1356 | .resource = s3c_usb_resource, | |
1357 | .dev = { | |
1358 | .dma_mask = &samsung_device_dma_mask, | |
1359 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1360 | } | |
1361 | }; | |
1362 | ||
1363 | /* | |
1364 | * s3c_ohci_set_platdata - initialise OHCI device platform data | |
1365 | * @info: The platform data. | |
1366 | * | |
1367 | * This call copies the @info passed in and sets the device .platform_data | |
1368 | * field to that copy. The @info is copied so that the original can be marked | |
1369 | * __initdata. | |
1370 | */ | |
1371 | ||
1372 | void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | |
1373 | { | |
1374 | s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), | |
1375 | &s3c_device_ohci); | |
1376 | } | |
1377 | #endif /* CONFIG_S3C_DEV_USB_HOST */ | |
1378 | ||
61c542bf KK |
1379 | /* USB Device (Gadget) */ |
1380 | ||
1381 | #ifdef CONFIG_PLAT_S3C24XX | |
1382 | static struct resource s3c_usbgadget_resource[] = { | |
e663cb76 KK |
1383 | [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), |
1384 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1385 | }; |
1386 | ||
1387 | struct platform_device s3c_device_usbgadget = { | |
1388 | .name = "s3c2410-usbgadget", | |
1389 | .id = -1, | |
1390 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | |
1391 | .resource = s3c_usbgadget_resource, | |
1392 | }; | |
1393 | ||
1394 | void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |
1395 | { | |
1396 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); | |
1397 | } | |
1398 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1399 | ||
57167149 KK |
1400 | /* USB EHCI Host Controller */ |
1401 | ||
1402 | #ifdef CONFIG_S5P_DEV_USB_EHCI | |
1403 | static struct resource s5p_ehci_resource[] = { | |
e663cb76 KK |
1404 | [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256), |
1405 | [1] = DEFINE_RES_IRQ(IRQ_USB_HOST), | |
57167149 KK |
1406 | }; |
1407 | ||
1408 | struct platform_device s5p_device_ehci = { | |
1409 | .name = "s5p-ehci", | |
1410 | .id = -1, | |
1411 | .num_resources = ARRAY_SIZE(s5p_ehci_resource), | |
1412 | .resource = s5p_ehci_resource, | |
1413 | .dev = { | |
1414 | .dma_mask = &samsung_device_dma_mask, | |
1415 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1416 | } | |
1417 | }; | |
1418 | ||
1419 | void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd) | |
1420 | { | |
1421 | struct s5p_ehci_platdata *npd; | |
1422 | ||
1423 | npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata), | |
1424 | &s5p_device_ehci); | |
1425 | ||
1426 | if (!npd->phy_init) | |
1427 | npd->phy_init = s5p_usb_phy_init; | |
1428 | if (!npd->phy_exit) | |
1429 | npd->phy_exit = s5p_usb_phy_exit; | |
1430 | } | |
1431 | #endif /* CONFIG_S5P_DEV_USB_EHCI */ | |
1432 | ||
bad1e6aa KK |
1433 | /* USB HSOTG */ |
1434 | ||
1435 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | |
1436 | static struct resource s3c_usb_hsotg_resources[] = { | |
c65d8ef2 | 1437 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), |
e663cb76 | 1438 | [1] = DEFINE_RES_IRQ(IRQ_OTG), |
bad1e6aa KK |
1439 | }; |
1440 | ||
1441 | struct platform_device s3c_device_usb_hsotg = { | |
1442 | .name = "s3c-hsotg", | |
1443 | .id = -1, | |
1444 | .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), | |
1445 | .resource = s3c_usb_hsotg_resources, | |
1446 | .dev = { | |
1447 | .dma_mask = &samsung_device_dma_mask, | |
1448 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1449 | }, | |
1450 | }; | |
99f6e1f5 JS |
1451 | |
1452 | void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd) | |
1453 | { | |
1454 | struct s3c_hsotg_plat *npd; | |
1455 | ||
1456 | npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat), | |
1457 | &s3c_device_usb_hsotg); | |
1458 | ||
1459 | if (!npd->phy_init) | |
1460 | npd->phy_init = s5p_usb_phy_init; | |
1461 | if (!npd->phy_exit) | |
1462 | npd->phy_exit = s5p_usb_phy_exit; | |
1463 | } | |
bad1e6aa KK |
1464 | #endif /* CONFIG_S3C_DEV_USB_HSOTG */ |
1465 | ||
61c542bf KK |
1466 | /* USB High Spped 2.0 Device (Gadget) */ |
1467 | ||
1468 | #ifdef CONFIG_PLAT_S3C24XX | |
1469 | static struct resource s3c_hsudc_resource[] = { | |
e663cb76 KK |
1470 | [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), |
1471 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1472 | }; |
1473 | ||
1474 | struct platform_device s3c_device_usb_hsudc = { | |
1475 | .name = "s3c-hsudc", | |
1476 | .id = -1, | |
1477 | .num_resources = ARRAY_SIZE(s3c_hsudc_resource), | |
1478 | .resource = s3c_hsudc_resource, | |
1479 | .dev = { | |
1480 | .dma_mask = &samsung_device_dma_mask, | |
1481 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1482 | }, | |
1483 | }; | |
1484 | ||
1485 | void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | |
1486 | { | |
1487 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); | |
1488 | } | |
1489 | #endif /* CONFIG_PLAT_S3C24XX */ | |
bad1e6aa KK |
1490 | |
1491 | /* WDT */ | |
1492 | ||
1493 | #ifdef CONFIG_S3C_DEV_WDT | |
1494 | static struct resource s3c_wdt_resource[] = { | |
e663cb76 KK |
1495 | [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), |
1496 | [1] = DEFINE_RES_IRQ(IRQ_WDT), | |
bad1e6aa KK |
1497 | }; |
1498 | ||
1499 | struct platform_device s3c_device_wdt = { | |
1500 | .name = "s3c2410-wdt", | |
1501 | .id = -1, | |
1502 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | |
1503 | .resource = s3c_wdt_resource, | |
1504 | }; | |
1505 | #endif /* CONFIG_S3C_DEV_WDT */ | |
875a5937 PV |
1506 | |
1507 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | |
1508 | static struct resource s3c64xx_spi0_resource[] = { | |
1509 | [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), | |
1510 | [1] = DEFINE_RES_DMA(DMACH_SPI0_TX), | |
1511 | [2] = DEFINE_RES_DMA(DMACH_SPI0_RX), | |
1512 | [3] = DEFINE_RES_IRQ(IRQ_SPI0), | |
1513 | }; | |
1514 | ||
1515 | struct platform_device s3c64xx_device_spi0 = { | |
4d0efdd5 | 1516 | .name = "s3c6410-spi", |
875a5937 PV |
1517 | .id = 0, |
1518 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | |
1519 | .resource = s3c64xx_spi0_resource, | |
1520 | .dev = { | |
1521 | .dma_mask = &samsung_device_dma_mask, | |
1522 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1523 | }, | |
1524 | }; | |
1525 | ||
4d0efdd5 TA |
1526 | void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1527 | int num_cs) | |
875a5937 | 1528 | { |
4d0efdd5 | 1529 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1530 | |
1531 | /* Reject invalid configuration */ | |
1532 | if (!num_cs || src_clk_nr < 0) { | |
1533 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1534 | return; | |
1535 | } | |
1536 | ||
4d0efdd5 TA |
1537 | pd.num_cs = num_cs; |
1538 | pd.src_clk_nr = src_clk_nr; | |
1539 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; | |
4566c7f7 | 1540 | |
4d0efdd5 | 1541 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); |
875a5937 PV |
1542 | } |
1543 | #endif /* CONFIG_S3C64XX_DEV_SPI0 */ | |
1544 | ||
1545 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | |
1546 | static struct resource s3c64xx_spi1_resource[] = { | |
1547 | [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), | |
1548 | [1] = DEFINE_RES_DMA(DMACH_SPI1_TX), | |
1549 | [2] = DEFINE_RES_DMA(DMACH_SPI1_RX), | |
1550 | [3] = DEFINE_RES_IRQ(IRQ_SPI1), | |
1551 | }; | |
1552 | ||
1553 | struct platform_device s3c64xx_device_spi1 = { | |
4d0efdd5 | 1554 | .name = "s3c6410-spi", |
875a5937 PV |
1555 | .id = 1, |
1556 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | |
1557 | .resource = s3c64xx_spi1_resource, | |
1558 | .dev = { | |
1559 | .dma_mask = &samsung_device_dma_mask, | |
1560 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1561 | }, | |
1562 | }; | |
1563 | ||
4d0efdd5 TA |
1564 | void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1565 | int num_cs) | |
875a5937 | 1566 | { |
875a5937 PV |
1567 | /* Reject invalid configuration */ |
1568 | if (!num_cs || src_clk_nr < 0) { | |
1569 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1570 | return; | |
1571 | } | |
1572 | ||
4d0efdd5 TA |
1573 | pd.num_cs = num_cs; |
1574 | pd.src_clk_nr = src_clk_nr; | |
1575 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; | |
4566c7f7 | 1576 | |
4d0efdd5 | 1577 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); |
875a5937 PV |
1578 | } |
1579 | #endif /* CONFIG_S3C64XX_DEV_SPI1 */ | |
1580 | ||
1581 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | |
1582 | static struct resource s3c64xx_spi2_resource[] = { | |
1583 | [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), | |
1584 | [1] = DEFINE_RES_DMA(DMACH_SPI2_TX), | |
1585 | [2] = DEFINE_RES_DMA(DMACH_SPI2_RX), | |
1586 | [3] = DEFINE_RES_IRQ(IRQ_SPI2), | |
1587 | }; | |
1588 | ||
1589 | struct platform_device s3c64xx_device_spi2 = { | |
4d0efdd5 | 1590 | .name = "s3c6410-spi", |
875a5937 PV |
1591 | .id = 2, |
1592 | .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), | |
1593 | .resource = s3c64xx_spi2_resource, | |
1594 | .dev = { | |
1595 | .dma_mask = &samsung_device_dma_mask, | |
1596 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1597 | }, | |
1598 | }; | |
1599 | ||
4d0efdd5 TA |
1600 | void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1601 | int num_cs) | |
875a5937 | 1602 | { |
4d0efdd5 | 1603 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1604 | |
1605 | /* Reject invalid configuration */ | |
1606 | if (!num_cs || src_clk_nr < 0) { | |
1607 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1608 | return; | |
1609 | } | |
1610 | ||
4d0efdd5 TA |
1611 | pd.num_cs = num_cs; |
1612 | pd.src_clk_nr = src_clk_nr; | |
1613 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; | |
323d7717 | 1614 | |
4d0efdd5 | 1615 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); |
875a5937 PV |
1616 | } |
1617 | #endif /* CONFIG_S3C64XX_DEV_SPI2 */ |