[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-s3c24xx / gpiolib.c

/* linux/arch/arm/plat-s3c24xx/gpiolib.c
 *
 * Copyright (c) 2008 Simtec Electronics
 *	http://armlinux.simtec.co.uk/
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * S3C24XX GPIOlib support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
*/

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/gpio.h>

#include <plat/gpio-core.h>
#include <mach/hardware.h>
#include <asm/irq.h>

#include <mach/regs-gpio.h>

static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
{
	return -EINVAL;
}

static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
					unsigned offset, int value)
{
	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
	void __iomem *base = ourchip->base;
	unsigned long flags;
	unsigned long dat;
	unsigned long con;

	local_irq_save(flags);

	con = __raw_readl(base + 0x00);
	dat = __raw_readl(base + 0x04);

	dat &= ~(1 << offset);
	if (value)
		dat |= 1 << offset;

	__raw_writel(dat, base + 0x04);

	con &= ~(1 << offset);

	__raw_writel(con, base + 0x00);
	__raw_writel(dat, base + 0x04);

	local_irq_restore(flags);
	return 0;
}

struct s3c_gpio_chip s3c24xx_gpios[] = {
	[0] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPA0),
		.chip	= {
			.base			= S3C2410_GPA0,
			.owner			= THIS_MODULE,
			.label			= "GPIOA",
			.ngpio			= 24,
			.direction_input	= s3c24xx_gpiolib_banka_input,
			.direction_output	= s3c24xx_gpiolib_banka_output,
		},
	},
	[1] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPB0),
		.chip	= {
			.base			= S3C2410_GPB0,
			.owner			= THIS_MODULE,
			.label			= "GPIOB",
			.ngpio			= 16,
		},
	},
	[2] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPC0),
		.chip	= {
			.base			= S3C2410_GPC0,
			.owner			= THIS_MODULE,
			.label			= "GPIOC",
			.ngpio			= 16,
		},
	},
	[3] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPD0),
		.chip	= {
			.base			= S3C2410_GPD0,
			.owner			= THIS_MODULE,
			.label			= "GPIOD",
			.ngpio			= 16,
		},
	},
	[4] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPE0),
		.chip	= {
			.base			= S3C2410_GPE0,
			.label			= "GPIOE",
			.owner			= THIS_MODULE,
			.ngpio			= 16,
		},
	},
	[5] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPF0),
		.chip	= {
			.base			= S3C2410_GPF0,
			.owner			= THIS_MODULE,
			.label			= "GPIOF",
			.ngpio			= 8,
		},
	},
	[6] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPG0),
		.chip	= {
			.base			= S3C2410_GPG0,
			.owner			= THIS_MODULE,
			.label			= "GPIOG",
			.ngpio			= 10,
		},
	},
};

static __init int s3c24xx_gpiolib_init(void)
{
	struct s3c_gpio_chip *chip = s3c24xx_gpios;
	int gpn;

	for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++)
		s3c_gpiolib_add(chip);

	return 0;
}

arch_initcall(s3c24xx_gpiolib_init);
Commit	Line	Data
f348a2a2 BD	1	/* linux/arch/arm/plat-s3c24xx/gpiolib.c
	2	*
	3	* Copyright (c) 2008 Simtec Electronics
	4	* http://armlinux.simtec.co.uk/
	5	* Ben Dooks <ben@simtec.co.uk>
	6	*
	7	* S3C24XX GPIOlib support
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
	16	#include <linux/module.h>
	17	#include <linux/interrupt.h>
	18	#include <linux/ioport.h>
	19	#include <linux/io.h>
	20	#include <linux/gpio.h>
	21
7db6c82a	22	#include <plat/gpio-core.h>
a09e64fb	23	#include <mach/hardware.h>
f348a2a2 BD	24	#include <asm/irq.h>
f348a2a2 BD	25
a09e64fb	26	#include <mach/regs-gpio.h>
f348a2a2	27
f348a2a2 BD	28	static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
	29	{
	30	return -EINVAL;
	31	}
	32
	33	static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
	34	unsigned offset, int value)
	35	{
7db6c82a	36	struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
f348a2a2 BD	37	void __iomem *base = ourchip->base;
	38	unsigned long flags;
	39	unsigned long dat;
	40	unsigned long con;
	41
	42	local_irq_save(flags);
	43
	44	con = __raw_readl(base + 0x00);
	45	dat = __raw_readl(base + 0x04);
	46
	47	dat &= ~(1 << offset);
	48	if (value)
	49	dat \|= 1 << offset;
	50
	51	__raw_writel(dat, base + 0x04);
	52
	53	con &= ~(1 << offset);
	54
	55	__raw_writel(con, base + 0x00);
	56	__raw_writel(dat, base + 0x04);
	57
	58	local_irq_restore(flags);
	59	return 0;
	60	}
	61
21b23664	62	struct s3c_gpio_chip s3c24xx_gpios[] = {
f348a2a2 BD	63	[0] = {
	64	.base = S3C24XX_GPIO_BASE(S3C2410_GPA0),
	65	.chip = {
	66	.base = S3C2410_GPA0,
	67	.owner = THIS_MODULE,
	68	.label = "GPIOA",
	69	.ngpio = 24,
	70	.direction_input = s3c24xx_gpiolib_banka_input,
	71	.direction_output = s3c24xx_gpiolib_banka_output,
f348a2a2 BD	72	},
	73	},
	74	[1] = {
	75	.base = S3C24XX_GPIO_BASE(S3C2410_GPB0),
	76	.chip = {
	77	.base = S3C2410_GPB0,
	78	.owner = THIS_MODULE,
	79	.label = "GPIOB",
	80	.ngpio = 16,
f348a2a2 BD	81	},
	82	},
	83	[2] = {
	84	.base = S3C24XX_GPIO_BASE(S3C2410_GPC0),
	85	.chip = {
	86	.base = S3C2410_GPC0,
	87	.owner = THIS_MODULE,
	88	.label = "GPIOC",
	89	.ngpio = 16,
f348a2a2 BD	90	},
	91	},
	92	[3] = {
	93	.base = S3C24XX_GPIO_BASE(S3C2410_GPD0),
	94	.chip = {
	95	.base = S3C2410_GPD0,
	96	.owner = THIS_MODULE,
	97	.label = "GPIOD",
	98	.ngpio = 16,
f348a2a2 BD	99	},
	100	},
	101	[4] = {
	102	.base = S3C24XX_GPIO_BASE(S3C2410_GPE0),
	103	.chip = {
	104	.base = S3C2410_GPE0,
	105	.label = "GPIOE",
	106	.owner = THIS_MODULE,
	107	.ngpio = 16,
f348a2a2 BD	108	},
	109	},
	110	[5] = {
	111	.base = S3C24XX_GPIO_BASE(S3C2410_GPF0),
	112	.chip = {
	113	.base = S3C2410_GPF0,
	114	.owner = THIS_MODULE,
	115	.label = "GPIOF",
	116	.ngpio = 8,
f348a2a2 BD	117	},
	118	},
	119	[6] = {
	120	.base = S3C24XX_GPIO_BASE(S3C2410_GPG0),
	121	.chip = {
	122	.base = S3C2410_GPG0,
	123	.owner = THIS_MODULE,
	124	.label = "GPIOG",
	125	.ngpio = 10,
f348a2a2 BD	126	},
	127	},
	128	};
	129
	130	static __init int s3c24xx_gpiolib_init(void)
	131	{
21b23664	132	struct s3c_gpio_chip *chip = s3c24xx_gpios;
f348a2a2 BD	133	int gpn;
f348a2a2 BD	134
21b23664	135	for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++)
7db6c82a	136	s3c_gpiolib_add(chip);
f348a2a2 BD	137
	138	return 0;
	139	}
	140
	141	arch_initcall(s3c24xx_gpiolib_init);