[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-omap / include / plat / display.h

/*
 * linux/include/asm-arm/arch-omap/display.h
 *
 * Copyright (C) 2008 Nokia Corporation
 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __ASM_ARCH_OMAP_DISPLAY_H
#define __ASM_ARCH_OMAP_DISPLAY_H

#include <linux/list.h>
#include <linux/kobject.h>
#include <linux/device.h>
#include <asm/atomic.h>

#define DISPC_IRQ_FRAMEDONE		(1 << 0)
#define DISPC_IRQ_VSYNC			(1 << 1)
#define DISPC_IRQ_EVSYNC_EVEN		(1 << 2)
#define DISPC_IRQ_EVSYNC_ODD		(1 << 3)
#define DISPC_IRQ_ACBIAS_COUNT_STAT	(1 << 4)
#define DISPC_IRQ_PROG_LINE_NUM		(1 << 5)
#define DISPC_IRQ_GFX_FIFO_UNDERFLOW	(1 << 6)
#define DISPC_IRQ_GFX_END_WIN		(1 << 7)
#define DISPC_IRQ_PAL_GAMMA_MASK	(1 << 8)
#define DISPC_IRQ_OCP_ERR		(1 << 9)
#define DISPC_IRQ_VID1_FIFO_UNDERFLOW	(1 << 10)
#define DISPC_IRQ_VID1_END_WIN		(1 << 11)
#define DISPC_IRQ_VID2_FIFO_UNDERFLOW	(1 << 12)
#define DISPC_IRQ_VID2_END_WIN		(1 << 13)
#define DISPC_IRQ_SYNC_LOST		(1 << 14)
#define DISPC_IRQ_SYNC_LOST_DIGIT	(1 << 15)
#define DISPC_IRQ_WAKEUP		(1 << 16)

struct omap_dss_device;
struct omap_overlay_manager;

enum omap_display_type {
	OMAP_DISPLAY_TYPE_NONE		= 0,
	OMAP_DISPLAY_TYPE_DPI		= 1 << 0,
	OMAP_DISPLAY_TYPE_DBI		= 1 << 1,
	OMAP_DISPLAY_TYPE_SDI		= 1 << 2,
	OMAP_DISPLAY_TYPE_DSI		= 1 << 3,
	OMAP_DISPLAY_TYPE_VENC		= 1 << 4,
};

enum omap_plane {
	OMAP_DSS_GFX	= 0,
	OMAP_DSS_VIDEO1	= 1,
	OMAP_DSS_VIDEO2	= 2
};

enum omap_channel {
	OMAP_DSS_CHANNEL_LCD	= 0,
	OMAP_DSS_CHANNEL_DIGIT	= 1,
	OMAP_DSS_CHANNEL_LCD2	= 2,
};

enum omap_color_mode {
	OMAP_DSS_COLOR_CLUT1	= 1 << 0,  /* BITMAP 1 */
	OMAP_DSS_COLOR_CLUT2	= 1 << 1,  /* BITMAP 2 */
	OMAP_DSS_COLOR_CLUT4	= 1 << 2,  /* BITMAP 4 */
	OMAP_DSS_COLOR_CLUT8	= 1 << 3,  /* BITMAP 8 */
	OMAP_DSS_COLOR_RGB12U	= 1 << 4,  /* RGB12, 16-bit container */
	OMAP_DSS_COLOR_ARGB16	= 1 << 5,  /* ARGB16 */
	OMAP_DSS_COLOR_RGB16	= 1 << 6,  /* RGB16 */
	OMAP_DSS_COLOR_RGB24U	= 1 << 7,  /* RGB24, 32-bit container */
	OMAP_DSS_COLOR_RGB24P	= 1 << 8,  /* RGB24, 24-bit container */
	OMAP_DSS_COLOR_YUV2	= 1 << 9,  /* YUV2 4:2:2 co-sited */
	OMAP_DSS_COLOR_UYVY	= 1 << 10, /* UYVY 4:2:2 co-sited */
	OMAP_DSS_COLOR_ARGB32	= 1 << 11, /* ARGB32 */
	OMAP_DSS_COLOR_RGBA32	= 1 << 12, /* RGBA32 */
	OMAP_DSS_COLOR_RGBX32	= 1 << 13, /* RGBx32 */
};

enum omap_lcd_display_type {
	OMAP_DSS_LCD_DISPLAY_STN,
	OMAP_DSS_LCD_DISPLAY_TFT,
};

enum omap_dss_load_mode {
	OMAP_DSS_LOAD_CLUT_AND_FRAME	= 0,
	OMAP_DSS_LOAD_CLUT_ONLY		= 1,
	OMAP_DSS_LOAD_FRAME_ONLY	= 2,
	OMAP_DSS_LOAD_CLUT_ONCE_FRAME	= 3,
};

enum omap_dss_trans_key_type {
	OMAP_DSS_COLOR_KEY_GFX_DST = 0,
	OMAP_DSS_COLOR_KEY_VID_SRC = 1,
};

enum omap_rfbi_te_mode {
	OMAP_DSS_RFBI_TE_MODE_1 = 1,
	OMAP_DSS_RFBI_TE_MODE_2 = 2,
};

enum omap_panel_config {
	OMAP_DSS_LCD_IVS		= 1<<0,
	OMAP_DSS_LCD_IHS		= 1<<1,
	OMAP_DSS_LCD_IPC		= 1<<2,
	OMAP_DSS_LCD_IEO		= 1<<3,
	OMAP_DSS_LCD_RF			= 1<<4,
	OMAP_DSS_LCD_ONOFF		= 1<<5,

	OMAP_DSS_LCD_TFT		= 1<<20,
};

enum omap_dss_venc_type {
	OMAP_DSS_VENC_TYPE_COMPOSITE,
	OMAP_DSS_VENC_TYPE_SVIDEO,
};

enum omap_display_caps {
	OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE	= 1 << 0,
	OMAP_DSS_DISPLAY_CAP_TEAR_ELIM		= 1 << 1,
};

enum omap_dss_update_mode {
	OMAP_DSS_UPDATE_DISABLED = 0,
	OMAP_DSS_UPDATE_AUTO,
	OMAP_DSS_UPDATE_MANUAL,
};

enum omap_dss_display_state {
	OMAP_DSS_DISPLAY_DISABLED = 0,
	OMAP_DSS_DISPLAY_ACTIVE,
	OMAP_DSS_DISPLAY_SUSPENDED,
};

/* XXX perhaps this should be removed */
enum omap_dss_overlay_managers {
	OMAP_DSS_OVL_MGR_LCD,
	OMAP_DSS_OVL_MGR_TV,
	OMAP_DSS_OVL_MGR_LCD2,
};

enum omap_dss_rotation_type {
	OMAP_DSS_ROT_DMA = 0,
	OMAP_DSS_ROT_VRFB = 1,
};

/* clockwise rotation angle */
enum omap_dss_rotation_angle {
	OMAP_DSS_ROT_0   = 0,
	OMAP_DSS_ROT_90  = 1,
	OMAP_DSS_ROT_180 = 2,
	OMAP_DSS_ROT_270 = 3,
};

enum omap_overlay_caps {
	OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
	OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
};

enum omap_overlay_manager_caps {
	OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
};

/* RFBI */

struct rfbi_timings {
	int cs_on_time;
	int cs_off_time;
	int we_on_time;
	int we_off_time;
	int re_on_time;
	int re_off_time;
	int we_cycle_time;
	int re_cycle_time;
	int cs_pulse_width;
	int access_time;

	int clk_div;

	u32 tim[5];             /* set by rfbi_convert_timings() */

	int converted;
};

void omap_rfbi_write_command(const void *buf, u32 len);
void omap_rfbi_read_data(void *buf, u32 len);
void omap_rfbi_write_data(const void *buf, u32 len);
void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
		u16 x, u16 y,
		u16 w, u16 h);
int omap_rfbi_enable_te(bool enable, unsigned line);
int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
			     unsigned hs_pulse_time, unsigned vs_pulse_time,
			     int hs_pol_inv, int vs_pol_inv, int extif_div);

/* DSI */
void dsi_bus_lock(void);
void dsi_bus_unlock(void);
int dsi_vc_dcs_write(int channel, u8 *data, int len);
int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
int dsi_vc_send_null(int channel);
int dsi_vc_send_bta_sync(int channel);

/* Board specific data */
struct omap_dss_board_info {
	int (*get_last_off_on_transaction_id)(struct device *dev);
	int num_devices;
	struct omap_dss_device **devices;
	struct omap_dss_device *default_device;
};

struct omap_video_timings {
	/* Unit: pixels */
	u16 x_res;
	/* Unit: pixels */
	u16 y_res;
	/* Unit: KHz */
	u32 pixel_clock;
	/* Unit: pixel clocks */
	u16 hsw;	/* Horizontal synchronization pulse width */
	/* Unit: pixel clocks */
	u16 hfp;	/* Horizontal front porch */
	/* Unit: pixel clocks */
	u16 hbp;	/* Horizontal back porch */
	/* Unit: line clocks */
	u16 vsw;	/* Vertical synchronization pulse width */
	/* Unit: line clocks */
	u16 vfp;	/* Vertical front porch */
	/* Unit: line clocks */
	u16 vbp;	/* Vertical back porch */
};

#ifdef CONFIG_OMAP2_DSS_VENC
/* Hardcoded timings for tv modes. Venc only uses these to
 * identify the mode, and does not actually use the configs
 * itself. However, the configs should be something that
 * a normal monitor can also show */
extern const struct omap_video_timings omap_dss_pal_timings;
extern const struct omap_video_timings omap_dss_ntsc_timings;
#endif

struct omap_overlay_info {
	bool enabled;

	u32 paddr;
	void __iomem *vaddr;
	u16 screen_width;
	u16 width;
	u16 height;
	enum omap_color_mode color_mode;
	u8 rotation;
	enum omap_dss_rotation_type rotation_type;
	bool mirror;

	u16 pos_x;
	u16 pos_y;
	u16 out_width;	/* if 0, out_width == width */
	u16 out_height;	/* if 0, out_height == height */
	u8 global_alpha;
	u8 pre_mult_alpha;
};

struct omap_overlay {
	struct kobject kobj;
	struct list_head list;

	/* static fields */
	const char *name;
	int id;
	enum omap_color_mode supported_modes;
	enum omap_overlay_caps caps;

	/* dynamic fields */
	struct omap_overlay_manager *manager;
	struct omap_overlay_info info;

	/* if true, info has been changed, but not applied() yet */
	bool info_dirty;

	int (*set_manager)(struct omap_overlay *ovl,
		struct omap_overlay_manager *mgr);
	int (*unset_manager)(struct omap_overlay *ovl);

	int (*set_overlay_info)(struct omap_overlay *ovl,
			struct omap_overlay_info *info);
	void (*get_overlay_info)(struct omap_overlay *ovl,
			struct omap_overlay_info *info);

	int (*wait_for_go)(struct omap_overlay *ovl);
};

struct omap_overlay_manager_info {
	u32 default_color;

	enum omap_dss_trans_key_type trans_key_type;
	u32 trans_key;
	bool trans_enabled;

	bool alpha_enabled;
};

struct omap_overlay_manager {
	struct kobject kobj;
	struct list_head list;

	/* static fields */
	const char *name;
	int id;
	enum omap_overlay_manager_caps caps;
	int num_overlays;
	struct omap_overlay **overlays;
	enum omap_display_type supported_displays;

	/* dynamic fields */
	struct omap_dss_device *device;
	struct omap_overlay_manager_info info;

	bool device_changed;
	/* if true, info has been changed but not applied() yet */
	bool info_dirty;

	int (*set_device)(struct omap_overlay_manager *mgr,
		struct omap_dss_device *dssdev);
	int (*unset_device)(struct omap_overlay_manager *mgr);

	int (*set_manager_info)(struct omap_overlay_manager *mgr,
			struct omap_overlay_manager_info *info);
	void (*get_manager_info)(struct omap_overlay_manager *mgr,
			struct omap_overlay_manager_info *info);

	int (*apply)(struct omap_overlay_manager *mgr);
	int (*wait_for_go)(struct omap_overlay_manager *mgr);
	int (*wait_for_vsync)(struct omap_overlay_manager *mgr);

	int (*enable)(struct omap_overlay_manager *mgr);
	int (*disable)(struct omap_overlay_manager *mgr);
};

struct omap_dss_device {
	struct device dev;

	enum omap_display_type type;

	union {
		struct {
			u8 data_lines;
		} dpi;

		struct {
			u8 channel;
			u8 data_lines;
		} rfbi;

		struct {
			u8 datapairs;
		} sdi;

		struct {
			u8 clk_lane;
			u8 clk_pol;
			u8 data1_lane;
			u8 data1_pol;
			u8 data2_lane;
			u8 data2_pol;

			struct {
				u16 regn;
				u16 regm;
				u16 regm3;
				u16 regm4;

				u16 lp_clk_div;

				u16 lck_div;
				u16 pck_div;
			} div;

			bool ext_te;
			u8 ext_te_gpio;
		} dsi;

		struct {
			enum omap_dss_venc_type type;
			bool invert_polarity;
		} venc;
	} phy;

	struct {
		struct omap_video_timings timings;

		int acbi;	/* ac-bias pin transitions per interrupt */
		/* Unit: line clocks */
		int acb;	/* ac-bias pin frequency */

		enum omap_panel_config config;
	} panel;

	struct {
		u8 pixel_size;
		struct rfbi_timings rfbi_timings;
	} ctrl;

	int reset_gpio;

	int max_backlight_level;

	const char *name;

	/* used to match device to driver */
	const char *driver_name;

	void *data;

	struct omap_dss_driver *driver;

	/* helper variable for driver suspend/resume */
	bool activate_after_resume;

	enum omap_display_caps caps;

	struct omap_overlay_manager *manager;

	enum omap_dss_display_state state;

	/* platform specific  */
	int (*platform_enable)(struct omap_dss_device *dssdev);
	void (*platform_disable)(struct omap_dss_device *dssdev);
	int (*set_backlight)(struct omap_dss_device *dssdev, int level);
	int (*get_backlight)(struct omap_dss_device *dssdev);
};

struct omap_dss_driver {
	struct device_driver driver;

	int (*probe)(struct omap_dss_device *);
	void (*remove)(struct omap_dss_device *);

	int (*enable)(struct omap_dss_device *display);
	void (*disable)(struct omap_dss_device *display);
	int (*suspend)(struct omap_dss_device *display);
	int (*resume)(struct omap_dss_device *display);
	int (*run_test)(struct omap_dss_device *display, int test);

	int (*set_update_mode)(struct omap_dss_device *dssdev,
			enum omap_dss_update_mode);
	enum omap_dss_update_mode (*get_update_mode)(
			struct omap_dss_device *dssdev);

	int (*update)(struct omap_dss_device *dssdev,
			       u16 x, u16 y, u16 w, u16 h);
	int (*sync)(struct omap_dss_device *dssdev);

	int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
	int (*get_te)(struct omap_dss_device *dssdev);

	u8 (*get_rotate)(struct omap_dss_device *dssdev);
	int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);

	bool (*get_mirror)(struct omap_dss_device *dssdev);
	int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);

	int (*memory_read)(struct omap_dss_device *dssdev,
			void *buf, size_t size,
			u16 x, u16 y, u16 w, u16 h);

	void (*get_resolution)(struct omap_dss_device *dssdev,
			u16 *xres, u16 *yres);
	int (*get_recommended_bpp)(struct omap_dss_device *dssdev);

	int (*check_timings)(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);
	void (*set_timings)(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);
	void (*get_timings)(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);

	int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
	u32 (*get_wss)(struct omap_dss_device *dssdev);
};

int omap_dss_register_driver(struct omap_dss_driver *);
void omap_dss_unregister_driver(struct omap_dss_driver *);

int omap_dss_register_device(struct omap_dss_device *);
void omap_dss_unregister_device(struct omap_dss_device *);

void omap_dss_get_device(struct omap_dss_device *dssdev);
void omap_dss_put_device(struct omap_dss_device *dssdev);
#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
struct omap_dss_device *omap_dss_find_device(void *data,
		int (*match)(struct omap_dss_device *dssdev, void *data));

int omap_dss_start_device(struct omap_dss_device *dssdev);
void omap_dss_stop_device(struct omap_dss_device *dssdev);

int omap_dss_get_num_overlay_managers(void);
struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);

int omap_dss_get_num_overlays(void);
struct omap_overlay *omap_dss_get_overlay(int num);

void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
		u16 *xres, u16 *yres);
int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);

typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);

int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
		unsigned long timeout);

#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)

void omapdss_dsi_vc_enable_hs(int channel, bool enable);
int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);

int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
				    u16 *x, u16 *y, u16 *w, u16 *h,
				    bool enlarge_update_area);
int omap_dsi_update(struct omap_dss_device *dssdev,
		int channel,
		u16 x, u16 y, u16 w, u16 h,
		void (*callback)(int, void *), void *data);

int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);

int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
void dpi_set_timings(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);
int dpi_check_timings(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);

int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);

int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
		u16 *x, u16 *y, u16 *w, u16 *h);
int omap_rfbi_update(struct omap_dss_device *dssdev,
		u16 x, u16 y, u16 w, u16 h,
		void (*callback)(void *), void *data);

#endif
Commit	Line	Data
559d6701 TV	1	/*
	2	* linux/include/asm-arm/arch-omap/display.h
	3	*
	4	* Copyright (C) 2008 Nokia Corporation
	5	* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published by
	9	* the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but WITHOUT
	12	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	14	* more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along with
	17	* this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#ifndef __ASM_ARCH_OMAP_DISPLAY_H
	21	#define __ASM_ARCH_OMAP_DISPLAY_H
	22
	23	#include <linux/list.h>
	24	#include <linux/kobject.h>
	25	#include <linux/device.h>
	26	#include <asm/atomic.h>
	27
	28	#define DISPC_IRQ_FRAMEDONE (1 << 0)
	29	#define DISPC_IRQ_VSYNC (1 << 1)
	30	#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
	31	#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
	32	#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
	33	#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
	34	#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
	35	#define DISPC_IRQ_GFX_END_WIN (1 << 7)
	36	#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
	37	#define DISPC_IRQ_OCP_ERR (1 << 9)
	38	#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
	39	#define DISPC_IRQ_VID1_END_WIN (1 << 11)
	40	#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
	41	#define DISPC_IRQ_VID2_END_WIN (1 << 13)
	42	#define DISPC_IRQ_SYNC_LOST (1 << 14)
	43	#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
	44	#define DISPC_IRQ_WAKEUP (1 << 16)
	45
	46	struct omap_dss_device;
	47	struct omap_overlay_manager;
	48
	49	enum omap_display_type {
	50	OMAP_DISPLAY_TYPE_NONE = 0,
	51	OMAP_DISPLAY_TYPE_DPI = 1 << 0,
	52	OMAP_DISPLAY_TYPE_DBI = 1 << 1,
	53	OMAP_DISPLAY_TYPE_SDI = 1 << 2,
	54	OMAP_DISPLAY_TYPE_DSI = 1 << 3,
	55	OMAP_DISPLAY_TYPE_VENC = 1 << 4,
	56	};
	57
	58	enum omap_plane {
	59	OMAP_DSS_GFX = 0,
	60	OMAP_DSS_VIDEO1 = 1,
	61	OMAP_DSS_VIDEO2 = 2
	62	};
	63
	64	enum omap_channel {
65	OMAP_DSS_CHANNEL_LCD = 0,
66	OMAP_DSS_CHANNEL_DIGIT = 1,
8613b000	67	OMAP_DSS_CHANNEL_LCD2 = 2,
559d6701 TV	68	};
	69
	70	enum omap_color_mode {
	71	OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
	72	OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
	73	OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
	74	OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
	75	OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
	76	OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
	77	OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
	78	OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
	79	OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
	80	OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
	81	OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
	82	OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
	83	OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
	84	OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
559d6701 TV	85	};
	86
	87	enum omap_lcd_display_type {
	88	OMAP_DSS_LCD_DISPLAY_STN,
	89	OMAP_DSS_LCD_DISPLAY_TFT,
	90	};
	91
	92	enum omap_dss_load_mode {
	93	OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
	94	OMAP_DSS_LOAD_CLUT_ONLY = 1,
	95	OMAP_DSS_LOAD_FRAME_ONLY = 2,
	96	OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
	97	};
	98
	99	enum omap_dss_trans_key_type {
	100	OMAP_DSS_COLOR_KEY_GFX_DST = 0,
	101	OMAP_DSS_COLOR_KEY_VID_SRC = 1,
	102	};
	103
	104	enum omap_rfbi_te_mode {
	105	OMAP_DSS_RFBI_TE_MODE_1 = 1,
	106	OMAP_DSS_RFBI_TE_MODE_2 = 2,
	107	};
	108
	109	enum omap_panel_config {
	110	OMAP_DSS_LCD_IVS = 1<<0,
	111	OMAP_DSS_LCD_IHS = 1<<1,
	112	OMAP_DSS_LCD_IPC = 1<<2,
	113	OMAP_DSS_LCD_IEO = 1<<3,
	114	OMAP_DSS_LCD_RF = 1<<4,
	115	OMAP_DSS_LCD_ONOFF = 1<<5,
	116
	117	OMAP_DSS_LCD_TFT = 1<<20,
	118	};
	119
	120	enum omap_dss_venc_type {
	121	OMAP_DSS_VENC_TYPE_COMPOSITE,
	122	OMAP_DSS_VENC_TYPE_SVIDEO,
	123	};
	124
	125	enum omap_display_caps {
	126	OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
	127	OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
	128	};
	129
	130	enum omap_dss_update_mode {
	131	OMAP_DSS_UPDATE_DISABLED = 0,
	132	OMAP_DSS_UPDATE_AUTO,
	133	OMAP_DSS_UPDATE_MANUAL,
	134	};
	135
	136	enum omap_dss_display_state {
	137	OMAP_DSS_DISPLAY_DISABLED = 0,
	138	OMAP_DSS_DISPLAY_ACTIVE,
	139	OMAP_DSS_DISPLAY_SUSPENDED,
	140	};
	141
	142	/* XXX perhaps this should be removed */
	143	enum omap_dss_overlay_managers {
	144	OMAP_DSS_OVL_MGR_LCD,
	145	OMAP_DSS_OVL_MGR_TV,
8613b000	146	OMAP_DSS_OVL_MGR_LCD2,
559d6701 TV	147	};
	148
	149	enum omap_dss_rotation_type {
	150	OMAP_DSS_ROT_DMA = 0,
	151	OMAP_DSS_ROT_VRFB = 1,
	152	};
	153
	154	/* clockwise rotation angle */
	155	enum omap_dss_rotation_angle {
	156	OMAP_DSS_ROT_0 = 0,
	157	OMAP_DSS_ROT_90 = 1,
	158	OMAP_DSS_ROT_180 = 2,
	159	OMAP_DSS_ROT_270 = 3,
	160	};
	161
	162	enum omap_overlay_caps {
	163	OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
	164	OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
	165	};
	166
	167	enum omap_overlay_manager_caps {
	168	OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
	169	};
	170
	171	/* RFBI */
	172
	173	struct rfbi_timings {
	174	int cs_on_time;
	175	int cs_off_time;
	176	int we_on_time;
	177	int we_off_time;
	178	int re_on_time;
	179	int re_off_time;
	180	int we_cycle_time;
	181	int re_cycle_time;
	182	int cs_pulse_width;
	183	int access_time;
	184
	185	int clk_div;
	186
	187	u32 tim[5]; /* set by rfbi_convert_timings() */
	188
	189	int converted;
	190	};
	191
	192	void omap_rfbi_write_command(const void *buf, u32 len);
	193	void omap_rfbi_read_data(void *buf, u32 len);
	194	void omap_rfbi_write_data(const void *buf, u32 len);
	195	void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
	196	u16 x, u16 y,
	197	u16 w, u16 h);
	198	int omap_rfbi_enable_te(bool enable, unsigned line);
	199	int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
	200	unsigned hs_pulse_time, unsigned vs_pulse_time,
	201	int hs_pol_inv, int vs_pol_inv, int extif_div);
	202
	203	/* DSI */
	204	void dsi_bus_lock(void);
	205	void dsi_bus_unlock(void);
	206	int dsi_vc_dcs_write(int channel, u8 *data, int len);
828c48f8 TV	207	int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
828c48f8 TV	208	int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
559d6701 TV	209	int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
559d6701 TV	210	int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
828c48f8	211	int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
0c244f77	212	int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 data1, u8 data2);
559d6701 TV	213	int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
	214	int dsi_vc_send_null(int channel);
	215	int dsi_vc_send_bta_sync(int channel);
	216
	217	/* Board specific data */
	218	struct omap_dss_board_info {
	219	int (get_last_off_on_transaction_id)(struct device dev);
	220	int num_devices;
	221	struct omap_dss_device **devices;
	222	struct omap_dss_device *default_device;
	223	};
	224
	225	struct omap_video_timings {
	226	/* Unit: pixels */
	227	u16 x_res;
	228	/* Unit: pixels */
	229	u16 y_res;
	230	/* Unit: KHz */
	231	u32 pixel_clock;
	232	/* Unit: pixel clocks */
	233	u16 hsw; /* Horizontal synchronization pulse width */
	234	/* Unit: pixel clocks */
	235	u16 hfp; /* Horizontal front porch */
	236	/* Unit: pixel clocks */
	237	u16 hbp; /* Horizontal back porch */
	238	/* Unit: line clocks */
	239	u16 vsw; /* Vertical synchronization pulse width */
	240	/* Unit: line clocks */
	241	u16 vfp; /* Vertical front porch */
	242	/* Unit: line clocks */
	243	u16 vbp; /* Vertical back porch */
	244	};
	245
	246	#ifdef CONFIG_OMAP2_DSS_VENC
	247	/* Hardcoded timings for tv modes. Venc only uses these to
	248	* identify the mode, and does not actually use the configs
	249	* itself. However, the configs should be something that
	250	* a normal monitor can also show */
5a1819e3 TK	251	extern const struct omap_video_timings omap_dss_pal_timings;
5a1819e3 TK	252	extern const struct omap_video_timings omap_dss_ntsc_timings;
559d6701 TV	253	#endif
	254
	255	struct omap_overlay_info {
	256	bool enabled;
	257
	258	u32 paddr;
	259	void __iomem *vaddr;
	260	u16 screen_width;
	261	u16 width;
	262	u16 height;
	263	enum omap_color_mode color_mode;
	264	u8 rotation;
	265	enum omap_dss_rotation_type rotation_type;
	266	bool mirror;
	267
	268	u16 pos_x;
	269	u16 pos_y;
	270	u16 out_width; /* if 0, out_width == width */
	271	u16 out_height; /* if 0, out_height == height */
	272	u8 global_alpha;
fd28a390	273	u8 pre_mult_alpha;
559d6701 TV	274	};
	275
	276	struct omap_overlay {
	277	struct kobject kobj;
	278	struct list_head list;
	279
	280	/* static fields */
	281	const char *name;
	282	int id;
	283	enum omap_color_mode supported_modes;
	284	enum omap_overlay_caps caps;
	285
	286	/* dynamic fields */
	287	struct omap_overlay_manager *manager;
	288	struct omap_overlay_info info;
	289
	290	/* if true, info has been changed, but not applied() yet */
	291	bool info_dirty;
	292
	293	int (set_manager)(struct omap_overlay ovl,
	294	struct omap_overlay_manager *mgr);
	295	int (unset_manager)(struct omap_overlay ovl);
	296
	297	int (set_overlay_info)(struct omap_overlay ovl,
	298	struct omap_overlay_info *info);
	299	void (get_overlay_info)(struct omap_overlay ovl,
	300	struct omap_overlay_info *info);
	301
	302	int (wait_for_go)(struct omap_overlay ovl);
	303	};
	304
	305	struct omap_overlay_manager_info {
	306	u32 default_color;
	307
	308	enum omap_dss_trans_key_type trans_key_type;
	309	u32 trans_key;
	310	bool trans_enabled;
	311
	312	bool alpha_enabled;
	313	};
	314
	315	struct omap_overlay_manager {
	316	struct kobject kobj;
	317	struct list_head list;
	318
	319	/* static fields */
	320	const char *name;
	321	int id;
	322	enum omap_overlay_manager_caps caps;
	323	int num_overlays;
	324	struct omap_overlay **overlays;
	325	enum omap_display_type supported_displays;
	326
	327	/* dynamic fields */
	328	struct omap_dss_device *device;
	329	struct omap_overlay_manager_info info;
	330
	331	bool device_changed;
	332	/* if true, info has been changed but not applied() yet */
	333	bool info_dirty;
	334
	335	int (set_device)(struct omap_overlay_manager mgr,
	336	struct omap_dss_device *dssdev);
	337	int (unset_device)(struct omap_overlay_manager mgr);
338
339	int (set_manager_info)(struct omap_overlay_manager mgr,
340	struct omap_overlay_manager_info *info);
341	void (get_manager_info)(struct omap_overlay_manager mgr,
342	struct omap_overlay_manager_info *info);
343
344	int (apply)(struct omap_overlay_manager mgr);
345	int (wait_for_go)(struct omap_overlay_manager mgr);
3f71cbe7	346	int (wait_for_vsync)(struct omap_overlay_manager mgr);
a2faee84 TV	347
	348	int (enable)(struct omap_overlay_manager mgr);
	349	int (disable)(struct omap_overlay_manager mgr);
559d6701 TV	350	};
	351
	352	struct omap_dss_device {
	353	struct device dev;
	354
	355	enum omap_display_type type;
	356
	357	union {
	358	struct {
	359	u8 data_lines;
	360	} dpi;
	361
	362	struct {
	363	u8 channel;
	364	u8 data_lines;
	365	} rfbi;
	366
	367	struct {
	368	u8 datapairs;
	369	} sdi;
	370
	371	struct {
	372	u8 clk_lane;
	373	u8 clk_pol;
	374	u8 data1_lane;
	375	u8 data1_pol;
	376	u8 data2_lane;
	377	u8 data2_pol;
	378
	379	struct {
	380	u16 regn;
	381	u16 regm;
	382	u16 regm3;
	383	u16 regm4;
	384
	385	u16 lp_clk_div;
	386
	387	u16 lck_div;
	388	u16 pck_div;
	389	} div;
	390
	391	bool ext_te;
	392	u8 ext_te_gpio;
	393	} dsi;
	394
	395	struct {
	396	enum omap_dss_venc_type type;
	397	bool invert_polarity;
	398	} venc;
	399	} phy;
	400
	401	struct {
	402	struct omap_video_timings timings;
	403
	404	int acbi; /* ac-bias pin transitions per interrupt */
	405	/* Unit: line clocks */
	406	int acb; /* ac-bias pin frequency */
	407
	408	enum omap_panel_config config;
559d6701 TV	409	} panel;
	410
	411	struct {
	412	u8 pixel_size;
	413	struct rfbi_timings rfbi_timings;
559d6701 TV	414	} ctrl;
	415
	416	int reset_gpio;
	417
	418	int max_backlight_level;
	419
	420	const char *name;
	421
	422	/* used to match device to driver */
	423	const char *driver_name;
	424
	425	void *data;
	426
	427	struct omap_dss_driver *driver;
	428
	429	/* helper variable for driver suspend/resume */
	430	bool activate_after_resume;
	431
	432	enum omap_display_caps caps;
	433
	434	struct omap_overlay_manager *manager;
	435
	436	enum omap_dss_display_state state;
	437
559d6701 TV	438	/* platform specific */
	439	int (platform_enable)(struct omap_dss_device dssdev);
	440	void (platform_disable)(struct omap_dss_device dssdev);
	441	int (set_backlight)(struct omap_dss_device dssdev, int level);
	442	int (get_backlight)(struct omap_dss_device dssdev);
	443	};
	444
	445	struct omap_dss_driver {
	446	struct device_driver driver;
	447
	448	int (probe)(struct omap_dss_device );
	449	void (remove)(struct omap_dss_device );
	450
	451	int (enable)(struct omap_dss_device display);
	452	void (disable)(struct omap_dss_device display);
	453	int (suspend)(struct omap_dss_device display);
	454	int (resume)(struct omap_dss_device display);
	455	int (run_test)(struct omap_dss_device display, int test);
	456
446f7bff TV	457	int (set_update_mode)(struct omap_dss_device dssdev,
	458	enum omap_dss_update_mode);
	459	enum omap_dss_update_mode (*get_update_mode)(
	460	struct omap_dss_device *dssdev);
559d6701	461
18946f62 TV	462	int (update)(struct omap_dss_device dssdev,
	463	u16 x, u16 y, u16 w, u16 h);
	464	int (sync)(struct omap_dss_device dssdev);
	465
559d6701	466	int (enable_te)(struct omap_dss_device dssdev, bool enable);
225b650d	467	int (get_te)(struct omap_dss_device dssdev);
559d6701 TV	468
	469	u8 (get_rotate)(struct omap_dss_device dssdev);
	470	int (set_rotate)(struct omap_dss_device dssdev, u8 rotate);
	471
	472	bool (get_mirror)(struct omap_dss_device dssdev);
	473	int (set_mirror)(struct omap_dss_device dssdev, bool enable);
	474
	475	int (memory_read)(struct omap_dss_device dssdev,
	476	void *buf, size_t size,
	477	u16 x, u16 y, u16 w, u16 h);
96adcece TV	478
	479	void (get_resolution)(struct omap_dss_device dssdev,
	480	u16 xres, u16 yres);
a2699504	481	int (get_recommended_bpp)(struct omap_dss_device dssdev);
36511312	482
69b2048f TV	483	int (check_timings)(struct omap_dss_device dssdev,
	484	struct omap_video_timings *timings);
	485	void (set_timings)(struct omap_dss_device dssdev,
	486	struct omap_video_timings *timings);
	487	void (get_timings)(struct omap_dss_device dssdev,
	488	struct omap_video_timings *timings);
	489
36511312 TV	490	int (set_wss)(struct omap_dss_device dssdev, u32 wss);
36511312 TV	491	u32 (get_wss)(struct omap_dss_device dssdev);
559d6701 TV	492	};
	493
	494	int omap_dss_register_driver(struct omap_dss_driver *);
	495	void omap_dss_unregister_driver(struct omap_dss_driver *);
	496
	497	int omap_dss_register_device(struct omap_dss_device *);
	498	void omap_dss_unregister_device(struct omap_dss_device *);
	499
	500	void omap_dss_get_device(struct omap_dss_device *dssdev);
	501	void omap_dss_put_device(struct omap_dss_device *dssdev);
	502	#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
	503	struct omap_dss_device omap_dss_get_next_device(struct omap_dss_device from);
	504	struct omap_dss_device omap_dss_find_device(void data,
	505	int (match)(struct omap_dss_device dssdev, void *data));
	506
	507	int omap_dss_start_device(struct omap_dss_device *dssdev);
	508	void omap_dss_stop_device(struct omap_dss_device *dssdev);
	509
	510	int omap_dss_get_num_overlay_managers(void);
	511	struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
	512
	513	int omap_dss_get_num_overlays(void);
	514	struct omap_overlay *omap_dss_get_overlay(int num);
	515
96adcece TV	516	void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
96adcece TV	517	u16 xres, u16 yres);
a2699504 TV	518	int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
a2699504 TV	519
559d6701 TV	520	typedef void (omap_dispc_isr_t) (void arg, u32 mask);
	521	int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
	522	int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
	523
	524	int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
	525	int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
	526	unsigned long timeout);
	527
	528	#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
	529	#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
	530
61140c9a	531	void omapdss_dsi_vc_enable_hs(int channel, bool enable);
225b650d	532	int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
61140c9a	533
18946f62	534	int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
26a8c250 TV	535	u16 x, u16 y, u16 w, u16 h,
26a8c250 TV	536	bool enlarge_update_area);
18946f62 TV	537	int omap_dsi_update(struct omap_dss_device *dssdev,
	538	int channel,
	539	u16 x, u16 y, u16 w, u16 h,
	540	void (callback)(int, void ), void *data);
	541
37ac60e4 TV	542	int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
	543	void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
	544
	545	int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
	546	void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
69b2048f TV	547	void dpi_set_timings(struct omap_dss_device *dssdev,
	548	struct omap_video_timings *timings);
	549	int dpi_check_timings(struct omap_dss_device *dssdev,
	550	struct omap_video_timings *timings);
37ac60e4 TV	551
	552	int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
	553	void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
	554
	555	int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
	556	void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
18946f62 TV	557	int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
	558	u16 x, u16 y, u16 w, u16 h);
	559	int omap_rfbi_update(struct omap_dss_device *dssdev,
	560	u16 x, u16 y, u16 w, u16 h,
	561	void (callback)(void ), void *data);
	562
559d6701	563	#endif