[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-nomadik / gpio.c

/*
 * Generic GPIO driver for logic cells found in the Nomadik SoC
 *
 * Copyright (C) 2008,2009 STMicroelectronics
 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
 *   Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/irq.h>

#include <mach/hardware.h>
#include <mach/gpio.h>

/*
 * The GPIO module in the Nomadik family of Systems-on-Chip is an
 * AMBA device, managing 32 pins and alternate functions.  The logic block
 * is currently only used in the Nomadik.
 *
 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
 */

#define NMK_GPIO_PER_CHIP 32
struct nmk_gpio_chip {
	struct gpio_chip chip;
	void __iomem *addr;
	unsigned int parent_irq;
	spinlock_t lock;
	/* Keep track of configured edges */
	u32 edge_rising;
	u32 edge_falling;
};

/* Mode functions */
int nmk_gpio_set_mode(int gpio, int gpio_mode)
{
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 afunc, bfunc, bit;

	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	if (!nmk_chip)
		return -EINVAL;

	bit = 1 << (gpio - nmk_chip->chip.base);

	spin_lock_irqsave(&nmk_chip->lock, flags);
	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
	if (gpio_mode & NMK_GPIO_ALT_A)
		afunc |= bit;
	if (gpio_mode & NMK_GPIO_ALT_B)
		bfunc |= bit;
	writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
	writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
	spin_unlock_irqrestore(&nmk_chip->lock, flags);

	return 0;
}
EXPORT_SYMBOL(nmk_gpio_set_mode);

int nmk_gpio_get_mode(int gpio)
{
	struct nmk_gpio_chip *nmk_chip;
	u32 afunc, bfunc, bit;

	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	if (!nmk_chip)
		return -EINVAL;

	bit = 1 << (gpio - nmk_chip->chip.base);

	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;

	return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
}
EXPORT_SYMBOL(nmk_gpio_get_mode);


/* IRQ functions */
static inline int nmk_gpio_get_bitmask(int gpio)
{
	return 1 << (gpio % 32);
}

static void nmk_gpio_irq_ack(unsigned int irq)
{
	int gpio;
	struct nmk_gpio_chip *nmk_chip;

	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	nmk_chip = get_irq_chip_data(irq);
	if (!nmk_chip)
		return;
	writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
}

static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
				  int gpio, bool enable)
{
	u32 bitmask = nmk_gpio_get_bitmask(gpio);
	u32 reg;

	/* we must individually set/clear the two edges */
	if (nmk_chip->edge_rising & bitmask) {
		reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC);
		if (enable)
			reg |= bitmask;
		else
			reg &= ~bitmask;
		writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC);
	}
	if (nmk_chip->edge_falling & bitmask) {
		reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC);
		if (enable)
			reg |= bitmask;
		else
			reg &= ~bitmask;
		writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC);
	}
}

static void nmk_gpio_irq_modify(unsigned int irq, bool enable)
{
	int gpio;
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 bitmask;

	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	nmk_chip = get_irq_chip_data(irq);
	bitmask = nmk_gpio_get_bitmask(gpio);
	if (!nmk_chip)
		return;

	spin_lock_irqsave(&nmk_chip->lock, flags);
	__nmk_gpio_irq_modify(nmk_chip, gpio, enable);
	spin_unlock_irqrestore(&nmk_chip->lock, flags);
}

static void nmk_gpio_irq_mask(unsigned int irq)
{
	nmk_gpio_irq_modify(irq, false);
};

static void nmk_gpio_irq_unmask(unsigned int irq)
{
	nmk_gpio_irq_modify(irq, true);
}

static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
{
	bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
	int gpio;
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 bitmask;

	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	nmk_chip = get_irq_chip_data(irq);
	bitmask = nmk_gpio_get_bitmask(gpio);
	if (!nmk_chip)
		return -EINVAL;

	if (type & IRQ_TYPE_LEVEL_HIGH)
		return -EINVAL;
	if (type & IRQ_TYPE_LEVEL_LOW)
		return -EINVAL;

	spin_lock_irqsave(&nmk_chip->lock, flags);

	if (enabled)
		__nmk_gpio_irq_modify(nmk_chip, gpio, false);

	nmk_chip->edge_rising &= ~bitmask;
	if (type & IRQ_TYPE_EDGE_RISING)
		nmk_chip->edge_rising |= bitmask;

	nmk_chip->edge_falling &= ~bitmask;
	if (type & IRQ_TYPE_EDGE_FALLING)
		nmk_chip->edge_falling |= bitmask;

	if (enabled)
		__nmk_gpio_irq_modify(nmk_chip, gpio, true);

	spin_unlock_irqrestore(&nmk_chip->lock, flags);

	return 0;
}

static struct irq_chip nmk_gpio_irq_chip = {
	.name		= "Nomadik-GPIO",
	.ack		= nmk_gpio_irq_ack,
	.mask		= nmk_gpio_irq_mask,
	.unmask		= nmk_gpio_irq_unmask,
	.set_type	= nmk_gpio_irq_set_type,
};

static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
{
	struct nmk_gpio_chip *nmk_chip;
	struct irq_chip *host_chip = get_irq_chip(irq);
	unsigned int gpio_irq;
	u32 pending;
	unsigned int first_irq;

	if (host_chip->mask_ack)
		host_chip->mask_ack(irq);
	else {
		host_chip->mask(irq);
		if (host_chip->ack)
			host_chip->ack(irq);
	}

	nmk_chip = get_irq_data(irq);
	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
		gpio_irq = first_irq + __ffs(pending);
		generic_handle_irq(gpio_irq);
	}

	host_chip->unmask(irq);
}

static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
{
	unsigned int first_irq;
	int i;

	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
		set_irq_chip(i, &nmk_gpio_irq_chip);
		set_irq_handler(i, handle_edge_irq);
		set_irq_flags(i, IRQF_VALID);
		set_irq_chip_data(i, nmk_chip);
		set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
	}
	set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
	set_irq_data(nmk_chip->parent_irq, nmk_chip);
	return 0;
}

/* I/O Functions */
static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
	return 0;
}

static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
				int val)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
	return 0;
}

static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);
	u32 bit = 1 << offset;

	return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
}

static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
				int val)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);
	u32 bit = 1 << offset;

	if (val)
		writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
	else
		writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
}

/* This structure is replicated for each GPIO block allocated at probe time */
static struct gpio_chip nmk_gpio_template = {
	.direction_input	= nmk_gpio_make_input,
	.get			= nmk_gpio_get_input,
	.direction_output	= nmk_gpio_make_output,
	.set			= nmk_gpio_set_output,
	.ngpio			= NMK_GPIO_PER_CHIP,
	.can_sleep		= 0,
};

static int __init nmk_gpio_probe(struct platform_device *dev)
{
	struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
	struct nmk_gpio_chip *nmk_chip;
	struct gpio_chip *chip;
	struct resource *res;
	int irq;
	int ret;

	if (!pdata)
		return -ENODEV;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!res) {
		ret = -ENOENT;
		goto out;
	}

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		ret = irq;
		goto out;
	}

	if (request_mem_region(res->start, resource_size(res),
			       dev_name(&dev->dev)) == NULL) {
		ret = -EBUSY;
		goto out;
	}

	nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
	if (!nmk_chip) {
		ret = -ENOMEM;
		goto out_release;
	}
	/*
	 * The virt address in nmk_chip->addr is in the nomadik register space,
	 * so we can simply convert the resource address, without remapping
	 */
	nmk_chip->addr = io_p2v(res->start);
	nmk_chip->chip = nmk_gpio_template;
	nmk_chip->parent_irq = irq;
	spin_lock_init(&nmk_chip->lock);

	chip = &nmk_chip->chip;
	chip->base = pdata->first_gpio;
	chip->label = pdata->name;
	chip->dev = &dev->dev;
	chip->owner = THIS_MODULE;

	ret = gpiochip_add(&nmk_chip->chip);
	if (ret)
		goto out_free;

	platform_set_drvdata(dev, nmk_chip);

	nmk_gpio_init_irq(nmk_chip);

	dev_info(&dev->dev, "Bits %i-%i at address %p\n",
		 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
	return 0;

out_free:
	kfree(nmk_chip);
out_release:
	release_mem_region(res->start, resource_size(res));
out:
	dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
		  pdata->first_gpio, pdata->first_gpio+31);
	return ret;
}

static int __exit nmk_gpio_remove(struct platform_device *dev)
{
	struct nmk_gpio_chip *nmk_chip;
	struct resource *res;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);

	nmk_chip = platform_get_drvdata(dev);
	gpiochip_remove(&nmk_chip->chip);
	kfree(nmk_chip);
	release_mem_region(res->start, resource_size(res));
	return 0;
}


static struct platform_driver nmk_gpio_driver = {
	.driver = {
		.owner = THIS_MODULE,
		.name = "gpio",
		},
	.probe = nmk_gpio_probe,
	.remove = __exit_p(nmk_gpio_remove),
	.suspend = NULL, /* to be done */
	.resume = NULL,
};

static int __init nmk_gpio_init(void)
{
	return platform_driver_register(&nmk_gpio_driver);
}

arch_initcall(nmk_gpio_init);

MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
MODULE_DESCRIPTION("Nomadik GPIO Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
2ec1d359 AR	1	/*
	2	* Generic GPIO driver for logic cells found in the Nomadik SoC
	3	*
	4	* Copyright (C) 2008,2009 STMicroelectronics
	5	* Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
	6	* Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12	#include <linux/kernel.h>
	13	#include <linux/module.h>
	14	#include <linux/init.h>
	15	#include <linux/device.h>
3e3c62ca	16	#include <linux/platform_device.h>
2ec1d359 AR	17	#include <linux/io.h>
	18	#include <linux/gpio.h>
	19	#include <linux/spinlock.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/irq.h>
	22
	23	#include <mach/hardware.h>
	24	#include <mach/gpio.h>
	25
	26	/*
	27	* The GPIO module in the Nomadik family of Systems-on-Chip is an
	28	* AMBA device, managing 32 pins and alternate functions. The logic block
	29	* is currently only used in the Nomadik.
	30	*
	31	* Symbols in this file are called "nmk_gpio" for "nomadik gpio"
	32	*/
	33
	34	#define NMK_GPIO_PER_CHIP 32
	35	struct nmk_gpio_chip {
	36	struct gpio_chip chip;
	37	void __iomem *addr;
	38	unsigned int parent_irq;
c0fcb8db	39	spinlock_t lock;
2ec1d359 AR	40	/* Keep track of configured edges */
	41	u32 edge_rising;
	42	u32 edge_falling;
	43	};
	44
	45	/* Mode functions */
	46	int nmk_gpio_set_mode(int gpio, int gpio_mode)
	47	{
	48	struct nmk_gpio_chip *nmk_chip;
	49	unsigned long flags;
	50	u32 afunc, bfunc, bit;
	51
	52	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	53	if (!nmk_chip)
	54	return -EINVAL;
	55
	56	bit = 1 << (gpio - nmk_chip->chip.base);
	57
	58	spin_lock_irqsave(&nmk_chip->lock, flags);
	59	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
	60	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
	61	if (gpio_mode & NMK_GPIO_ALT_A)
	62	afunc \|= bit;
	63	if (gpio_mode & NMK_GPIO_ALT_B)
	64	bfunc \|= bit;
	65	writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
	66	writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
	67	spin_unlock_irqrestore(&nmk_chip->lock, flags);
	68
	69	return 0;
	70	}
	71	EXPORT_SYMBOL(nmk_gpio_set_mode);
	72
	73	int nmk_gpio_get_mode(int gpio)
	74	{
	75	struct nmk_gpio_chip *nmk_chip;
	76	u32 afunc, bfunc, bit;
	77
	78	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	79	if (!nmk_chip)
	80	return -EINVAL;
	81
	82	bit = 1 << (gpio - nmk_chip->chip.base);
	83
	84	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
	85	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
	86
	87	return (afunc ? NMK_GPIO_ALT_A : 0) \| (bfunc ? NMK_GPIO_ALT_B : 0);
	88	}
	89	EXPORT_SYMBOL(nmk_gpio_get_mode);
	90
	91
	92	/* IRQ functions */
	93	static inline int nmk_gpio_get_bitmask(int gpio)
	94	{
	95	return 1 << (gpio % 32);
	96	}
	97
	98	static void nmk_gpio_irq_ack(unsigned int irq)
	99	{
	100	int gpio;
	101	struct nmk_gpio_chip *nmk_chip;
	102
	103	gpio = NOMADIK_IRQ_TO_GPIO(irq);
104	nmk_chip = get_irq_chip_data(irq);
105	if (!nmk_chip)
106	return;
107	writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
108	}
109
040e5ecd RV	110	static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
040e5ecd RV	111	int gpio, bool enable)
2ec1d359	112	{
040e5ecd RV	113	u32 bitmask = nmk_gpio_get_bitmask(gpio);
040e5ecd RV	114	u32 reg;
2ec1d359	115
040e5ecd	116	/* we must individually set/clear the two edges */
2ec1d359	117	if (nmk_chip->edge_rising & bitmask) {
6b07aaed	118	reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC);
040e5ecd RV	119	if (enable)
	120	reg \|= bitmask;
	121	else
	122	reg &= ~bitmask;
6b07aaed	123	writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC);
2ec1d359 AR	124	}
2ec1d359 AR	125	if (nmk_chip->edge_falling & bitmask) {
6b07aaed	126	reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC);
040e5ecd RV	127	if (enable)
	128	reg \|= bitmask;
	129	else
	130	reg &= ~bitmask;
6b07aaed	131	writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC);
2ec1d359	132	}
040e5ecd	133	}
2ec1d359	134
040e5ecd	135	static void nmk_gpio_irq_modify(unsigned int irq, bool enable)
2ec1d359 AR	136	{
	137	int gpio;
	138	struct nmk_gpio_chip *nmk_chip;
	139	unsigned long flags;
040e5ecd	140	u32 bitmask;
2ec1d359 AR	141
	142	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	143	nmk_chip = get_irq_chip_data(irq);
	144	bitmask = nmk_gpio_get_bitmask(gpio);
	145	if (!nmk_chip)
	146	return;
	147
2ec1d359	148	spin_lock_irqsave(&nmk_chip->lock, flags);
040e5ecd	149	__nmk_gpio_irq_modify(nmk_chip, gpio, enable);
2ec1d359 AR	150	spin_unlock_irqrestore(&nmk_chip->lock, flags);
	151	}
	152
040e5ecd RV	153	static void nmk_gpio_irq_mask(unsigned int irq)
	154	{
	155	nmk_gpio_irq_modify(irq, false);
	156	};
	157
	158	static void nmk_gpio_irq_unmask(unsigned int irq)
	159	{
	160	nmk_gpio_irq_modify(irq, true);
	161	}
	162
2ec1d359 AR	163	static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
2ec1d359 AR	164	{
7a852d80	165	bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
2ec1d359 AR	166	int gpio;
	167	struct nmk_gpio_chip *nmk_chip;
	168	unsigned long flags;
	169	u32 bitmask;
	170
	171	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	172	nmk_chip = get_irq_chip_data(irq);
	173	bitmask = nmk_gpio_get_bitmask(gpio);
	174	if (!nmk_chip)
	175	return -EINVAL;
	176
	177	if (type & IRQ_TYPE_LEVEL_HIGH)
	178	return -EINVAL;
	179	if (type & IRQ_TYPE_LEVEL_LOW)
	180	return -EINVAL;
	181
	182	spin_lock_irqsave(&nmk_chip->lock, flags);
	183
7a852d80 RV	184	if (enabled)
	185	__nmk_gpio_irq_modify(nmk_chip, gpio, false);
	186
2ec1d359 AR	187	nmk_chip->edge_rising &= ~bitmask;
	188	if (type & IRQ_TYPE_EDGE_RISING)
	189	nmk_chip->edge_rising \|= bitmask;
2ec1d359 AR	190
	191	nmk_chip->edge_falling &= ~bitmask;
	192	if (type & IRQ_TYPE_EDGE_FALLING)
	193	nmk_chip->edge_falling \|= bitmask;
2ec1d359	194
7a852d80 RV	195	if (enabled)
7a852d80 RV	196	__nmk_gpio_irq_modify(nmk_chip, gpio, true);
2ec1d359	197
7a852d80	198	spin_unlock_irqrestore(&nmk_chip->lock, flags);
2ec1d359 AR	199
	200	return 0;
	201	}
	202
	203	static struct irq_chip nmk_gpio_irq_chip = {
	204	.name = "Nomadik-GPIO",
	205	.ack = nmk_gpio_irq_ack,
	206	.mask = nmk_gpio_irq_mask,
	207	.unmask = nmk_gpio_irq_unmask,
	208	.set_type = nmk_gpio_irq_set_type,
	209	};
	210
	211	static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
	212	{
	213	struct nmk_gpio_chip *nmk_chip;
aaedaa2b	214	struct irq_chip *host_chip = get_irq_chip(irq);
2ec1d359 AR	215	unsigned int gpio_irq;
	216	u32 pending;
	217	unsigned int first_irq;
	218
aaedaa2b RV	219	if (host_chip->mask_ack)
	220	host_chip->mask_ack(irq);
	221	else {
	222	host_chip->mask(irq);
	223	if (host_chip->ack)
	224	host_chip->ack(irq);
	225	}
	226
2ec1d359 AR	227	nmk_chip = get_irq_data(irq);
	228	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	229	while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
	230	gpio_irq = first_irq + __ffs(pending);
	231	generic_handle_irq(gpio_irq);
	232	}
aaedaa2b RV	233
aaedaa2b RV	234	host_chip->unmask(irq);
2ec1d359 AR	235	}
	236
	237	static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
	238	{
	239	unsigned int first_irq;
	240	int i;
	241
	242	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	243	for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
	244	set_irq_chip(i, &nmk_gpio_irq_chip);
	245	set_irq_handler(i, handle_edge_irq);
	246	set_irq_flags(i, IRQF_VALID);
	247	set_irq_chip_data(i, nmk_chip);
2210d645	248	set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
2ec1d359 AR	249	}
	250	set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
	251	set_irq_data(nmk_chip->parent_irq, nmk_chip);
	252	return 0;
	253	}
	254
	255	/* I/O Functions */
	256	static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
	257	{
	258	struct nmk_gpio_chip *nmk_chip =
	259	container_of(chip, struct nmk_gpio_chip, chip);
	260
	261	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
	262	return 0;
	263	}
	264
	265	static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
	266	int val)
	267	{
	268	struct nmk_gpio_chip *nmk_chip =
	269	container_of(chip, struct nmk_gpio_chip, chip);
	270
	271	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
	272	return 0;
	273	}
	274
	275	static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
	276	{
	277	struct nmk_gpio_chip *nmk_chip =
	278	container_of(chip, struct nmk_gpio_chip, chip);
	279	u32 bit = 1 << offset;
	280
	281	return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
	282	}
	283
	284	static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
	285	int val)
	286	{
	287	struct nmk_gpio_chip *nmk_chip =
	288	container_of(chip, struct nmk_gpio_chip, chip);
	289	u32 bit = 1 << offset;
	290
	291	if (val)
	292	writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
	293	else
	294	writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
	295	}
	296
	297	/* This structure is replicated for each GPIO block allocated at probe time */
	298	static struct gpio_chip nmk_gpio_template = {
	299	.direction_input = nmk_gpio_make_input,
	300	.get = nmk_gpio_get_input,
	301	.direction_output = nmk_gpio_make_output,
	302	.set = nmk_gpio_set_output,
	303	.ngpio = NMK_GPIO_PER_CHIP,
	304	.can_sleep = 0,
	305	};
	306
3e3c62ca	307	static int __init nmk_gpio_probe(struct platform_device *dev)
2ec1d359	308	{
3e3c62ca	309	struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
2ec1d359 AR	310	struct nmk_gpio_chip *nmk_chip;
2ec1d359 AR	311	struct gpio_chip *chip;
3e3c62ca RV	312	struct resource *res;
3e3c62ca RV	313	int irq;
2ec1d359 AR	314	int ret;
2ec1d359 AR	315
3e3c62ca RV	316	if (!pdata)
	317	return -ENODEV;
	318
	319	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	320	if (!res) {
	321	ret = -ENOENT;
	322	goto out;
	323	}
	324
	325	irq = platform_get_irq(dev, 0);
	326	if (irq < 0) {
	327	ret = irq;
	328	goto out;
	329	}
	330
	331	if (request_mem_region(res->start, resource_size(res),
	332	dev_name(&dev->dev)) == NULL) {
	333	ret = -EBUSY;
	334	goto out;
	335	}
2ec1d359 AR	336
	337	nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
	338	if (!nmk_chip) {
	339	ret = -ENOMEM;
3e3c62ca	340	goto out_release;
2ec1d359 AR	341	}
	342	/*
	343	* The virt address in nmk_chip->addr is in the nomadik register space,
	344	* so we can simply convert the resource address, without remapping
	345	*/
3e3c62ca	346	nmk_chip->addr = io_p2v(res->start);
2ec1d359	347	nmk_chip->chip = nmk_gpio_template;
3e3c62ca	348	nmk_chip->parent_irq = irq;
c0fcb8db	349	spin_lock_init(&nmk_chip->lock);
2ec1d359 AR	350
	351	chip = &nmk_chip->chip;
	352	chip->base = pdata->first_gpio;
	353	chip->label = pdata->name;
	354	chip->dev = &dev->dev;
	355	chip->owner = THIS_MODULE;
	356
	357	ret = gpiochip_add(&nmk_chip->chip);
	358	if (ret)
	359	goto out_free;
	360
3e3c62ca	361	platform_set_drvdata(dev, nmk_chip);
2ec1d359 AR	362
	363	nmk_gpio_init_irq(nmk_chip);
	364
	365	dev_info(&dev->dev, "Bits %i-%i at address %p\n",
	366	nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
	367	return 0;
	368
3e3c62ca	369	out_free:
2ec1d359	370	kfree(nmk_chip);
3e3c62ca RV	371	out_release:
	372	release_mem_region(res->start, resource_size(res));
	373	out:
2ec1d359 AR	374	dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
	375	pdata->first_gpio, pdata->first_gpio+31);
	376	return ret;
	377	}
	378
3e3c62ca	379	static int __exit nmk_gpio_remove(struct platform_device *dev)
2ec1d359 AR	380	{
2ec1d359 AR	381	struct nmk_gpio_chip *nmk_chip;
3e3c62ca RV	382	struct resource *res;
	383
	384	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
2ec1d359	385
3e3c62ca	386	nmk_chip = platform_get_drvdata(dev);
2ec1d359 AR	387	gpiochip_remove(&nmk_chip->chip);
2ec1d359 AR	388	kfree(nmk_chip);
3e3c62ca	389	release_mem_region(res->start, resource_size(res));
2ec1d359 AR	390	return 0;
	391	}
	392
	393
3e3c62ca RV	394	static struct platform_driver nmk_gpio_driver = {
3e3c62ca RV	395	.driver = {
2ec1d359 AR	396	.owner = THIS_MODULE,
	397	.name = "gpio",
	398	},
	399	.probe = nmk_gpio_probe,
3e3c62ca	400	.remove = __exit_p(nmk_gpio_remove),
2ec1d359 AR	401	.suspend = NULL, /* to be done */
2ec1d359 AR	402	.resume = NULL,
2ec1d359 AR	403	};
	404
	405	static int __init nmk_gpio_init(void)
	406	{
3e3c62ca	407	return platform_driver_register(&nmk_gpio_driver);
2ec1d359 AR	408	}
	409
	410	arch_initcall(nmk_gpio_init);
	411
	412	MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
	413	MODULE_DESCRIPTION("Nomadik GPIO Driver");
	414	MODULE_LICENSE("GPL");
	415
	416