[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / arch / arm / plat-nomadik / gpio.c

/*
 * Generic GPIO driver for logic cells found in the Nomadik SoC
 *
 * Copyright (C) 2008,2009 STMicroelectronics
 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
 *   Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/slab.h>

#include <mach/hardware.h>
#include <mach/gpio.h>

/*
 * The GPIO module in the Nomadik family of Systems-on-Chip is an
 * AMBA device, managing 32 pins and alternate functions.  The logic block
 * is currently only used in the Nomadik.
 *
 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
 */

#define NMK_GPIO_PER_CHIP 32
struct nmk_gpio_chip {
	struct gpio_chip chip;
	void __iomem *addr;
	struct clk *clk;
	unsigned int parent_irq;
	spinlock_t lock;
	/* Keep track of configured edges */
	u32 edge_rising;
	u32 edge_falling;
};

/* Mode functions */
int nmk_gpio_set_mode(int gpio, int gpio_mode)
{
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 afunc, bfunc, bit;

	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	if (!nmk_chip)
		return -EINVAL;

	bit = 1 << (gpio - nmk_chip->chip.base);

	spin_lock_irqsave(&nmk_chip->lock, flags);
	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
	if (gpio_mode & NMK_GPIO_ALT_A)
		afunc |= bit;
	if (gpio_mode & NMK_GPIO_ALT_B)
		bfunc |= bit;
	writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
	writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
	spin_unlock_irqrestore(&nmk_chip->lock, flags);

	return 0;
}
EXPORT_SYMBOL(nmk_gpio_set_mode);

int nmk_gpio_get_mode(int gpio)
{
	struct nmk_gpio_chip *nmk_chip;
	u32 afunc, bfunc, bit;

	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	if (!nmk_chip)
		return -EINVAL;

	bit = 1 << (gpio - nmk_chip->chip.base);

	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;

	return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
}
EXPORT_SYMBOL(nmk_gpio_get_mode);


/* IRQ functions */
static inline int nmk_gpio_get_bitmask(int gpio)
{
	return 1 << (gpio % 32);
}

static void nmk_gpio_irq_ack(unsigned int irq)
{
	int gpio;
	struct nmk_gpio_chip *nmk_chip;

	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	nmk_chip = get_irq_chip_data(irq);
	if (!nmk_chip)
		return;
	writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
}

static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
				  int gpio, bool enable)
{
	u32 bitmask = nmk_gpio_get_bitmask(gpio);
	u32 reg;

	/* we must individually set/clear the two edges */
	if (nmk_chip->edge_rising & bitmask) {
		reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC);
		if (enable)
			reg |= bitmask;
		else
			reg &= ~bitmask;
		writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC);
	}
	if (nmk_chip->edge_falling & bitmask) {
		reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC);
		if (enable)
			reg |= bitmask;
		else
			reg &= ~bitmask;
		writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC);
	}
}

static void nmk_gpio_irq_modify(unsigned int irq, bool enable)
{
	int gpio;
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 bitmask;

	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	nmk_chip = get_irq_chip_data(irq);
	bitmask = nmk_gpio_get_bitmask(gpio);
	if (!nmk_chip)
		return;

	spin_lock_irqsave(&nmk_chip->lock, flags);
	__nmk_gpio_irq_modify(nmk_chip, gpio, enable);
	spin_unlock_irqrestore(&nmk_chip->lock, flags);
}

static void nmk_gpio_irq_mask(unsigned int irq)
{
	nmk_gpio_irq_modify(irq, false);
};

static void nmk_gpio_irq_unmask(unsigned int irq)
{
	nmk_gpio_irq_modify(irq, true);
}

static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
{
	bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
	int gpio;
	struct nmk_gpio_chip *nmk_chip;
	unsigned long flags;
	u32 bitmask;

	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	nmk_chip = get_irq_chip_data(irq);
	bitmask = nmk_gpio_get_bitmask(gpio);
	if (!nmk_chip)
		return -EINVAL;

	if (type & IRQ_TYPE_LEVEL_HIGH)
		return -EINVAL;
	if (type & IRQ_TYPE_LEVEL_LOW)
		return -EINVAL;

	spin_lock_irqsave(&nmk_chip->lock, flags);

	if (enabled)
		__nmk_gpio_irq_modify(nmk_chip, gpio, false);

	nmk_chip->edge_rising &= ~bitmask;
	if (type & IRQ_TYPE_EDGE_RISING)
		nmk_chip->edge_rising |= bitmask;

	nmk_chip->edge_falling &= ~bitmask;
	if (type & IRQ_TYPE_EDGE_FALLING)
		nmk_chip->edge_falling |= bitmask;

	if (enabled)
		__nmk_gpio_irq_modify(nmk_chip, gpio, true);

	spin_unlock_irqrestore(&nmk_chip->lock, flags);

	return 0;
}

static struct irq_chip nmk_gpio_irq_chip = {
	.name		= "Nomadik-GPIO",
	.ack		= nmk_gpio_irq_ack,
	.mask		= nmk_gpio_irq_mask,
	.unmask		= nmk_gpio_irq_unmask,
	.set_type	= nmk_gpio_irq_set_type,
};

static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
{
	struct nmk_gpio_chip *nmk_chip;
	struct irq_chip *host_chip = get_irq_chip(irq);
	unsigned int gpio_irq;
	u32 pending;
	unsigned int first_irq;

	if (host_chip->mask_ack)
		host_chip->mask_ack(irq);
	else {
		host_chip->mask(irq);
		if (host_chip->ack)
			host_chip->ack(irq);
	}

	nmk_chip = get_irq_data(irq);
	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
		gpio_irq = first_irq + __ffs(pending);
		generic_handle_irq(gpio_irq);
	}

	host_chip->unmask(irq);
}

static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
{
	unsigned int first_irq;
	int i;

	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
		set_irq_chip(i, &nmk_gpio_irq_chip);
		set_irq_handler(i, handle_edge_irq);
		set_irq_flags(i, IRQF_VALID);
		set_irq_chip_data(i, nmk_chip);
		set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
	}
	set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
	set_irq_data(nmk_chip->parent_irq, nmk_chip);
	return 0;
}

/* I/O Functions */
static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
	return 0;
}

static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
				int val)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);

	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
	return 0;
}

static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);
	u32 bit = 1 << offset;

	return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
}

static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
				int val)
{
	struct nmk_gpio_chip *nmk_chip =
		container_of(chip, struct nmk_gpio_chip, chip);
	u32 bit = 1 << offset;

	if (val)
		writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
	else
		writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
}

/* This structure is replicated for each GPIO block allocated at probe time */
static struct gpio_chip nmk_gpio_template = {
	.direction_input	= nmk_gpio_make_input,
	.get			= nmk_gpio_get_input,
	.direction_output	= nmk_gpio_make_output,
	.set			= nmk_gpio_set_output,
	.ngpio			= NMK_GPIO_PER_CHIP,
	.can_sleep		= 0,
};

static int __init nmk_gpio_probe(struct platform_device *dev)
{
	struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
	struct nmk_gpio_chip *nmk_chip;
	struct gpio_chip *chip;
	struct resource *res;
	struct clk *clk;
	int irq;
	int ret;

	if (!pdata)
		return -ENODEV;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!res) {
		ret = -ENOENT;
		goto out;
	}

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		ret = irq;
		goto out;
	}

	if (request_mem_region(res->start, resource_size(res),
			       dev_name(&dev->dev)) == NULL) {
		ret = -EBUSY;
		goto out;
	}

	clk = clk_get(&dev->dev, NULL);
	if (IS_ERR(clk)) {
		ret = PTR_ERR(clk);
		goto out_release;
	}

	clk_enable(clk);

	nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
	if (!nmk_chip) {
		ret = -ENOMEM;
		goto out_clk;
	}
	/*
	 * The virt address in nmk_chip->addr is in the nomadik register space,
	 * so we can simply convert the resource address, without remapping
	 */
	nmk_chip->clk = clk;
	nmk_chip->addr = io_p2v(res->start);
	nmk_chip->chip = nmk_gpio_template;
	nmk_chip->parent_irq = irq;
	spin_lock_init(&nmk_chip->lock);

	chip = &nmk_chip->chip;
	chip->base = pdata->first_gpio;
	chip->label = pdata->name;
	chip->dev = &dev->dev;
	chip->owner = THIS_MODULE;

	ret = gpiochip_add(&nmk_chip->chip);
	if (ret)
		goto out_free;

	platform_set_drvdata(dev, nmk_chip);

	nmk_gpio_init_irq(nmk_chip);

	dev_info(&dev->dev, "Bits %i-%i at address %p\n",
		 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
	return 0;

out_free:
	kfree(nmk_chip);
out_clk:
	clk_disable(clk);
	clk_put(clk);
out_release:
	release_mem_region(res->start, resource_size(res));
out:
	dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
		  pdata->first_gpio, pdata->first_gpio+31);
	return ret;
}

static int __exit nmk_gpio_remove(struct platform_device *dev)
{
	struct nmk_gpio_chip *nmk_chip;
	struct resource *res;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);

	nmk_chip = platform_get_drvdata(dev);
	gpiochip_remove(&nmk_chip->chip);
	clk_disable(nmk_chip->clk);
	clk_put(nmk_chip->clk);
	kfree(nmk_chip);
	release_mem_region(res->start, resource_size(res));
	return 0;
}


static struct platform_driver nmk_gpio_driver = {
	.driver = {
		.owner = THIS_MODULE,
		.name = "gpio",
		},
	.probe = nmk_gpio_probe,
	.remove = __exit_p(nmk_gpio_remove),
	.suspend = NULL, /* to be done */
	.resume = NULL,
};

static int __init nmk_gpio_init(void)
{
	return platform_driver_register(&nmk_gpio_driver);
}

arch_initcall(nmk_gpio_init);

MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
MODULE_DESCRIPTION("Nomadik GPIO Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
2ec1d359 AR	1	/*
	2	* Generic GPIO driver for logic cells found in the Nomadik SoC
	3	*
	4	* Copyright (C) 2008,2009 STMicroelectronics
	5	* Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
	6	* Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12	#include <linux/kernel.h>
	13	#include <linux/module.h>
	14	#include <linux/init.h>
	15	#include <linux/device.h>
3e3c62ca	16	#include <linux/platform_device.h>
2ec1d359	17	#include <linux/io.h>
af7dc228 RV	18	#include <linux/clk.h>
af7dc228 RV	19	#include <linux/err.h>
2ec1d359 AR	20	#include <linux/gpio.h>
	21	#include <linux/spinlock.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/irq.h>
5a0e3ad6	24	#include <linux/slab.h>
2ec1d359 AR	25
	26	#include <mach/hardware.h>
	27	#include <mach/gpio.h>
	28
	29	/*
	30	* The GPIO module in the Nomadik family of Systems-on-Chip is an
	31	* AMBA device, managing 32 pins and alternate functions. The logic block
	32	* is currently only used in the Nomadik.
	33	*
	34	* Symbols in this file are called "nmk_gpio" for "nomadik gpio"
	35	*/
	36
	37	#define NMK_GPIO_PER_CHIP 32
	38	struct nmk_gpio_chip {
	39	struct gpio_chip chip;
	40	void __iomem *addr;
af7dc228	41	struct clk *clk;
2ec1d359	42	unsigned int parent_irq;
c0fcb8db	43	spinlock_t lock;
2ec1d359 AR	44	/* Keep track of configured edges */
	45	u32 edge_rising;
	46	u32 edge_falling;
	47	};
	48
	49	/* Mode functions */
	50	int nmk_gpio_set_mode(int gpio, int gpio_mode)
	51	{
	52	struct nmk_gpio_chip *nmk_chip;
	53	unsigned long flags;
	54	u32 afunc, bfunc, bit;
	55
	56	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	57	if (!nmk_chip)
	58	return -EINVAL;
	59
	60	bit = 1 << (gpio - nmk_chip->chip.base);
	61
	62	spin_lock_irqsave(&nmk_chip->lock, flags);
	63	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
	64	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
	65	if (gpio_mode & NMK_GPIO_ALT_A)
	66	afunc \|= bit;
	67	if (gpio_mode & NMK_GPIO_ALT_B)
	68	bfunc \|= bit;
	69	writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
	70	writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
	71	spin_unlock_irqrestore(&nmk_chip->lock, flags);
	72
	73	return 0;
	74	}
	75	EXPORT_SYMBOL(nmk_gpio_set_mode);
	76
	77	int nmk_gpio_get_mode(int gpio)
	78	{
	79	struct nmk_gpio_chip *nmk_chip;
	80	u32 afunc, bfunc, bit;
	81
	82	nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
	83	if (!nmk_chip)
	84	return -EINVAL;
	85
	86	bit = 1 << (gpio - nmk_chip->chip.base);
	87
	88	afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
	89	bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
	90
	91	return (afunc ? NMK_GPIO_ALT_A : 0) \| (bfunc ? NMK_GPIO_ALT_B : 0);
	92	}
	93	EXPORT_SYMBOL(nmk_gpio_get_mode);
	94
	95
	96	/* IRQ functions */
	97	static inline int nmk_gpio_get_bitmask(int gpio)
	98	{
	99	return 1 << (gpio % 32);
	100	}
	101
	102	static void nmk_gpio_irq_ack(unsigned int irq)
	103	{
	104	int gpio;
	105	struct nmk_gpio_chip *nmk_chip;
	106
	107	gpio = NOMADIK_IRQ_TO_GPIO(irq);
108	nmk_chip = get_irq_chip_data(irq);
109	if (!nmk_chip)
110	return;
111	writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
112	}
113
040e5ecd RV	114	static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
040e5ecd RV	115	int gpio, bool enable)
2ec1d359	116	{
040e5ecd RV	117	u32 bitmask = nmk_gpio_get_bitmask(gpio);
040e5ecd RV	118	u32 reg;
2ec1d359	119
040e5ecd	120	/* we must individually set/clear the two edges */
2ec1d359	121	if (nmk_chip->edge_rising & bitmask) {
6b07aaed	122	reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC);
040e5ecd RV	123	if (enable)
	124	reg \|= bitmask;
	125	else
	126	reg &= ~bitmask;
6b07aaed	127	writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC);
2ec1d359 AR	128	}
2ec1d359 AR	129	if (nmk_chip->edge_falling & bitmask) {
6b07aaed	130	reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC);
040e5ecd RV	131	if (enable)
	132	reg \|= bitmask;
	133	else
	134	reg &= ~bitmask;
6b07aaed	135	writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC);
2ec1d359	136	}
040e5ecd	137	}
2ec1d359	138
040e5ecd	139	static void nmk_gpio_irq_modify(unsigned int irq, bool enable)
2ec1d359 AR	140	{
	141	int gpio;
	142	struct nmk_gpio_chip *nmk_chip;
	143	unsigned long flags;
040e5ecd	144	u32 bitmask;
2ec1d359 AR	145
	146	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	147	nmk_chip = get_irq_chip_data(irq);
	148	bitmask = nmk_gpio_get_bitmask(gpio);
	149	if (!nmk_chip)
	150	return;
	151
2ec1d359	152	spin_lock_irqsave(&nmk_chip->lock, flags);
040e5ecd	153	__nmk_gpio_irq_modify(nmk_chip, gpio, enable);
2ec1d359 AR	154	spin_unlock_irqrestore(&nmk_chip->lock, flags);
	155	}
	156
040e5ecd RV	157	static void nmk_gpio_irq_mask(unsigned int irq)
	158	{
	159	nmk_gpio_irq_modify(irq, false);
	160	};
	161
	162	static void nmk_gpio_irq_unmask(unsigned int irq)
	163	{
	164	nmk_gpio_irq_modify(irq, true);
	165	}
	166
2ec1d359 AR	167	static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
2ec1d359 AR	168	{
7a852d80	169	bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
2ec1d359 AR	170	int gpio;
	171	struct nmk_gpio_chip *nmk_chip;
	172	unsigned long flags;
	173	u32 bitmask;
	174
	175	gpio = NOMADIK_IRQ_TO_GPIO(irq);
	176	nmk_chip = get_irq_chip_data(irq);
	177	bitmask = nmk_gpio_get_bitmask(gpio);
	178	if (!nmk_chip)
	179	return -EINVAL;
	180
	181	if (type & IRQ_TYPE_LEVEL_HIGH)
	182	return -EINVAL;
	183	if (type & IRQ_TYPE_LEVEL_LOW)
	184	return -EINVAL;
	185
	186	spin_lock_irqsave(&nmk_chip->lock, flags);
	187
7a852d80 RV	188	if (enabled)
	189	__nmk_gpio_irq_modify(nmk_chip, gpio, false);
	190
2ec1d359 AR	191	nmk_chip->edge_rising &= ~bitmask;
	192	if (type & IRQ_TYPE_EDGE_RISING)
	193	nmk_chip->edge_rising \|= bitmask;
2ec1d359 AR	194
	195	nmk_chip->edge_falling &= ~bitmask;
	196	if (type & IRQ_TYPE_EDGE_FALLING)
	197	nmk_chip->edge_falling \|= bitmask;
2ec1d359	198
7a852d80 RV	199	if (enabled)
7a852d80 RV	200	__nmk_gpio_irq_modify(nmk_chip, gpio, true);
2ec1d359	201
7a852d80	202	spin_unlock_irqrestore(&nmk_chip->lock, flags);
2ec1d359 AR	203
	204	return 0;
	205	}
	206
	207	static struct irq_chip nmk_gpio_irq_chip = {
	208	.name = "Nomadik-GPIO",
	209	.ack = nmk_gpio_irq_ack,
	210	.mask = nmk_gpio_irq_mask,
	211	.unmask = nmk_gpio_irq_unmask,
	212	.set_type = nmk_gpio_irq_set_type,
	213	};
	214
	215	static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
	216	{
	217	struct nmk_gpio_chip *nmk_chip;
aaedaa2b	218	struct irq_chip *host_chip = get_irq_chip(irq);
2ec1d359 AR	219	unsigned int gpio_irq;
	220	u32 pending;
	221	unsigned int first_irq;
	222
aaedaa2b RV	223	if (host_chip->mask_ack)
	224	host_chip->mask_ack(irq);
	225	else {
	226	host_chip->mask(irq);
	227	if (host_chip->ack)
	228	host_chip->ack(irq);
	229	}
	230
2ec1d359 AR	231	nmk_chip = get_irq_data(irq);
	232	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	233	while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
	234	gpio_irq = first_irq + __ffs(pending);
	235	generic_handle_irq(gpio_irq);
	236	}
aaedaa2b RV	237
aaedaa2b RV	238	host_chip->unmask(irq);
2ec1d359 AR	239	}
	240
	241	static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
	242	{
	243	unsigned int first_irq;
	244	int i;
	245
	246	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
	247	for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
	248	set_irq_chip(i, &nmk_gpio_irq_chip);
	249	set_irq_handler(i, handle_edge_irq);
	250	set_irq_flags(i, IRQF_VALID);
	251	set_irq_chip_data(i, nmk_chip);
2210d645	252	set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
2ec1d359 AR	253	}
	254	set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
	255	set_irq_data(nmk_chip->parent_irq, nmk_chip);
	256	return 0;
	257	}
	258
	259	/* I/O Functions */
	260	static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
	261	{
	262	struct nmk_gpio_chip *nmk_chip =
	263	container_of(chip, struct nmk_gpio_chip, chip);
	264
	265	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
	266	return 0;
	267	}
	268
	269	static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
	270	int val)
	271	{
	272	struct nmk_gpio_chip *nmk_chip =
	273	container_of(chip, struct nmk_gpio_chip, chip);
	274
	275	writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
	276	return 0;
	277	}
	278
	279	static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
	280	{
	281	struct nmk_gpio_chip *nmk_chip =
	282	container_of(chip, struct nmk_gpio_chip, chip);
	283	u32 bit = 1 << offset;
	284
	285	return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
	286	}
	287
	288	static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
	289	int val)
	290	{
	291	struct nmk_gpio_chip *nmk_chip =
	292	container_of(chip, struct nmk_gpio_chip, chip);
	293	u32 bit = 1 << offset;
	294
	295	if (val)
	296	writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
	297	else
	298	writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
	299	}
	300
	301	/* This structure is replicated for each GPIO block allocated at probe time */
	302	static struct gpio_chip nmk_gpio_template = {
	303	.direction_input = nmk_gpio_make_input,
	304	.get = nmk_gpio_get_input,
	305	.direction_output = nmk_gpio_make_output,
	306	.set = nmk_gpio_set_output,
	307	.ngpio = NMK_GPIO_PER_CHIP,
	308	.can_sleep = 0,
	309	};
	310
3e3c62ca	311	static int __init nmk_gpio_probe(struct platform_device *dev)
2ec1d359	312	{
3e3c62ca	313	struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
2ec1d359 AR	314	struct nmk_gpio_chip *nmk_chip;
2ec1d359 AR	315	struct gpio_chip *chip;
3e3c62ca	316	struct resource *res;
af7dc228	317	struct clk *clk;
3e3c62ca	318	int irq;
2ec1d359 AR	319	int ret;
2ec1d359 AR	320
3e3c62ca RV	321	if (!pdata)
	322	return -ENODEV;
	323
	324	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	325	if (!res) {
	326	ret = -ENOENT;
	327	goto out;
	328	}
	329
	330	irq = platform_get_irq(dev, 0);
	331	if (irq < 0) {
	332	ret = irq;
	333	goto out;
	334	}
	335
	336	if (request_mem_region(res->start, resource_size(res),
	337	dev_name(&dev->dev)) == NULL) {
	338	ret = -EBUSY;
	339	goto out;
	340	}
2ec1d359	341
af7dc228 RV	342	clk = clk_get(&dev->dev, NULL);
	343	if (IS_ERR(clk)) {
	344	ret = PTR_ERR(clk);
	345	goto out_release;
	346	}
	347
	348	clk_enable(clk);
	349
2ec1d359 AR	350	nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
	351	if (!nmk_chip) {
	352	ret = -ENOMEM;
af7dc228	353	goto out_clk;
2ec1d359 AR	354	}
	355	/*
	356	* The virt address in nmk_chip->addr is in the nomadik register space,
	357	* so we can simply convert the resource address, without remapping
	358	*/
af7dc228	359	nmk_chip->clk = clk;
3e3c62ca	360	nmk_chip->addr = io_p2v(res->start);
2ec1d359	361	nmk_chip->chip = nmk_gpio_template;
3e3c62ca	362	nmk_chip->parent_irq = irq;
c0fcb8db	363	spin_lock_init(&nmk_chip->lock);
2ec1d359 AR	364
	365	chip = &nmk_chip->chip;
	366	chip->base = pdata->first_gpio;
	367	chip->label = pdata->name;
	368	chip->dev = &dev->dev;
	369	chip->owner = THIS_MODULE;
	370
	371	ret = gpiochip_add(&nmk_chip->chip);
	372	if (ret)
	373	goto out_free;
	374
3e3c62ca	375	platform_set_drvdata(dev, nmk_chip);
2ec1d359 AR	376
	377	nmk_gpio_init_irq(nmk_chip);
	378
	379	dev_info(&dev->dev, "Bits %i-%i at address %p\n",
	380	nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
	381	return 0;
	382
3e3c62ca	383	out_free:
2ec1d359	384	kfree(nmk_chip);
af7dc228 RV	385	out_clk:
	386	clk_disable(clk);
	387	clk_put(clk);
3e3c62ca RV	388	out_release:
	389	release_mem_region(res->start, resource_size(res));
	390	out:
2ec1d359 AR	391	dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
	392	pdata->first_gpio, pdata->first_gpio+31);
	393	return ret;
	394	}
	395
3e3c62ca	396	static int __exit nmk_gpio_remove(struct platform_device *dev)
2ec1d359 AR	397	{
2ec1d359 AR	398	struct nmk_gpio_chip *nmk_chip;
3e3c62ca RV	399	struct resource *res;
	400
	401	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
2ec1d359	402
3e3c62ca	403	nmk_chip = platform_get_drvdata(dev);
2ec1d359	404	gpiochip_remove(&nmk_chip->chip);
af7dc228 RV	405	clk_disable(nmk_chip->clk);
af7dc228 RV	406	clk_put(nmk_chip->clk);
2ec1d359	407	kfree(nmk_chip);
3e3c62ca	408	release_mem_region(res->start, resource_size(res));
2ec1d359 AR	409	return 0;
	410	}
	411
	412
3e3c62ca RV	413	static struct platform_driver nmk_gpio_driver = {
3e3c62ca RV	414	.driver = {
2ec1d359 AR	415	.owner = THIS_MODULE,
	416	.name = "gpio",
	417	},
	418	.probe = nmk_gpio_probe,
3e3c62ca	419	.remove = __exit_p(nmk_gpio_remove),
2ec1d359 AR	420	.suspend = NULL, /* to be done */
2ec1d359 AR	421	.resume = NULL,
2ec1d359 AR	422	};
	423
	424	static int __init nmk_gpio_init(void)
	425	{
3e3c62ca	426	return platform_driver_register(&nmk_gpio_driver);
2ec1d359 AR	427	}
	428
	429	arch_initcall(nmk_gpio_init);
	430
	431	MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
	432	MODULE_DESCRIPTION("Nomadik GPIO Driver");
	433	MODULE_LICENSE("GPL");
	434
	435