projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 9c4566a1 DN |
1 | /* |
| 2 | * Copyright (c) 2003 ARM Limited | |
| 3 | * Copyright (c) u-boot contributors | |
| 4 | * Copyright (c) 2012 Pavel Machek <pavel@denx.de> | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 10 | #include <linux/linkage.h> | |
| 11 | #include <linux/init.h> | |
| 12 | ||
| 9560f840 | 13 | __CPUINIT |
| ad208d03 | 14 | .arch armv7-a |
| 9c4566a1 | 15 | |
| 9c4566a1 | 16 | ENTRY(secondary_trampoline) |
| d6dd735f DN |
17 | movw r2, #:lower16:cpu1start_addr |
| 18 | movt r2, #:upper16:cpu1start_addr | |
| 19 | ||
| 20 | /* The socfpga VT cannot handle a 0xC0000000 page offset when loading | |
| 21 | the cpu1start_addr, we bit clear it. Tested on HW and VT. */ | |
| 22 | bic r2, r2, #0x40000000 | |
| 9c4566a1 | 23 | |
| d6dd735f | 24 | ldr r0, [r2] |
| 9c4566a1 DN |
25 | ldr r1, [r0] |
| 26 | bx r1 | |
| 27 | ||
| 28 | ENTRY(secondary_trampoline_end) | |
| d6dd735f DN |
29 | |
| 30 | ENTRY(socfpga_secondary_startup) | |
| 31 | bl v7_invalidate_l1 | |
| 32 | b secondary_startup | |
| 33 | ENDPROC(socfpga_secondary_startup) |