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ASoC: Add fully_routed flag to Speyside machines
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-shmobile / board-mackerel.c
CommitLineData
920adc75
KM		 1/*
2 * mackerel board support
3 *
4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on ap4evb
8 * Copyright (C) 2010 Magnus Damm
9 * Copyright (C) 2008 Yoshihiro Shimoda
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 */
12c4309b 24#include <linux/delay.h>
920adc75
KM		 25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/platform_device.h>
30#include <linux/gpio.h>
31#include <linux/input.h>
32#include <linux/io.h>
1a44d72a 33#include <linux/i2c.h>
d44deb35 34#include <linux/leds.h>
6dff7da2
YG		 35#include <linux/mfd/tmio.h>
36#include <linux/mmc/host.h>
41491b9a 37#include <linux/mmc/sh_mmcif.h>
17e75d82 38#include <linux/mmc/sh_mobile_sdhi.h>
920adc75
KM		 39#include <linux/mtd/mtd.h>
40#include <linux/mtd/partitions.h>
41#include <linux/mtd/physmap.h>
b5e8d269 42#include <linux/pm_clock.h>
2264c151 43#include <linux/smsc911x.h>
1a44d72a 44#include <linux/sh_intc.h>
cd8ab004 45#include <linux/tca6416_keypad.h>
25338f2e 46#include <linux/usb/r8a66597.h>
66ee3bef 47#include <linux/usb/renesas_usbhs.h>
9b742024 48#include <linux/dma-mapping.h>
920adc75 49
12c4309b 50#include <video/sh_mobile_hdmi.h>
11fee467 51#include <video/sh_mobile_lcdc.h>
ae37c8de
MD		 52#include <media/sh_mobile_ceu.h>
53#include <media/soc_camera.h>
54#include <media/soc_camera_platform.h>
1a44d72a
KM		 55#include <sound/sh_fsi.h>
56
920adc75
KM		 57#include <mach/common.h>
58#include <mach/sh7372.h>
59
60#include <asm/mach/arch.h>
61#include <asm/mach/time.h>
62#include <asm/mach/map.h>
63#include <asm/mach-types.h>
64
65/*
66 * Address Interface BusWidth note
67 * ------------------------------------------------------------------
68 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
69 * 0x0800_0000 user area -
70 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
71 * 0x1400_0000 Ether (LAN9220) 16bit
72 * 0x1600_0000 user area - cannot use with NAND
73 * 0x1800_0000 user area -
74 * 0x1A00_0000 -
75 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
76 */
77
4b82b689
KM		 78/*
79 * CPU mode
80 *
81 * SW4 | Boot Area| Master | Remarks
82 * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
83 * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
84 * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
85 * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
86 * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
87 * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
88 * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
89 * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
90 * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
91 * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
92*/
93
94/*
95 * NOR Flash ROM
96 *
97 * SW1 | SW2 | SW7 | NOR Flash ROM
98 * bit1 | bit1 bit2 | bit1 | Memory allocation
99 * ------+------------+------+------------------
100 * OFF | ON OFF | ON | Area 0
101 * OFF | ON OFF | OFF | Area 4
102 */
103
104/*
105 * SMSC 9220
106 *
107 * SW1 SMSC 9220
108 * -----------------------
109 * ON access disable
110 * OFF access enable
111 */
112
113/*
114 * NAND Flash ROM
115 *
116 * SW1 | SW2 | SW7 | NAND Flash ROM
117 * bit1 | bit1 bit2 | bit2 | Memory allocation
118 * ------+------------+------+------------------
119 * OFF | ON OFF | ON | FCE 0
120 * OFF | ON OFF | OFF | FCE 1
121 */
122
123/*
124 * External interrupt pin settings
125 *
126 * IRQX | pin setting | device | level
127 * ------+--------------------+--------------------+-------
128 * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
129 * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
e2a53b7c 130 * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
4b82b689
KM		 131 * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
132 * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
133 * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
134 * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
25338f2e 135 */
4b82b689 136
25338f2e
KM		 137/*
138 * USB
139 *
140 * USB0 : CN22 : Function
141 * USB1 : CN31 : Function/Host *1
142 *
143 * J30 (for CN31) *1
144 * ----------+---------------+-------------
145 * 1-2 short | VBUS 5V | Host
146 * open | external VBUS | Function
147 *
148 * *1
66ee3bef
KM		 149 * CN31 is used as
150 * CONFIG_USB_R8A66597_HCD Host
151 * CONFIG_USB_RENESAS_USBHS Function
152 *
153 * CAUTION
154 *
155 * renesas_usbhs driver can use external interrupt mode
156 * (which come from USB-PHY) or autonomy mode (it use own interrupt)
157 * for detecting connection/disconnection when Function.
158 * USB will be power OFF while it has been disconnecting
159 * if external interrupt mode, and it is always power ON if autonomy mode,
160 *
161 * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
162 * because Touchscreen is using IRQ7-PORT40.
163 * It is impossible to use IRQ7 demux on this board.
164 *
165 * We can use external interrupt mode USB-Function on "USB1".
166 * USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
167 * But don't select both drivers in same time.
168 * These uses same IRQ number for request_irq(), and aren't supporting
e2a53b7c 169 * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
66ee3bef
KM		 170 *
171 * Actually these are old/new version of USB driver.
e2a53b7c 172 * This mean its register will be broken if it supports shared IRQ,
25338f2e 173 */
4b82b689 174
6dff7da2
YG		 175/*
176 * SDHI0 (CN12)
177 *
178 * SW56 : OFF
179 *
180 */
181
182/* MMC /SDHI1 (CN7)
183 *
184 * I/O voltage : 1.8v
185 *
186 * Power voltage : 1.8v or 3.3v
41491b9a 187 * J22 : select power voltage *1
6dff7da2
YG		 188 * 1-2 pin : 1.8v
189 * 2-3 pin : 3.3v
190 *
41491b9a
YG		 191 * *1
192 * Please change J22 depends the card to be used.
193 * MMC's OCR field set to support either voltage for the card inserted.
194 *
6dff7da2
YG		 195 * SW1 | SW33
196 * | bit1 | bit2 | bit3 | bit4
197 * -------------+------+------+------+-------
2150dace
SH		 198 * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
199 * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
6dff7da2
YG		 200 *
201 */
202
203/*
204 * SDHI2 (CN23)
205 *
206 * microSD card sloct
207 *
208 */
209
1a44d72a
KM		 210/*
211 * FIXME !!
212 *
213 * gpio_no_direction
66ee3bef 214 * gpio_pull_down
1a44d72a
KM		 215 * are quick_hack.
216 *
217 * current gpio frame work doesn't have
218 * the method to control only pull up/down/free.
219 * this function should be replaced by correct gpio function
220 */
221static void __init gpio_no_direction(u32 addr)
222{
223 __raw_writeb(0x00, addr);
224}
225
66ee3bef
KM		 226static void __init gpio_pull_down(u32 addr)
227{
228 u8 data = __raw_readb(addr);
229
230 data &= 0x0F;
231 data |= 0xA0;
232
233 __raw_writeb(data, addr);
234}
235
920adc75
KM		 236/* MTD */
237static struct mtd_partition nor_flash_partitions[] = {
238 {
239 .name = "loader",
240 .offset = 0x00000000,
241 .size = 512 * 1024,
242 .mask_flags = MTD_WRITEABLE,
243 },
244 {
245 .name = "bootenv",
246 .offset = MTDPART_OFS_APPEND,
247 .size = 512 * 1024,
248 .mask_flags = MTD_WRITEABLE,
249 },
250 {
251 .name = "kernel_ro",
252 .offset = MTDPART_OFS_APPEND,
253 .size = 8 * 1024 * 1024,
254 .mask_flags = MTD_WRITEABLE,
255 },
256 {
257 .name = "kernel",
258 .offset = MTDPART_OFS_APPEND,
259 .size = 8 * 1024 * 1024,
260 },
261 {
262 .name = "data",
263 .offset = MTDPART_OFS_APPEND,
264 .size = MTDPART_SIZ_FULL,
265 },
266};
267
268static struct physmap_flash_data nor_flash_data = {
269 .width = 2,
270 .parts = nor_flash_partitions,
271 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
272};
273
274static struct resource nor_flash_resources[] = {
275 [0] = {
487881c0
MD		 276 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
277 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
920adc75
KM		 278 .flags = IORESOURCE_MEM,
279 }
280};
281
282static struct platform_device nor_flash_device = {
283 .name = "physmap-flash",
284 .dev = {
285 .platform_data = &nor_flash_data,
286 },
287 .num_resources = ARRAY_SIZE(nor_flash_resources),
288 .resource = nor_flash_resources,
289};
290
2264c151
KM		 291/* SMSC */
292static struct resource smc911x_resources[] = {
293 {
294 .start = 0x14000000,
295 .end = 0x16000000 - 1,
296 .flags = IORESOURCE_MEM,
297 }, {
298 .start = evt2irq(0x02c0) /* IRQ6A */,
299 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
300 },
301};
302
303static struct smsc911x_platform_config smsc911x_info = {
304 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
305 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
306 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
307};
308
309static struct platform_device smc911x_device = {
310 .name = "smsc911x",
311 .id = -1,
312 .num_resources = ARRAY_SIZE(smc911x_resources),
313 .resource = smc911x_resources,
314 .dev = {
315 .platform_data = &smsc911x_info,
316 },
317};
318
1c7fcbed
DHG		 319/* MERAM */
320static struct sh_mobile_meram_info mackerel_meram_info = {
321 .addr_mode = SH_MOBILE_MERAM_MODE1,
322};
323
324static struct resource meram_resources[] = {
325 [0] = {
326 .name = "MERAM",
327 .start = 0xe8000000,
328 .end = 0xe81fffff,
329 .flags = IORESOURCE_MEM,
330 },
331};
332
333static struct platform_device meram_device = {
334 .name = "sh_mobile_meram",
335 .id = 0,
336 .num_resources = ARRAY_SIZE(meram_resources),
337 .resource = meram_resources,
338 .dev = {
339 .platform_data = &mackerel_meram_info,
340 },
341};
342
11fee467
KM		 343/* LCDC */
344static struct fb_videomode mackerel_lcdc_modes[] = {
345 {
346 .name = "WVGA Panel",
347 .xres = 800,
348 .yres = 480,
349 .left_margin = 220,
350 .right_margin = 110,
351 .hsync_len = 70,
352 .upper_margin = 20,
353 .lower_margin = 5,
354 .vsync_len = 5,
355 .sync = 0,
356 },
357};
358
1fbdfcde
MD		 359static int mackerel_set_brightness(void *board_data, int brightness)
360{
361 gpio_set_value(GPIO_PORT31, brightness);
362
363 return 0;
364}
365
366static int mackerel_get_brightness(void *board_data)
367{
368 return gpio_get_value(GPIO_PORT31);
369}
370
1c7fcbed
DHG		 371static struct sh_mobile_meram_cfg lcd_meram_cfg = {
372 .icb[0] = {
373 .marker_icb = 28,
374 .cache_icb = 24,
375 .meram_offset = 0x0,
376 .meram_size = 0x40,
377 },
378 .icb[1] = {
379 .marker_icb = 29,
380 .cache_icb = 25,
381 .meram_offset = 0x40,
382 .meram_size = 0x40,
383 },
384};
385
11fee467 386static struct sh_mobile_lcdc_info lcdc_info = {
1c7fcbed 387 .meram_dev = &mackerel_meram_info,
11fee467
KM		 388 .clock_source = LCDC_CLK_BUS,
389 .ch[0] = {
390 .chan = LCDC_CHAN_MAINLCD,
391 .bpp = 16,
392 .lcd_cfg = mackerel_lcdc_modes,
393 .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
394 .interface_type = RGB24,
2c34e939 395 .clock_divider = 3,
11fee467
KM		 396 .flags = 0,
397 .lcd_size_cfg.width = 152,
398 .lcd_size_cfg.height = 91,
1fbdfcde
MD		 399 .board_cfg = {
400 .set_brightness = mackerel_set_brightness,
401 .get_brightness = mackerel_get_brightness,
402 },
403 .bl_info = {
404 .name = "sh_mobile_lcdc_bl",
405 .max_brightness = 1,
406 },
1c7fcbed 407 .meram_cfg = &lcd_meram_cfg,
11fee467
KM		 408 }
409};
410
411static struct resource lcdc_resources[] = {
412 [0] = {
413 .name = "LCDC",
414 .start = 0xfe940000,
415 .end = 0xfe943fff,
416 .flags = IORESOURCE_MEM,
417 },
418 [1] = {
419 .start = intcs_evt2irq(0x580),
420 .flags = IORESOURCE_IRQ,
421 },
422};
423
424static struct platform_device lcdc_device = {
425 .name = "sh_mobile_lcdc_fb",
426 .num_resources = ARRAY_SIZE(lcdc_resources),
427 .resource = lcdc_resources,
428 .dev = {
429 .platform_data = &lcdc_info,
430 .coherent_dma_mask = ~0,
431 },
432};
433
1c7fcbed
DHG		 434static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
435 .icb[0] = {
436 .marker_icb = 30,
437 .cache_icb = 26,
438 .meram_offset = 0x80,
439 .meram_size = 0x100,
440 },
441 .icb[1] = {
442 .marker_icb = 31,
443 .cache_icb = 27,
444 .meram_offset = 0x180,
445 .meram_size = 0x100,
446 },
447};
12c4309b
KM		 448/* HDMI */
449static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
1c7fcbed 450 .meram_dev = &mackerel_meram_info,
12c4309b
KM		 451 .clock_source = LCDC_CLK_EXTERNAL,
452 .ch[0] = {
453 .chan = LCDC_CHAN_MAINLCD,
454 .bpp = 16,
455 .interface_type = RGB24,
456 .clock_divider = 1,
457 .flags = LCDC_FLAGS_DWPOL,
1c7fcbed 458 .meram_cfg = &hdmi_meram_cfg,
12c4309b
KM		 459 }
460};
461
462static struct resource hdmi_lcdc_resources[] = {
463 [0] = {
464 .name = "LCDC1",
465 .start = 0xfe944000,
466 .end = 0xfe947fff,
467 .flags = IORESOURCE_MEM,
468 },
469 [1] = {
470 .start = intcs_evt2irq(0x1780),
471 .flags = IORESOURCE_IRQ,
472 },
473};
474
475static struct platform_device hdmi_lcdc_device = {
476 .name = "sh_mobile_lcdc_fb",
477 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
478 .resource = hdmi_lcdc_resources,
479 .id = 1,
480 .dev = {
481 .platform_data = &hdmi_lcdc_info,
482 .coherent_dma_mask = ~0,
483 },
484};
485
486static struct sh_mobile_hdmi_info hdmi_info = {
487 .lcd_chan = &hdmi_lcdc_info.ch[0],
488 .lcd_dev = &hdmi_lcdc_device.dev,
98d27b8a 489 .flags = HDMI_SND_SRC_SPDIF,
12c4309b
KM		 490};
491
492static struct resource hdmi_resources[] = {
493 [0] = {
494 .name = "HDMI",
495 .start = 0xe6be0000,
496 .end = 0xe6be00ff,
497 .flags = IORESOURCE_MEM,
498 },
499 [1] = {
500 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
501 .start = evt2irq(0x17e0),
502 .flags = IORESOURCE_IRQ,
503 },
504};
505
506static struct platform_device hdmi_device = {
507 .name = "sh-mobile-hdmi",
508 .num_resources = ARRAY_SIZE(hdmi_resources),
509 .resource = hdmi_resources,
510 .id = -1,
511 .dev = {
512 .platform_data = &hdmi_info,
513 },
514};
515
3f25c9cc
KM		 516static struct platform_device fsi_hdmi_device = {
517 .name = "sh_fsi2_b_hdmi",
518};
519
2ce51f8b 520static void __init hdmi_init_pm_clock(void)
12c4309b
KM		 521{
522 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
523 int ret;
524 long rate;
525
526 if (IS_ERR(hdmi_ick)) {
527 ret = PTR_ERR(hdmi_ick);
528 pr_err("Cannot get HDMI ICK: %d\n", ret);
529 goto out;
530 }
531
532 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
533 if (ret < 0) {
534 pr_err("Cannot set PLLC2 parent: %d, %d users\n",
535 ret, sh7372_pllc2_clk.usecount);
536 goto out;
537 }
538
539 pr_debug("PLLC2 initial frequency %lu\n",
540 clk_get_rate(&sh7372_pllc2_clk));
541
542 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
543 if (rate < 0) {
544 pr_err("Cannot get suitable rate: %ld\n", rate);
545 ret = rate;
546 goto out;
547 }
548
549 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
550 if (ret < 0) {
551 pr_err("Cannot set rate %ld: %d\n", rate, ret);
552 goto out;
553 }
554
12c4309b
KM		 555 pr_debug("PLLC2 set frequency %lu\n", rate);
556
557 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
2ce51f8b 558 if (ret < 0)
12c4309b 559 pr_err("Cannot set HDMI parent: %d\n", ret);
12c4309b
KM		 560
561out:
562 if (!IS_ERR(hdmi_ick))
563 clk_put(hdmi_ick);
12c4309b 564}
12c4309b 565
e2a53b7c
MD		 566/* USBHS0 is connected to CN22 which takes a USB Mini-B plug
567 *
568 * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
569 * but on this particular board IRQ7 is already used by
570 * the touch screen. This leaves us with software polling.
571 */
572#define USBHS0_POLL_INTERVAL (HZ * 5)
573
574struct usbhs_private {
575 unsigned int usbphyaddr;
576 unsigned int usbcrcaddr;
577 struct renesas_usbhs_platform_info info;
578 struct delayed_work work;
579 struct platform_device *pdev;
580};
581
582#define usbhs_get_priv(pdev) \
583 container_of(renesas_usbhs_get_info(pdev), \
584 struct usbhs_private, info)
585
586#define usbhs_is_connected(priv) \
587 (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
588
589static int usbhs_get_vbus(struct platform_device *pdev)
590{
591 return usbhs_is_connected(usbhs_get_priv(pdev));
592}
593
594static void usbhs_phy_reset(struct platform_device *pdev)
595{
596 struct usbhs_private *priv = usbhs_get_priv(pdev);
597
598 /* init phy */
599 __raw_writew(0x8a0a, priv->usbcrcaddr);
600}
601
602static int usbhs0_get_id(struct platform_device *pdev)
603{
604 return USBHS_GADGET;
605}
606
607static void usbhs0_work_function(struct work_struct *work)
608{
609 struct usbhs_private *priv = container_of(work, struct usbhs_private,
610 work.work);
611
612 renesas_usbhs_call_notify_hotplug(priv->pdev);
613 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
614}
615
616static int usbhs0_hardware_init(struct platform_device *pdev)
617{
618 struct usbhs_private *priv = usbhs_get_priv(pdev);
619
620 priv->pdev = pdev;
621 INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
622 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
623 return 0;
624}
625
626static void usbhs0_hardware_exit(struct platform_device *pdev)
627{
628 struct usbhs_private *priv = usbhs_get_priv(pdev);
629
630 cancel_delayed_work_sync(&priv->work);
631}
632
e2a53b7c
MD		 633static struct usbhs_private usbhs0_private = {
634 .usbcrcaddr = 0xe605810c, /* USBCR2 */
635 .info = {
636 .platform_callback = {
637 .hardware_init = usbhs0_hardware_init,
638 .hardware_exit = usbhs0_hardware_exit,
639 .phy_reset = usbhs_phy_reset,
640 .get_id = usbhs0_get_id,
641 .get_vbus = usbhs_get_vbus,
642 },
643 .driver_param = {
644 .buswait_bwait = 4,
fe437561
KM		 645 .d0_tx_id = SHDMA_SLAVE_USB0_TX,
646 .d1_rx_id = SHDMA_SLAVE_USB0_RX,
e2a53b7c
MD		 647 },
648 },
649};
650
651static struct resource usbhs0_resources[] = {
652 [0] = {
653 .name = "USBHS0",
654 .start = 0xe6890000,
655 .end = 0xe68900e6 - 1,
656 .flags = IORESOURCE_MEM,
657 },
658 [1] = {
659 .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
660 .flags = IORESOURCE_IRQ,
661 },
662};
663
664static struct platform_device usbhs0_device = {
665 .name = "renesas_usbhs",
666 .id = 0,
667 .dev = {
668 .platform_data = &usbhs0_private.info,
669 },
670 .num_resources = ARRAY_SIZE(usbhs0_resources),
671 .resource = usbhs0_resources,
672};
673
674/* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
675 *
676 * Use J30 to select between Host and Function. This setting
677 * can however not be detected by software. Hotplug of USBHS1
678 * is provided via IRQ8.
679 */
680#define IRQ8 evt2irq(0x0300)
681
682/* USBHS1 USB Host support via r8a66597_hcd */
25338f2e
KM		 683static void usb1_host_port_power(int port, int power)
684{
685 if (!power) /* only power-on is supported for now */
686 return;
687
688 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
689 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
690}
691
692static struct r8a66597_platdata usb1_host_data = {
693 .on_chip = 1,
694 .port_power = usb1_host_port_power,
695};
696
697static struct resource usb1_host_resources[] = {
698 [0] = {
e2a53b7c
MD		 699 .name = "USBHS1",
700 .start = 0xe68b0000,
701 .end = 0xe68b00e6 - 1,
25338f2e
KM		 702 .flags = IORESOURCE_MEM,
703 },
704 [1] = {
705 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
706 .flags = IORESOURCE_IRQ,
707 },
708};
709
710static struct platform_device usb1_host_device = {
711 .name = "r8a66597_hcd",
712 .id = 1,
713 .dev = {
714 .dma_mask = NULL, /* not use dma */
715 .coherent_dma_mask = 0xffffffff,
716 .platform_data = &usb1_host_data,
717 },
718 .num_resources = ARRAY_SIZE(usb1_host_resources),
719 .resource = usb1_host_resources,
720};
721
e2a53b7c
MD		 722/* USBHS1 USB Function support via renesas_usbhs */
723
66ee3bef
KM		 724#define USB_PHY_MODE (1 << 4)
725#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
726#define USB_PHY_ON (1 << 1)
727#define USB_PHY_OFF (1 << 0)
728#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
729
66ee3bef
KM		 730static irqreturn_t usbhs1_interrupt(int irq, void *data)
731{
732 struct platform_device *pdev = data;
733 struct usbhs_private *priv = usbhs_get_priv(pdev);
734
735 dev_dbg(&pdev->dev, "%s\n", __func__);
736
737 renesas_usbhs_call_notify_hotplug(pdev);
738
739 /* clear status */
740 __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
741 priv->usbphyaddr);
742
743 return IRQ_HANDLED;
744}
745
746static int usbhs1_hardware_init(struct platform_device *pdev)
747{
748 struct usbhs_private *priv = usbhs_get_priv(pdev);
749 int ret;
750
66ee3bef
KM		 751 /* clear interrupt status */
752 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
753
e2a53b7c 754 ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
66ee3bef
KM		 755 dev_name(&pdev->dev), pdev);
756 if (ret) {
757 dev_err(&pdev->dev, "request_irq err\n");
758 return ret;
759 }
760
761 /* enable USB phy interrupt */
762 __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
763
764 return 0;
765}
766
767static void usbhs1_hardware_exit(struct platform_device *pdev)
768{
769 struct usbhs_private *priv = usbhs_get_priv(pdev);
770
771 /* clear interrupt status */
772 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
773
e2a53b7c 774 free_irq(IRQ8, pdev);
66ee3bef
KM		 775}
776
05a7929f
KM		 777static int usbhs1_get_id(struct platform_device *pdev)
778{
779 return USBHS_GADGET;
780}
781
66ee3bef
KM		 782static u32 usbhs1_pipe_cfg[] = {
783 USB_ENDPOINT_XFER_CONTROL,
784 USB_ENDPOINT_XFER_ISOC,
785 USB_ENDPOINT_XFER_ISOC,
786 USB_ENDPOINT_XFER_BULK,
787 USB_ENDPOINT_XFER_BULK,
788 USB_ENDPOINT_XFER_BULK,
789 USB_ENDPOINT_XFER_INT,
790 USB_ENDPOINT_XFER_INT,
791 USB_ENDPOINT_XFER_INT,
792 USB_ENDPOINT_XFER_BULK,
793 USB_ENDPOINT_XFER_BULK,
794 USB_ENDPOINT_XFER_BULK,
795 USB_ENDPOINT_XFER_BULK,
796 USB_ENDPOINT_XFER_BULK,
797 USB_ENDPOINT_XFER_BULK,
798 USB_ENDPOINT_XFER_BULK,
799};
800
801static struct usbhs_private usbhs1_private = {
e2a53b7c
MD		 802 .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */
803 .usbcrcaddr = 0xe6058130, /* USBCR4 */
66ee3bef
KM		 804 .info = {
805 .platform_callback = {
806 .hardware_init = usbhs1_hardware_init,
807 .hardware_exit = usbhs1_hardware_exit,
05a7929f 808 .get_id = usbhs1_get_id,
e2a53b7c
MD		 809 .phy_reset = usbhs_phy_reset,
810 .get_vbus = usbhs_get_vbus,
66ee3bef
KM		 811 },
812 .driver_param = {
813 .buswait_bwait = 4,
f427eb64 814 .has_otg = 1,
66ee3bef
KM		 815 .pipe_type = usbhs1_pipe_cfg,
816 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
fe437561
KM		 817 .d0_tx_id = SHDMA_SLAVE_USB1_TX,
818 .d1_rx_id = SHDMA_SLAVE_USB1_RX,
66ee3bef
KM		 819 },
820 },
821};
822
823static struct resource usbhs1_resources[] = {
824 [0] = {
e2a53b7c
MD		 825 .name = "USBHS1",
826 .start = 0xe68b0000,
827 .end = 0xe68b00e6 - 1,
66ee3bef
KM		 828 .flags = IORESOURCE_MEM,
829 },
830 [1] = {
831 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
832 .flags = IORESOURCE_IRQ,
833 },
834};
835
836static struct platform_device usbhs1_device = {
837 .name = "renesas_usbhs",
838 .id = 1,
839 .dev = {
840 .platform_data = &usbhs1_private.info,
841 },
842 .num_resources = ARRAY_SIZE(usbhs1_resources),
843 .resource = usbhs1_resources,
844};
845
d44deb35
KM		 846/* LED */
847static struct gpio_led mackerel_leds[] = {
848 {
849 .name = "led0",
850 .gpio = GPIO_PORT0,
851 .default_state = LEDS_GPIO_DEFSTATE_ON,
852 },
853 {
854 .name = "led1",
855 .gpio = GPIO_PORT1,
856 .default_state = LEDS_GPIO_DEFSTATE_ON,
857 },
858 {
859 .name = "led2",
860 .gpio = GPIO_PORT2,
861 .default_state = LEDS_GPIO_DEFSTATE_ON,
862 },
863 {
864 .name = "led3",
865 .gpio = GPIO_PORT159,
866 .default_state = LEDS_GPIO_DEFSTATE_ON,
867 }
868};
869
870static struct gpio_led_platform_data mackerel_leds_pdata = {
871 .leds = mackerel_leds,
872 .num_leds = ARRAY_SIZE(mackerel_leds),
873};
874
875static struct platform_device leds_device = {
876 .name = "leds-gpio",
877 .id = 0,
878 .dev = {
879 .platform_data = &mackerel_leds_pdata,
880 },
881};
882
1a44d72a
KM		 883/* FSI */
884#define IRQ_FSI evt2irq(0x1840)
98d27b8a
KM		 885static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
886{
887 int ret;
888
889 if (rate <= 0)
890 return 0;
891
892 if (!enable) {
893 clk_disable(clk);
894 return 0;
895 }
896
897 ret = clk_set_rate(clk, clk_round_rate(clk, rate));
898 if (ret < 0)
899 return ret;
900
901 return clk_enable(clk);
902}
903
904static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
905{
906 struct clk *fsib_clk;
907 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
908 long fsib_rate = 0;
909 long fdiv_rate = 0;
910 int ackmd_bpfmd;
911 int ret;
912
913 /* FSIA is slave mode. nothing to do here */
914 if (is_porta)
915 return 0;
916
917 /* clock start */
918 switch (rate) {
919 case 44100:
920 fsib_rate = rate * 256;
921 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
922 break;
923 case 48000:
924 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
925 fdiv_rate = rate * 256;
926 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
927 break;
928 default:
929 pr_err("unsupported rate in FSI2 port B\n");
930 return -EINVAL;
931 }
932
933 /* FSI B setting */
934 fsib_clk = clk_get(dev, "ickb");
935 if (IS_ERR(fsib_clk))
936 return -EIO;
937
938 /* fsib */
939 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
940 if (ret < 0)
941 goto fsi_set_rate_end;
942
943 /* FSI DIV */
944 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
945 if (ret < 0) {
946 /* disable FSI B */
947 if (enable)
948 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
949 goto fsi_set_rate_end;
950 }
951
952 ret = ackmd_bpfmd;
953
954fsi_set_rate_end:
955 clk_put(fsib_clk);
956 return ret;
957}
958
1a44d72a 959static struct sh_fsi_platform_info fsi_info = {
f17c13ca 960 .porta_flags = SH_FSI_BRS_INV,
98d27b8a
KM		 961
962 .portb_flags = SH_FSI_BRS_INV |
963 SH_FSI_BRM_INV |
964 SH_FSI_LRS_INV |
f17c13ca 965 SH_FSI_FMT_SPDIF,
98d27b8a
KM		 966
967 .set_rate = fsi_set_rate,
1a44d72a
KM		 968};
969
970static struct resource fsi_resources[] = {
971 [0] = {
972 .name = "FSI",
973 .start = 0xFE3C0000,
974 .end = 0xFE3C0400 - 1,
975 .flags = IORESOURCE_MEM,
976 },
977 [1] = {
978 .start = IRQ_FSI,
979 .flags = IORESOURCE_IRQ,
980 },
981};
982
983static struct platform_device fsi_device = {
984 .name = "sh_fsi2",
985 .id = -1,
986 .num_resources = ARRAY_SIZE(fsi_resources),
987 .resource = fsi_resources,
988 .dev = {
989 .platform_data = &fsi_info,
990 },
991};
992
993static struct platform_device fsi_ak4643_device = {
994 .name = "sh_fsi2_a_ak4643",
995};
d44deb35 996
6dff7da2
YG		 997/*
998 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
999 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
1000 */
1001static int slot_cn7_get_cd(struct platform_device *pdev)
1002{
ceb50f33 1003 return !gpio_get_value(GPIO_PORT41);
6dff7da2
YG		 1004}
1005
1006/* SDHI0 */
4bff4a7e
GL		 1007static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
1008{
1009 struct device *dev = arg;
1010 struct sh_mobile_sdhi_info *info = dev->platform_data;
1011 struct tmio_mmc_data *pdata = info->pdata;
1012
1013 tmio_mmc_cd_wakeup(pdata);
1014
1015 return IRQ_HANDLED;
1016}
1017
6dff7da2
YG		 1018static struct sh_mobile_sdhi_info sdhi0_info = {
1019 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1020 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
da97da73 1021 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
6dff7da2
YG		 1022};
1023
1024static struct resource sdhi0_resources[] = {
1025 [0] = {
1026 .name = "SDHI0",
1027 .start = 0xe6850000,
31d31fe7 1028 .end = 0xe68500ff,
6dff7da2
YG		 1029 .flags = IORESOURCE_MEM,
1030 },
1031 [1] = {
2007aea1
SH		 1032 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
1033 .flags = IORESOURCE_IRQ,
1034 },
1035 [2] = {
1036 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
1037 .flags = IORESOURCE_IRQ,
1038 },
1039 [3] = {
1040 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
6dff7da2
YG		 1041 .flags = IORESOURCE_IRQ,
1042 },
1043};
1044
1045static struct platform_device sdhi0_device = {
1046 .name = "sh_mobile_sdhi",
1047 .num_resources = ARRAY_SIZE(sdhi0_resources),
1048 .resource = sdhi0_resources,
1049 .id = 0,
1050 .dev = {
1051 .platform_data = &sdhi0_info,
1052 },
1053};
1054
5bcd7517 1055#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG		 1056/* SDHI1 */
1057static struct sh_mobile_sdhi_info sdhi1_info = {
1058 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
1059 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
1060 .tmio_ocr_mask = MMC_VDD_165_195,
1061 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1062 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2
YG		 1063 MMC_CAP_NEEDS_POLL,
1064 .get_cd = slot_cn7_get_cd,
1065};
1066
1067static struct resource sdhi1_resources[] = {
1068 [0] = {
1069 .name = "SDHI1",
1070 .start = 0xe6860000,
31d31fe7 1071 .end = 0xe68600ff,
6dff7da2
YG		 1072 .flags = IORESOURCE_MEM,
1073 },
1074 [1] = {
cb2ccc32 1075 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH		 1076 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
1077 .flags = IORESOURCE_IRQ,
1078 },
1079 [2] = {
cb2ccc32 1080 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH		 1081 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
1082 .flags = IORESOURCE_IRQ,
1083 },
1084 [3] = {
cb2ccc32 1085 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1086 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
6dff7da2
YG		 1087 .flags = IORESOURCE_IRQ,
1088 },
1089};
1090
1091static struct platform_device sdhi1_device = {
1092 .name = "sh_mobile_sdhi",
1093 .num_resources = ARRAY_SIZE(sdhi1_resources),
1094 .resource = sdhi1_resources,
1095 .id = 1,
1096 .dev = {
1097 .platform_data = &sdhi1_info,
1098 },
1099};
41491b9a 1100#endif
6dff7da2 1101
da5d1f4c
YG		 1102/*
1103 * The card detect pin of the top SD/MMC slot (CN23) is active low and is
1104 * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
1105 */
1106static int slot_cn23_get_cd(struct platform_device *pdev)
1107{
1108 return !gpio_get_value(GPIO_PORT162);
1109}
1110
6dff7da2
YG		 1111/* SDHI2 */
1112static struct sh_mobile_sdhi_info sdhi2_info = {
1113 .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
1114 .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
1115 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1116 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2 1117 MMC_CAP_NEEDS_POLL,
da5d1f4c 1118 .get_cd = slot_cn23_get_cd,
6dff7da2
YG		 1119};
1120
1121static struct resource sdhi2_resources[] = {
1122 [0] = {
1123 .name = "SDHI2",
1124 .start = 0xe6870000,
31d31fe7 1125 .end = 0xe68700ff,
6dff7da2
YG		 1126 .flags = IORESOURCE_MEM,
1127 },
1128 [1] = {
cb2ccc32 1129 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH		 1130 .start = evt2irq(0x1200), /* SDHI2_SDHI2I0 */
1131 .flags = IORESOURCE_IRQ,
1132 },
1133 [2] = {
cb2ccc32 1134 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH		 1135 .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
1136 .flags = IORESOURCE_IRQ,
1137 },
1138 [3] = {
cb2ccc32 1139 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1140 .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
6dff7da2
YG		 1141 .flags = IORESOURCE_IRQ,
1142 },
1143};
1144
1145static struct platform_device sdhi2_device = {
1146 .name = "sh_mobile_sdhi",
1147 .num_resources = ARRAY_SIZE(sdhi2_resources),
1148 .resource = sdhi2_resources,
1149 .id = 2,
1150 .dev = {
1151 .platform_data = &sdhi2_info,
1152 },
1153};
1154
41491b9a
YG		 1155/* SH_MMCIF */
1156static struct resource sh_mmcif_resources[] = {
1157 [0] = {
1158 .name = "MMCIF",
1159 .start = 0xE6BD0000,
1160 .end = 0xE6BD00FF,
1161 .flags = IORESOURCE_MEM,
1162 },
1163 [1] = {
1164 /* MMC ERR */
1165 .start = evt2irq(0x1ac0),
1166 .flags = IORESOURCE_IRQ,
1167 },
1168 [2] = {
1169 /* MMC NOR */
1170 .start = evt2irq(0x1ae0),
1171 .flags = IORESOURCE_IRQ,
1172 },
1173};
1174
fe78e68a
GL		 1175static struct sh_mmcif_dma sh_mmcif_dma = {
1176 .chan_priv_rx = {
1177 .slave_id = SHDMA_SLAVE_MMCIF_RX,
1178 },
1179 .chan_priv_tx = {
1180 .slave_id = SHDMA_SLAVE_MMCIF_TX,
1181 },
1182};
1183
41491b9a
YG		 1184static struct sh_mmcif_plat_data sh_mmcif_plat = {
1185 .sup_pclk = 0,
1186 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
1187 .caps = MMC_CAP_4_BIT_DATA |
1188 MMC_CAP_8_BIT_DATA |
1189 MMC_CAP_NEEDS_POLL,
1190 .get_cd = slot_cn7_get_cd,
fe78e68a 1191 .dma = &sh_mmcif_dma,
41491b9a
YG		 1192};
1193
1194static struct platform_device sh_mmcif_device = {
1195 .name = "sh_mmcif",
1196 .id = 0,
1197 .dev = {
1198 .dma_mask = NULL,
1199 .coherent_dma_mask = 0xffffffff,
1200 .platform_data = &sh_mmcif_plat,
1201 },
1202 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
1203 .resource = sh_mmcif_resources,
1204};
1205
ae37c8de 1206
7dfff953
GL		 1207static int mackerel_camera_add(struct soc_camera_device *icd);
1208static void mackerel_camera_del(struct soc_camera_device *icd);
ae37c8de
MD		 1209
1210static int camera_set_capture(struct soc_camera_platform_info *info,
1211 int enable)
1212{
1213 return 0; /* camera sensor always enabled */
1214}
1215
1216static struct soc_camera_platform_info camera_info = {
1217 .format_name = "UYVY",
1218 .format_depth = 16,
1219 .format = {
1220 .code = V4L2_MBUS_FMT_UYVY8_2X8,
1221 .colorspace = V4L2_COLORSPACE_SMPTE170M,
1222 .field = V4L2_FIELD_NONE,
1223 .width = 640,
1224 .height = 480,
1225 },
d1e87ed7
GL		 1226 .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
1227 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
1228 V4L2_MBUS_DATA_ACTIVE_HIGH,
1229 .mbus_type = V4L2_MBUS_PARALLEL,
ae37c8de
MD		 1230 .set_capture = camera_set_capture,
1231};
1232
1233static struct soc_camera_link camera_link = {
1234 .bus_id = 0,
1235 .add_device = mackerel_camera_add,
1236 .del_device = mackerel_camera_del,
1237 .module_name = "soc_camera_platform",
1238 .priv = &camera_info,
1239};
1240
86a73144
GL		 1241static struct platform_device *camera_device;
1242
1243static void mackerel_camera_release(struct device *dev)
ae37c8de 1244{
86a73144 1245 soc_camera_platform_release(&camera_device);
ae37c8de
MD		 1246}
1247
7dfff953 1248static int mackerel_camera_add(struct soc_camera_device *icd)
ae37c8de 1249{
7dfff953 1250 return soc_camera_platform_add(icd, &camera_device, &camera_link,
86a73144 1251 mackerel_camera_release, 0);
ae37c8de
MD		 1252}
1253
7dfff953 1254static void mackerel_camera_del(struct soc_camera_device *icd)
ae37c8de 1255{
7dfff953 1256 soc_camera_platform_del(icd, camera_device, &camera_link);
ae37c8de
MD		 1257}
1258
1259static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1260 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1261};
1262
1263static struct resource ceu_resources[] = {
1264 [0] = {
1265 .name = "CEU",
1266 .start = 0xfe910000,
1267 .end = 0xfe91009f,
1268 .flags = IORESOURCE_MEM,
1269 },
1270 [1] = {
1271 .start = intcs_evt2irq(0x880),
1272 .flags = IORESOURCE_IRQ,
1273 },
1274 [2] = {
1275 /* place holder for contiguous memory */
1276 },
1277};
1278
1279static struct platform_device ceu_device = {
1280 .name = "sh_mobile_ceu",
1281 .id = 0, /* "ceu0" clock */
1282 .num_resources = ARRAY_SIZE(ceu_resources),
1283 .resource = ceu_resources,
1284 .dev = {
05a5f01c
GL		 1285 .platform_data = &sh_mobile_ceu_info,
1286 .coherent_dma_mask = 0xffffffff,
ae37c8de
MD		 1287 },
1288};
1289
1290static struct platform_device mackerel_camera = {
1291 .name = "soc-camera-pdrv",
1292 .id = 0,
1293 .dev = {
1294 .platform_data = &camera_link,
1295 },
1296};
1297
920adc75
KM		 1298static struct platform_device *mackerel_devices[] __initdata = {
1299 &nor_flash_device,
2264c151 1300 &smc911x_device,
11fee467 1301 &lcdc_device,
25338f2e 1302 &usb1_host_device,
66ee3bef 1303 &usbhs1_device,
5a568552 1304 &usbhs0_device,
d44deb35 1305 &leds_device,
1a44d72a
KM		 1306 &fsi_device,
1307 &fsi_ak4643_device,
3f25c9cc 1308 &fsi_hdmi_device,
6dff7da2 1309 &sdhi0_device,
5bcd7517 1310#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2 1311 &sdhi1_device,
41491b9a 1312#endif
6dff7da2 1313 &sdhi2_device,
41491b9a 1314 &sh_mmcif_device,
ae37c8de
MD		 1315 &ceu_device,
1316 &mackerel_camera,
12c4309b
KM		 1317 &hdmi_lcdc_device,
1318 &hdmi_device,
1c7fcbed 1319 &meram_device,
1a44d72a
KM		 1320};
1321
cd8ab004
TS		 1322/* Keypad Initialization */
1323#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
1324{ \
1325 .type = ev_type, \
1326 .code = ev_code, \
1327 .active_low = act_low, \
1328}
1329
1330#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
1331
1332static struct tca6416_button mackerel_gpio_keys[] = {
1333 KEYPAD_BUTTON_LOW(KEY_HOME),
1334 KEYPAD_BUTTON_LOW(KEY_MENU),
1335 KEYPAD_BUTTON_LOW(KEY_BACK),
1336 KEYPAD_BUTTON_LOW(KEY_POWER),
1337};
1338
1339static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
1340 .buttons = mackerel_gpio_keys,
1341 .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
1342 .rep = 1,
1343 .use_polling = 0,
1344 .pinmask = 0x000F,
1345};
1346
1a44d72a 1347/* I2C */
6ae1e19d 1348#define IRQ7 evt2irq(0x02e0)
cd8ab004
TS		 1349#define IRQ9 evt2irq(0x0320)
1350
1a44d72a
KM		 1351static struct i2c_board_info i2c0_devices[] = {
1352 {
1353 I2C_BOARD_INFO("ak4643", 0x13),
1354 },
cd8ab004
TS		 1355 /* Keypad */
1356 {
1357 I2C_BOARD_INFO("tca6408-keys", 0x20),
1358 .platform_data = &mackerel_tca6416_keys_info,
1359 .irq = IRQ9,
1360 },
6ae1e19d
TS		 1361 /* Touchscreen */
1362 {
1363 I2C_BOARD_INFO("st1232-ts", 0x55),
1364 .irq = IRQ7,
1365 },
920adc75
KM		 1366};
1367
80f1dc7c
TS		 1368#define IRQ21 evt2irq(0x32a0)
1369
1370static struct i2c_board_info i2c1_devices[] = {
1371 /* Accelerometer */
1372 {
1373 I2C_BOARD_INFO("adxl34x", 0x53),
1374 .irq = IRQ21,
1375 },
1376};
1377
920adc75
KM		 1378static struct map_desc mackerel_io_desc[] __initdata = {
1379 /* create a 1:1 entity map for 0xe6xxxxxx
1380 * used by CPGA, INTC and PFC.
1381 */
1382 {
1383 .virtual = 0xe6000000,
1384 .pfn = __phys_to_pfn(0xe6000000),
1385 .length = 256 << 20,
1386 .type = MT_DEVICE_NONSHARED
1387 },
1388};
1389
1390static void __init mackerel_map_io(void)
1391{
1392 iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc));
9b742024
JM		 1393 /* DMA memory at 0xf6000000 - 0xffdfffff */
1394 init_consistent_dma_size(158 << 20);
920adc75
KM		 1395
1396 /* setup early devices and console here as well */
1397 sh7372_add_early_devices();
1398 shmobile_setup_console();
1399}
1400
1a44d72a
KM		 1401#define GPIO_PORT9CR 0xE6051009
1402#define GPIO_PORT10CR 0xE605100A
e2a53b7c 1403#define GPIO_PORT167CR 0xE60520A7
66ee3bef 1404#define GPIO_PORT168CR 0xE60520A8
12c4309b 1405#define SRCR4 0xe61580bc
98d27b8a 1406#define USCCR1 0xE6058144
920adc75
KM		 1407static void __init mackerel_init(void)
1408{
12c4309b 1409 u32 srcr4;
98d27b8a 1410 struct clk *clk;
4bff4a7e 1411 int ret;
12c4309b 1412
920adc75
KM		 1413 sh7372_pinmux_init();
1414
1415 /* enable SCIFA0 */
1416 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1417 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1418
2264c151
KM		 1419 /* enable SMSC911X */
1420 gpio_request(GPIO_FN_CS5A, NULL);
1421 gpio_request(GPIO_FN_IRQ6_39, NULL);
1422
11fee467 1423 /* LCDC */
eb87e677
KM		 1424 gpio_request(GPIO_FN_LCDD23, NULL);
1425 gpio_request(GPIO_FN_LCDD22, NULL);
1426 gpio_request(GPIO_FN_LCDD21, NULL);
1427 gpio_request(GPIO_FN_LCDD20, NULL);
1428 gpio_request(GPIO_FN_LCDD19, NULL);
1429 gpio_request(GPIO_FN_LCDD18, NULL);
11fee467
KM		 1430 gpio_request(GPIO_FN_LCDD17, NULL);
1431 gpio_request(GPIO_FN_LCDD16, NULL);
1432 gpio_request(GPIO_FN_LCDD15, NULL);
1433 gpio_request(GPIO_FN_LCDD14, NULL);
1434 gpio_request(GPIO_FN_LCDD13, NULL);
1435 gpio_request(GPIO_FN_LCDD12, NULL);
1436 gpio_request(GPIO_FN_LCDD11, NULL);
1437 gpio_request(GPIO_FN_LCDD10, NULL);
1438 gpio_request(GPIO_FN_LCDD9, NULL);
1439 gpio_request(GPIO_FN_LCDD8, NULL);
1440 gpio_request(GPIO_FN_LCDD7, NULL);
1441 gpio_request(GPIO_FN_LCDD6, NULL);
1442 gpio_request(GPIO_FN_LCDD5, NULL);
1443 gpio_request(GPIO_FN_LCDD4, NULL);
1444 gpio_request(GPIO_FN_LCDD3, NULL);
1445 gpio_request(GPIO_FN_LCDD2, NULL);
1446 gpio_request(GPIO_FN_LCDD1, NULL);
1447 gpio_request(GPIO_FN_LCDD0, NULL);
1448 gpio_request(GPIO_FN_LCDDISP, NULL);
1449 gpio_request(GPIO_FN_LCDDCK, NULL);
1450
1451 gpio_request(GPIO_PORT31, NULL); /* backlight */
1fbdfcde 1452 gpio_direction_output(GPIO_PORT31, 0); /* off by default */
11fee467
KM		 1453
1454 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1455 gpio_direction_output(GPIO_PORT151, 1);
1456
e2a53b7c
MD		 1457 /* USBHS0 */
1458 gpio_request(GPIO_FN_VBUS0_0, NULL);
1459 gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */
1460
1461 /* USBHS1 */
1462 gpio_request(GPIO_FN_VBUS0_1, NULL);
1463 gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
1464 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1465
1466 /* USB phy tweak to make the r8a66597_hcd host driver work */
1467 __raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */
25338f2e 1468
1a44d72a
KM		 1469 /* enable FSI2 port A (ak4643) */
1470 gpio_request(GPIO_FN_FSIAIBT, NULL);
1471 gpio_request(GPIO_FN_FSIAILR, NULL);
1472 gpio_request(GPIO_FN_FSIAISLD, NULL);
1473 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1474 gpio_request(GPIO_PORT161, NULL);
1475 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1476
1477 gpio_request(GPIO_PORT9, NULL);
1478 gpio_request(GPIO_PORT10, NULL);
1479 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1480 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1481
1482 intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
1483
98d27b8a
KM		 1484 /* setup FSI2 port B (HDMI) */
1485 gpio_request(GPIO_FN_FSIBCK, NULL);
1486 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1487
1488 /* set SPU2 clock to 119.6 MHz */
1489 clk = clk_get(NULL, "spu_clk");
1490 if (!IS_ERR(clk)) {
1491 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1492 clk_put(clk);
1493 }
1494
cd8ab004
TS		 1495 /* enable Keypad */
1496 gpio_request(GPIO_FN_IRQ9_42, NULL);
6845664a 1497 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
cd8ab004 1498
6ae1e19d
TS		 1499 /* enable Touchscreen */
1500 gpio_request(GPIO_FN_IRQ7_40, NULL);
6845664a 1501 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
6ae1e19d 1502
80f1dc7c
TS		 1503 /* enable Accelerometer */
1504 gpio_request(GPIO_FN_IRQ21, NULL);
6845664a 1505 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1a44d72a 1506
6dff7da2
YG		 1507 /* enable SDHI0 */
1508 gpio_request(GPIO_FN_SDHICD0, NULL);
1509 gpio_request(GPIO_FN_SDHIWP0, NULL);
1510 gpio_request(GPIO_FN_SDHICMD0, NULL);
1511 gpio_request(GPIO_FN_SDHICLK0, NULL);
1512 gpio_request(GPIO_FN_SDHID0_3, NULL);
1513 gpio_request(GPIO_FN_SDHID0_2, NULL);
1514 gpio_request(GPIO_FN_SDHID0_1, NULL);
1515 gpio_request(GPIO_FN_SDHID0_0, NULL);
1516
4bff4a7e
GL		 1517 ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
1518 IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
1519 if (!ret)
1520 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
1521 else
1522 pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
1523
5bcd7517 1524#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG		 1525 /* enable SDHI1 */
1526 gpio_request(GPIO_FN_SDHICMD1, NULL);
1527 gpio_request(GPIO_FN_SDHICLK1, NULL);
1528 gpio_request(GPIO_FN_SDHID1_3, NULL);
1529 gpio_request(GPIO_FN_SDHID1_2, NULL);
1530 gpio_request(GPIO_FN_SDHID1_1, NULL);
1531 gpio_request(GPIO_FN_SDHID1_0, NULL);
41491b9a 1532#endif
6dff7da2
YG		 1533 /* card detect pin for MMC slot (CN7) */
1534 gpio_request(GPIO_PORT41, NULL);
1535 gpio_direction_input(GPIO_PORT41);
1536
1537 /* enable SDHI2 */
1538 gpio_request(GPIO_FN_SDHICMD2, NULL);
1539 gpio_request(GPIO_FN_SDHICLK2, NULL);
1540 gpio_request(GPIO_FN_SDHID2_3, NULL);
1541 gpio_request(GPIO_FN_SDHID2_2, NULL);
1542 gpio_request(GPIO_FN_SDHID2_1, NULL);
1543 gpio_request(GPIO_FN_SDHID2_0, NULL);
1544
da5d1f4c
YG		 1545 /* card detect pin for microSD slot (CN23) */
1546 gpio_request(GPIO_PORT162, NULL);
1547 gpio_direction_input(GPIO_PORT162);
1548
41491b9a
YG		 1549 /* MMCIF */
1550 gpio_request(GPIO_FN_MMCD0_0, NULL);
1551 gpio_request(GPIO_FN_MMCD0_1, NULL);
1552 gpio_request(GPIO_FN_MMCD0_2, NULL);
1553 gpio_request(GPIO_FN_MMCD0_3, NULL);
1554 gpio_request(GPIO_FN_MMCD0_4, NULL);
1555 gpio_request(GPIO_FN_MMCD0_5, NULL);
1556 gpio_request(GPIO_FN_MMCD0_6, NULL);
1557 gpio_request(GPIO_FN_MMCD0_7, NULL);
1558 gpio_request(GPIO_FN_MMCCMD0, NULL);
1559 gpio_request(GPIO_FN_MMCCLK0, NULL);
1560
56e78daf
YG		 1561 /* enable GPS module (GT-720F) */
1562 gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
1563 gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
1564
ae37c8de
MD		 1565 /* CEU */
1566 gpio_request(GPIO_FN_VIO_CLK, NULL);
1567 gpio_request(GPIO_FN_VIO_VD, NULL);
1568 gpio_request(GPIO_FN_VIO_HD, NULL);
1569 gpio_request(GPIO_FN_VIO_FIELD, NULL);
1570 gpio_request(GPIO_FN_VIO_CKO, NULL);
1571 gpio_request(GPIO_FN_VIO_D7, NULL);
1572 gpio_request(GPIO_FN_VIO_D6, NULL);
1573 gpio_request(GPIO_FN_VIO_D5, NULL);
1574 gpio_request(GPIO_FN_VIO_D4, NULL);
1575 gpio_request(GPIO_FN_VIO_D3, NULL);
1576 gpio_request(GPIO_FN_VIO_D2, NULL);
1577 gpio_request(GPIO_FN_VIO_D1, NULL);
1578 gpio_request(GPIO_FN_VIO_D0, NULL);
1579
12c4309b
KM		 1580 /* HDMI */
1581 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1582 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1583
1584 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1585 srcr4 = __raw_readl(SRCR4);
1586 __raw_writel(srcr4 | (1 << 13), SRCR4);
1587 udelay(50);
1588 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1589
1a44d72a
KM		 1590 i2c_register_board_info(0, i2c0_devices,
1591 ARRAY_SIZE(i2c0_devices));
80f1dc7c
TS		 1592 i2c_register_board_info(1, i2c1_devices,
1593 ARRAY_SIZE(i2c1_devices));
11fee467 1594
920adc75
KM		 1595 sh7372_add_standard_devices();
1596
1597 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
2ce51f8b 1598
e3e01091
RW		 1599 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1600 sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device);
91142bfe 1601 sh7372_add_device_to_domain(&sh7372_a4lc, &meram_device);
c1ba5bb5 1602 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
d93f5cde
MD		 1603 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
1604 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
1605 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
1606 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
1607#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1608 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
1609#endif
1610 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device);
382414b9 1611 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
e3e01091 1612
2ce51f8b 1613 hdmi_init_pm_clock();
97991657 1614 sh7372_pm_init();
a41b6466 1615 pm_clk_add(&fsi_device.dev, "spu2");
5c3f96b2 1616 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
920adc75
KM		 1617}
1618
1619static void __init mackerel_timer_init(void)
1620{
1621 sh7372_clock_init();
1622 shmobile_timer.init();
12c4309b
KM		 1623
1624 /* External clock source */
1625 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
920adc75
KM		 1626}
1627
1628static struct sys_timer mackerel_timer = {
1629 .init = mackerel_timer_init,
1630};
1631
1632MACHINE_START(MACKEREL, "mackerel")
1633 .map_io = mackerel_map_io,
1634 .init_irq = sh7372_init_irq,
863b1719 1635 .handle_irq = shmobile_handle_irq_intc,
920adc75
KM		 1636 .init_machine = mackerel_init,
1637 .timer = &mackerel_timer,
1638MACHINE_END
kernel source for telekom puls (alcatel/mediatek)