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Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-shmobile / board-mackerel.c
CommitLineData
920adc75
KM		 1/*
2 * mackerel board support
3 *
4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on ap4evb
8 * Copyright (C) 2010 Magnus Damm
9 * Copyright (C) 2008 Yoshihiro Shimoda
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 */
12c4309b 24#include <linux/delay.h>
920adc75
KM		 25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/platform_device.h>
30#include <linux/gpio.h>
31#include <linux/input.h>
32#include <linux/io.h>
1a44d72a 33#include <linux/i2c.h>
d44deb35 34#include <linux/leds.h>
6dff7da2
YG		 35#include <linux/mfd/tmio.h>
36#include <linux/mmc/host.h>
41491b9a 37#include <linux/mmc/sh_mmcif.h>
17e75d82 38#include <linux/mmc/sh_mobile_sdhi.h>
920adc75
KM		 39#include <linux/mtd/mtd.h>
40#include <linux/mtd/partitions.h>
41#include <linux/mtd/physmap.h>
b5e8d269 42#include <linux/pm_clock.h>
2264c151 43#include <linux/smsc911x.h>
1a44d72a 44#include <linux/sh_intc.h>
cd8ab004 45#include <linux/tca6416_keypad.h>
25338f2e 46#include <linux/usb/r8a66597.h>
66ee3bef 47#include <linux/usb/renesas_usbhs.h>
920adc75 48
12c4309b 49#include <video/sh_mobile_hdmi.h>
11fee467 50#include <video/sh_mobile_lcdc.h>
ae37c8de
MD		 51#include <media/sh_mobile_ceu.h>
52#include <media/soc_camera.h>
53#include <media/soc_camera_platform.h>
1a44d72a
KM		 54#include <sound/sh_fsi.h>
55
920adc75
KM		 56#include <mach/common.h>
57#include <mach/sh7372.h>
58
59#include <asm/mach/arch.h>
60#include <asm/mach/time.h>
61#include <asm/mach/map.h>
62#include <asm/mach-types.h>
63
64/*
65 * Address Interface BusWidth note
66 * ------------------------------------------------------------------
67 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
68 * 0x0800_0000 user area -
69 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
70 * 0x1400_0000 Ether (LAN9220) 16bit
71 * 0x1600_0000 user area - cannot use with NAND
72 * 0x1800_0000 user area -
73 * 0x1A00_0000 -
74 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
75 */
76
4b82b689
KM		 77/*
78 * CPU mode
79 *
80 * SW4 | Boot Area| Master | Remarks
81 * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
82 * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
83 * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
84 * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
85 * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
86 * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
87 * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
88 * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
89 * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
90 * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
91*/
92
93/*
94 * NOR Flash ROM
95 *
96 * SW1 | SW2 | SW7 | NOR Flash ROM
97 * bit1 | bit1 bit2 | bit1 | Memory allocation
98 * ------+------------+------+------------------
99 * OFF | ON OFF | ON | Area 0
100 * OFF | ON OFF | OFF | Area 4
101 */
102
103/*
104 * SMSC 9220
105 *
106 * SW1 SMSC 9220
107 * -----------------------
108 * ON access disable
109 * OFF access enable
110 */
111
112/*
113 * NAND Flash ROM
114 *
115 * SW1 | SW2 | SW7 | NAND Flash ROM
116 * bit1 | bit1 bit2 | bit2 | Memory allocation
117 * ------+------------+------+------------------
118 * OFF | ON OFF | ON | FCE 0
119 * OFF | ON OFF | OFF | FCE 1
120 */
121
122/*
123 * External interrupt pin settings
124 *
125 * IRQX | pin setting | device | level
126 * ------+--------------------+--------------------+-------
127 * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
128 * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
e2a53b7c 129 * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
4b82b689
KM		 130 * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
131 * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
132 * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
133 * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
25338f2e 134 */
4b82b689 135
25338f2e
KM		 136/*
137 * USB
138 *
139 * USB0 : CN22 : Function
140 * USB1 : CN31 : Function/Host *1
141 *
142 * J30 (for CN31) *1
143 * ----------+---------------+-------------
144 * 1-2 short | VBUS 5V | Host
145 * open | external VBUS | Function
146 *
147 * *1
66ee3bef
KM		 148 * CN31 is used as
149 * CONFIG_USB_R8A66597_HCD Host
150 * CONFIG_USB_RENESAS_USBHS Function
151 *
152 * CAUTION
153 *
154 * renesas_usbhs driver can use external interrupt mode
155 * (which come from USB-PHY) or autonomy mode (it use own interrupt)
156 * for detecting connection/disconnection when Function.
157 * USB will be power OFF while it has been disconnecting
158 * if external interrupt mode, and it is always power ON if autonomy mode,
159 *
160 * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
161 * because Touchscreen is using IRQ7-PORT40.
162 * It is impossible to use IRQ7 demux on this board.
163 *
164 * We can use external interrupt mode USB-Function on "USB1".
165 * USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
166 * But don't select both drivers in same time.
167 * These uses same IRQ number for request_irq(), and aren't supporting
e2a53b7c 168 * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
66ee3bef
KM		 169 *
170 * Actually these are old/new version of USB driver.
e2a53b7c 171 * This mean its register will be broken if it supports shared IRQ,
25338f2e 172 */
4b82b689 173
6dff7da2
YG		 174/*
175 * SDHI0 (CN12)
176 *
177 * SW56 : OFF
178 *
179 */
180
181/* MMC /SDHI1 (CN7)
182 *
183 * I/O voltage : 1.8v
184 *
185 * Power voltage : 1.8v or 3.3v
41491b9a 186 * J22 : select power voltage *1
6dff7da2
YG		 187 * 1-2 pin : 1.8v
188 * 2-3 pin : 3.3v
189 *
41491b9a
YG		 190 * *1
191 * Please change J22 depends the card to be used.
192 * MMC's OCR field set to support either voltage for the card inserted.
193 *
6dff7da2
YG		 194 * SW1 | SW33
195 * | bit1 | bit2 | bit3 | bit4
196 * -------------+------+------+------+-------
2150dace
SH		 197 * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
198 * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
6dff7da2
YG		 199 *
200 */
201
202/*
203 * SDHI2 (CN23)
204 *
205 * microSD card sloct
206 *
207 */
208
1a44d72a
KM		 209/*
210 * FIXME !!
211 *
212 * gpio_no_direction
66ee3bef 213 * gpio_pull_down
1a44d72a
KM		 214 * are quick_hack.
215 *
216 * current gpio frame work doesn't have
217 * the method to control only pull up/down/free.
218 * this function should be replaced by correct gpio function
219 */
220static void __init gpio_no_direction(u32 addr)
221{
222 __raw_writeb(0x00, addr);
223}
224
66ee3bef
KM		 225static void __init gpio_pull_down(u32 addr)
226{
227 u8 data = __raw_readb(addr);
228
229 data &= 0x0F;
230 data |= 0xA0;
231
232 __raw_writeb(data, addr);
233}
234
920adc75
KM		 235/* MTD */
236static struct mtd_partition nor_flash_partitions[] = {
237 {
238 .name = "loader",
239 .offset = 0x00000000,
240 .size = 512 * 1024,
241 .mask_flags = MTD_WRITEABLE,
242 },
243 {
244 .name = "bootenv",
245 .offset = MTDPART_OFS_APPEND,
246 .size = 512 * 1024,
247 .mask_flags = MTD_WRITEABLE,
248 },
249 {
250 .name = "kernel_ro",
251 .offset = MTDPART_OFS_APPEND,
252 .size = 8 * 1024 * 1024,
253 .mask_flags = MTD_WRITEABLE,
254 },
255 {
256 .name = "kernel",
257 .offset = MTDPART_OFS_APPEND,
258 .size = 8 * 1024 * 1024,
259 },
260 {
261 .name = "data",
262 .offset = MTDPART_OFS_APPEND,
263 .size = MTDPART_SIZ_FULL,
264 },
265};
266
267static struct physmap_flash_data nor_flash_data = {
268 .width = 2,
269 .parts = nor_flash_partitions,
270 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
271};
272
273static struct resource nor_flash_resources[] = {
274 [0] = {
275 .start = 0x00000000,
276 .end = 0x08000000 - 1,
277 .flags = IORESOURCE_MEM,
278 }
279};
280
281static struct platform_device nor_flash_device = {
282 .name = "physmap-flash",
283 .dev = {
284 .platform_data = &nor_flash_data,
285 },
286 .num_resources = ARRAY_SIZE(nor_flash_resources),
287 .resource = nor_flash_resources,
288};
289
2264c151
KM		 290/* SMSC */
291static struct resource smc911x_resources[] = {
292 {
293 .start = 0x14000000,
294 .end = 0x16000000 - 1,
295 .flags = IORESOURCE_MEM,
296 }, {
297 .start = evt2irq(0x02c0) /* IRQ6A */,
298 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
299 },
300};
301
302static struct smsc911x_platform_config smsc911x_info = {
303 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
304 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
305 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
306};
307
308static struct platform_device smc911x_device = {
309 .name = "smsc911x",
310 .id = -1,
311 .num_resources = ARRAY_SIZE(smc911x_resources),
312 .resource = smc911x_resources,
313 .dev = {
314 .platform_data = &smsc911x_info,
315 },
316};
317
1c7fcbed
DHG		 318/* MERAM */
319static struct sh_mobile_meram_info mackerel_meram_info = {
320 .addr_mode = SH_MOBILE_MERAM_MODE1,
321};
322
323static struct resource meram_resources[] = {
324 [0] = {
325 .name = "MERAM",
326 .start = 0xe8000000,
327 .end = 0xe81fffff,
328 .flags = IORESOURCE_MEM,
329 },
330};
331
332static struct platform_device meram_device = {
333 .name = "sh_mobile_meram",
334 .id = 0,
335 .num_resources = ARRAY_SIZE(meram_resources),
336 .resource = meram_resources,
337 .dev = {
338 .platform_data = &mackerel_meram_info,
339 },
340};
341
11fee467
KM		 342/* LCDC */
343static struct fb_videomode mackerel_lcdc_modes[] = {
344 {
345 .name = "WVGA Panel",
346 .xres = 800,
347 .yres = 480,
348 .left_margin = 220,
349 .right_margin = 110,
350 .hsync_len = 70,
351 .upper_margin = 20,
352 .lower_margin = 5,
353 .vsync_len = 5,
354 .sync = 0,
355 },
356};
357
1fbdfcde
MD		 358static int mackerel_set_brightness(void *board_data, int brightness)
359{
360 gpio_set_value(GPIO_PORT31, brightness);
361
362 return 0;
363}
364
365static int mackerel_get_brightness(void *board_data)
366{
367 return gpio_get_value(GPIO_PORT31);
368}
369
1c7fcbed
DHG		 370static struct sh_mobile_meram_cfg lcd_meram_cfg = {
371 .icb[0] = {
372 .marker_icb = 28,
373 .cache_icb = 24,
374 .meram_offset = 0x0,
375 .meram_size = 0x40,
376 },
377 .icb[1] = {
378 .marker_icb = 29,
379 .cache_icb = 25,
380 .meram_offset = 0x40,
381 .meram_size = 0x40,
382 },
383};
384
11fee467 385static struct sh_mobile_lcdc_info lcdc_info = {
1c7fcbed 386 .meram_dev = &mackerel_meram_info,
11fee467
KM		 387 .clock_source = LCDC_CLK_BUS,
388 .ch[0] = {
389 .chan = LCDC_CHAN_MAINLCD,
390 .bpp = 16,
391 .lcd_cfg = mackerel_lcdc_modes,
392 .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
393 .interface_type = RGB24,
2c34e939 394 .clock_divider = 3,
11fee467
KM		 395 .flags = 0,
396 .lcd_size_cfg.width = 152,
397 .lcd_size_cfg.height = 91,
1fbdfcde
MD		 398 .board_cfg = {
399 .set_brightness = mackerel_set_brightness,
400 .get_brightness = mackerel_get_brightness,
401 },
402 .bl_info = {
403 .name = "sh_mobile_lcdc_bl",
404 .max_brightness = 1,
405 },
1c7fcbed 406 .meram_cfg = &lcd_meram_cfg,
11fee467
KM		 407 }
408};
409
410static struct resource lcdc_resources[] = {
411 [0] = {
412 .name = "LCDC",
413 .start = 0xfe940000,
414 .end = 0xfe943fff,
415 .flags = IORESOURCE_MEM,
416 },
417 [1] = {
418 .start = intcs_evt2irq(0x580),
419 .flags = IORESOURCE_IRQ,
420 },
421};
422
423static struct platform_device lcdc_device = {
424 .name = "sh_mobile_lcdc_fb",
425 .num_resources = ARRAY_SIZE(lcdc_resources),
426 .resource = lcdc_resources,
427 .dev = {
428 .platform_data = &lcdc_info,
429 .coherent_dma_mask = ~0,
430 },
431};
432
1c7fcbed
DHG		 433static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
434 .icb[0] = {
435 .marker_icb = 30,
436 .cache_icb = 26,
437 .meram_offset = 0x80,
438 .meram_size = 0x100,
439 },
440 .icb[1] = {
441 .marker_icb = 31,
442 .cache_icb = 27,
443 .meram_offset = 0x180,
444 .meram_size = 0x100,
445 },
446};
12c4309b
KM		 447/* HDMI */
448static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
1c7fcbed 449 .meram_dev = &mackerel_meram_info,
12c4309b
KM		 450 .clock_source = LCDC_CLK_EXTERNAL,
451 .ch[0] = {
452 .chan = LCDC_CHAN_MAINLCD,
453 .bpp = 16,
454 .interface_type = RGB24,
455 .clock_divider = 1,
456 .flags = LCDC_FLAGS_DWPOL,
1c7fcbed 457 .meram_cfg = &hdmi_meram_cfg,
12c4309b
KM		 458 }
459};
460
461static struct resource hdmi_lcdc_resources[] = {
462 [0] = {
463 .name = "LCDC1",
464 .start = 0xfe944000,
465 .end = 0xfe947fff,
466 .flags = IORESOURCE_MEM,
467 },
468 [1] = {
469 .start = intcs_evt2irq(0x1780),
470 .flags = IORESOURCE_IRQ,
471 },
472};
473
474static struct platform_device hdmi_lcdc_device = {
475 .name = "sh_mobile_lcdc_fb",
476 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
477 .resource = hdmi_lcdc_resources,
478 .id = 1,
479 .dev = {
480 .platform_data = &hdmi_lcdc_info,
481 .coherent_dma_mask = ~0,
482 },
483};
484
485static struct sh_mobile_hdmi_info hdmi_info = {
486 .lcd_chan = &hdmi_lcdc_info.ch[0],
487 .lcd_dev = &hdmi_lcdc_device.dev,
98d27b8a 488 .flags = HDMI_SND_SRC_SPDIF,
12c4309b
KM		 489};
490
491static struct resource hdmi_resources[] = {
492 [0] = {
493 .name = "HDMI",
494 .start = 0xe6be0000,
495 .end = 0xe6be00ff,
496 .flags = IORESOURCE_MEM,
497 },
498 [1] = {
499 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
500 .start = evt2irq(0x17e0),
501 .flags = IORESOURCE_IRQ,
502 },
503};
504
505static struct platform_device hdmi_device = {
506 .name = "sh-mobile-hdmi",
507 .num_resources = ARRAY_SIZE(hdmi_resources),
508 .resource = hdmi_resources,
509 .id = -1,
510 .dev = {
511 .platform_data = &hdmi_info,
512 },
513};
514
3f25c9cc
KM		 515static struct platform_device fsi_hdmi_device = {
516 .name = "sh_fsi2_b_hdmi",
517};
518
2ce51f8b 519static void __init hdmi_init_pm_clock(void)
12c4309b
KM		 520{
521 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
522 int ret;
523 long rate;
524
525 if (IS_ERR(hdmi_ick)) {
526 ret = PTR_ERR(hdmi_ick);
527 pr_err("Cannot get HDMI ICK: %d\n", ret);
528 goto out;
529 }
530
531 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
532 if (ret < 0) {
533 pr_err("Cannot set PLLC2 parent: %d, %d users\n",
534 ret, sh7372_pllc2_clk.usecount);
535 goto out;
536 }
537
538 pr_debug("PLLC2 initial frequency %lu\n",
539 clk_get_rate(&sh7372_pllc2_clk));
540
541 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
542 if (rate < 0) {
543 pr_err("Cannot get suitable rate: %ld\n", rate);
544 ret = rate;
545 goto out;
546 }
547
548 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
549 if (ret < 0) {
550 pr_err("Cannot set rate %ld: %d\n", rate, ret);
551 goto out;
552 }
553
12c4309b
KM		 554 pr_debug("PLLC2 set frequency %lu\n", rate);
555
556 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
2ce51f8b 557 if (ret < 0)
12c4309b 558 pr_err("Cannot set HDMI parent: %d\n", ret);
12c4309b
KM		 559
560out:
561 if (!IS_ERR(hdmi_ick))
562 clk_put(hdmi_ick);
12c4309b 563}
12c4309b 564
e2a53b7c
MD		 565/* USBHS0 is connected to CN22 which takes a USB Mini-B plug
566 *
567 * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
568 * but on this particular board IRQ7 is already used by
569 * the touch screen. This leaves us with software polling.
570 */
571#define USBHS0_POLL_INTERVAL (HZ * 5)
572
573struct usbhs_private {
574 unsigned int usbphyaddr;
575 unsigned int usbcrcaddr;
576 struct renesas_usbhs_platform_info info;
577 struct delayed_work work;
578 struct platform_device *pdev;
579};
580
581#define usbhs_get_priv(pdev) \
582 container_of(renesas_usbhs_get_info(pdev), \
583 struct usbhs_private, info)
584
585#define usbhs_is_connected(priv) \
586 (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
587
588static int usbhs_get_vbus(struct platform_device *pdev)
589{
590 return usbhs_is_connected(usbhs_get_priv(pdev));
591}
592
593static void usbhs_phy_reset(struct platform_device *pdev)
594{
595 struct usbhs_private *priv = usbhs_get_priv(pdev);
596
597 /* init phy */
598 __raw_writew(0x8a0a, priv->usbcrcaddr);
599}
600
601static int usbhs0_get_id(struct platform_device *pdev)
602{
603 return USBHS_GADGET;
604}
605
606static void usbhs0_work_function(struct work_struct *work)
607{
608 struct usbhs_private *priv = container_of(work, struct usbhs_private,
609 work.work);
610
611 renesas_usbhs_call_notify_hotplug(priv->pdev);
612 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
613}
614
615static int usbhs0_hardware_init(struct platform_device *pdev)
616{
617 struct usbhs_private *priv = usbhs_get_priv(pdev);
618
619 priv->pdev = pdev;
620 INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
621 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
622 return 0;
623}
624
625static void usbhs0_hardware_exit(struct platform_device *pdev)
626{
627 struct usbhs_private *priv = usbhs_get_priv(pdev);
628
629 cancel_delayed_work_sync(&priv->work);
630}
631
e2a53b7c
MD		 632static struct usbhs_private usbhs0_private = {
633 .usbcrcaddr = 0xe605810c, /* USBCR2 */
634 .info = {
635 .platform_callback = {
636 .hardware_init = usbhs0_hardware_init,
637 .hardware_exit = usbhs0_hardware_exit,
638 .phy_reset = usbhs_phy_reset,
639 .get_id = usbhs0_get_id,
640 .get_vbus = usbhs_get_vbus,
641 },
642 .driver_param = {
643 .buswait_bwait = 4,
fe437561
KM		 644 .d0_tx_id = SHDMA_SLAVE_USB0_TX,
645 .d1_rx_id = SHDMA_SLAVE_USB0_RX,
e2a53b7c
MD		 646 },
647 },
648};
649
650static struct resource usbhs0_resources[] = {
651 [0] = {
652 .name = "USBHS0",
653 .start = 0xe6890000,
654 .end = 0xe68900e6 - 1,
655 .flags = IORESOURCE_MEM,
656 },
657 [1] = {
658 .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
659 .flags = IORESOURCE_IRQ,
660 },
661};
662
663static struct platform_device usbhs0_device = {
664 .name = "renesas_usbhs",
665 .id = 0,
666 .dev = {
667 .platform_data = &usbhs0_private.info,
668 },
669 .num_resources = ARRAY_SIZE(usbhs0_resources),
670 .resource = usbhs0_resources,
671};
672
673/* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
674 *
675 * Use J30 to select between Host and Function. This setting
676 * can however not be detected by software. Hotplug of USBHS1
677 * is provided via IRQ8.
678 */
679#define IRQ8 evt2irq(0x0300)
680
681/* USBHS1 USB Host support via r8a66597_hcd */
25338f2e
KM		 682static void usb1_host_port_power(int port, int power)
683{
684 if (!power) /* only power-on is supported for now */
685 return;
686
687 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
688 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
689}
690
691static struct r8a66597_platdata usb1_host_data = {
692 .on_chip = 1,
693 .port_power = usb1_host_port_power,
694};
695
696static struct resource usb1_host_resources[] = {
697 [0] = {
e2a53b7c
MD		 698 .name = "USBHS1",
699 .start = 0xe68b0000,
700 .end = 0xe68b00e6 - 1,
25338f2e
KM		 701 .flags = IORESOURCE_MEM,
702 },
703 [1] = {
704 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
705 .flags = IORESOURCE_IRQ,
706 },
707};
708
709static struct platform_device usb1_host_device = {
710 .name = "r8a66597_hcd",
711 .id = 1,
712 .dev = {
713 .dma_mask = NULL, /* not use dma */
714 .coherent_dma_mask = 0xffffffff,
715 .platform_data = &usb1_host_data,
716 },
717 .num_resources = ARRAY_SIZE(usb1_host_resources),
718 .resource = usb1_host_resources,
719};
720
e2a53b7c
MD		 721/* USBHS1 USB Function support via renesas_usbhs */
722
66ee3bef
KM		 723#define USB_PHY_MODE (1 << 4)
724#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
725#define USB_PHY_ON (1 << 1)
726#define USB_PHY_OFF (1 << 0)
727#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
728
66ee3bef
KM		 729static irqreturn_t usbhs1_interrupt(int irq, void *data)
730{
731 struct platform_device *pdev = data;
732 struct usbhs_private *priv = usbhs_get_priv(pdev);
733
734 dev_dbg(&pdev->dev, "%s\n", __func__);
735
736 renesas_usbhs_call_notify_hotplug(pdev);
737
738 /* clear status */
739 __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
740 priv->usbphyaddr);
741
742 return IRQ_HANDLED;
743}
744
745static int usbhs1_hardware_init(struct platform_device *pdev)
746{
747 struct usbhs_private *priv = usbhs_get_priv(pdev);
748 int ret;
749
66ee3bef
KM		 750 /* clear interrupt status */
751 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
752
e2a53b7c 753 ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
66ee3bef
KM		 754 dev_name(&pdev->dev), pdev);
755 if (ret) {
756 dev_err(&pdev->dev, "request_irq err\n");
757 return ret;
758 }
759
760 /* enable USB phy interrupt */
761 __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
762
763 return 0;
764}
765
766static void usbhs1_hardware_exit(struct platform_device *pdev)
767{
768 struct usbhs_private *priv = usbhs_get_priv(pdev);
769
770 /* clear interrupt status */
771 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
772
e2a53b7c 773 free_irq(IRQ8, pdev);
66ee3bef
KM		 774}
775
05a7929f
KM		 776static int usbhs1_get_id(struct platform_device *pdev)
777{
778 return USBHS_GADGET;
779}
780
66ee3bef
KM		 781static u32 usbhs1_pipe_cfg[] = {
782 USB_ENDPOINT_XFER_CONTROL,
783 USB_ENDPOINT_XFER_ISOC,
784 USB_ENDPOINT_XFER_ISOC,
785 USB_ENDPOINT_XFER_BULK,
786 USB_ENDPOINT_XFER_BULK,
787 USB_ENDPOINT_XFER_BULK,
788 USB_ENDPOINT_XFER_INT,
789 USB_ENDPOINT_XFER_INT,
790 USB_ENDPOINT_XFER_INT,
791 USB_ENDPOINT_XFER_BULK,
792 USB_ENDPOINT_XFER_BULK,
793 USB_ENDPOINT_XFER_BULK,
794 USB_ENDPOINT_XFER_BULK,
795 USB_ENDPOINT_XFER_BULK,
796 USB_ENDPOINT_XFER_BULK,
797 USB_ENDPOINT_XFER_BULK,
798};
799
800static struct usbhs_private usbhs1_private = {
e2a53b7c
MD		 801 .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */
802 .usbcrcaddr = 0xe6058130, /* USBCR4 */
66ee3bef
KM		 803 .info = {
804 .platform_callback = {
805 .hardware_init = usbhs1_hardware_init,
806 .hardware_exit = usbhs1_hardware_exit,
05a7929f 807 .get_id = usbhs1_get_id,
e2a53b7c
MD		 808 .phy_reset = usbhs_phy_reset,
809 .get_vbus = usbhs_get_vbus,
66ee3bef
KM		 810 },
811 .driver_param = {
812 .buswait_bwait = 4,
f427eb64 813 .has_otg = 1,
66ee3bef
KM		 814 .pipe_type = usbhs1_pipe_cfg,
815 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
fe437561
KM		 816 .d0_tx_id = SHDMA_SLAVE_USB1_TX,
817 .d1_rx_id = SHDMA_SLAVE_USB1_RX,
66ee3bef
KM		 818 },
819 },
820};
821
822static struct resource usbhs1_resources[] = {
823 [0] = {
e2a53b7c
MD		 824 .name = "USBHS1",
825 .start = 0xe68b0000,
826 .end = 0xe68b00e6 - 1,
66ee3bef
KM		 827 .flags = IORESOURCE_MEM,
828 },
829 [1] = {
830 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
831 .flags = IORESOURCE_IRQ,
832 },
833};
834
835static struct platform_device usbhs1_device = {
836 .name = "renesas_usbhs",
837 .id = 1,
838 .dev = {
839 .platform_data = &usbhs1_private.info,
840 },
841 .num_resources = ARRAY_SIZE(usbhs1_resources),
842 .resource = usbhs1_resources,
843};
844
d44deb35
KM		 845/* LED */
846static struct gpio_led mackerel_leds[] = {
847 {
848 .name = "led0",
849 .gpio = GPIO_PORT0,
850 .default_state = LEDS_GPIO_DEFSTATE_ON,
851 },
852 {
853 .name = "led1",
854 .gpio = GPIO_PORT1,
855 .default_state = LEDS_GPIO_DEFSTATE_ON,
856 },
857 {
858 .name = "led2",
859 .gpio = GPIO_PORT2,
860 .default_state = LEDS_GPIO_DEFSTATE_ON,
861 },
862 {
863 .name = "led3",
864 .gpio = GPIO_PORT159,
865 .default_state = LEDS_GPIO_DEFSTATE_ON,
866 }
867};
868
869static struct gpio_led_platform_data mackerel_leds_pdata = {
870 .leds = mackerel_leds,
871 .num_leds = ARRAY_SIZE(mackerel_leds),
872};
873
874static struct platform_device leds_device = {
875 .name = "leds-gpio",
876 .id = 0,
877 .dev = {
878 .platform_data = &mackerel_leds_pdata,
879 },
880};
881
1a44d72a
KM		 882/* FSI */
883#define IRQ_FSI evt2irq(0x1840)
98d27b8a
KM		 884static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
885{
886 int ret;
887
888 if (rate <= 0)
889 return 0;
890
891 if (!enable) {
892 clk_disable(clk);
893 return 0;
894 }
895
896 ret = clk_set_rate(clk, clk_round_rate(clk, rate));
897 if (ret < 0)
898 return ret;
899
900 return clk_enable(clk);
901}
902
903static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
904{
905 struct clk *fsib_clk;
906 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
907 long fsib_rate = 0;
908 long fdiv_rate = 0;
909 int ackmd_bpfmd;
910 int ret;
911
912 /* FSIA is slave mode. nothing to do here */
913 if (is_porta)
914 return 0;
915
916 /* clock start */
917 switch (rate) {
918 case 44100:
919 fsib_rate = rate * 256;
920 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
921 break;
922 case 48000:
923 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
924 fdiv_rate = rate * 256;
925 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
926 break;
927 default:
928 pr_err("unsupported rate in FSI2 port B\n");
929 return -EINVAL;
930 }
931
932 /* FSI B setting */
933 fsib_clk = clk_get(dev, "ickb");
934 if (IS_ERR(fsib_clk))
935 return -EIO;
936
937 /* fsib */
938 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
939 if (ret < 0)
940 goto fsi_set_rate_end;
941
942 /* FSI DIV */
943 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
944 if (ret < 0) {
945 /* disable FSI B */
946 if (enable)
947 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
948 goto fsi_set_rate_end;
949 }
950
951 ret = ackmd_bpfmd;
952
953fsi_set_rate_end:
954 clk_put(fsib_clk);
955 return ret;
956}
957
1a44d72a 958static struct sh_fsi_platform_info fsi_info = {
f17c13ca 959 .porta_flags = SH_FSI_BRS_INV,
98d27b8a
KM		 960
961 .portb_flags = SH_FSI_BRS_INV |
962 SH_FSI_BRM_INV |
963 SH_FSI_LRS_INV |
f17c13ca 964 SH_FSI_FMT_SPDIF,
98d27b8a
KM		 965
966 .set_rate = fsi_set_rate,
1a44d72a
KM		 967};
968
969static struct resource fsi_resources[] = {
970 [0] = {
971 .name = "FSI",
972 .start = 0xFE3C0000,
973 .end = 0xFE3C0400 - 1,
974 .flags = IORESOURCE_MEM,
975 },
976 [1] = {
977 .start = IRQ_FSI,
978 .flags = IORESOURCE_IRQ,
979 },
980};
981
982static struct platform_device fsi_device = {
983 .name = "sh_fsi2",
984 .id = -1,
985 .num_resources = ARRAY_SIZE(fsi_resources),
986 .resource = fsi_resources,
987 .dev = {
988 .platform_data = &fsi_info,
989 },
990};
991
992static struct platform_device fsi_ak4643_device = {
993 .name = "sh_fsi2_a_ak4643",
994};
d44deb35 995
6dff7da2
YG		 996/*
997 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
998 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
999 */
1000static int slot_cn7_get_cd(struct platform_device *pdev)
1001{
ceb50f33 1002 return !gpio_get_value(GPIO_PORT41);
6dff7da2
YG		 1003}
1004
1005/* SDHI0 */
4bff4a7e
GL		 1006static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
1007{
1008 struct device *dev = arg;
1009 struct sh_mobile_sdhi_info *info = dev->platform_data;
1010 struct tmio_mmc_data *pdata = info->pdata;
1011
1012 tmio_mmc_cd_wakeup(pdata);
1013
1014 return IRQ_HANDLED;
1015}
1016
6dff7da2
YG		 1017static struct sh_mobile_sdhi_info sdhi0_info = {
1018 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1019 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
da97da73 1020 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
6dff7da2
YG		 1021};
1022
1023static struct resource sdhi0_resources[] = {
1024 [0] = {
1025 .name = "SDHI0",
1026 .start = 0xe6850000,
31d31fe7 1027 .end = 0xe68500ff,
6dff7da2
YG		 1028 .flags = IORESOURCE_MEM,
1029 },
1030 [1] = {
2007aea1
SH		 1031 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
1032 .flags = IORESOURCE_IRQ,
1033 },
1034 [2] = {
1035 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
1036 .flags = IORESOURCE_IRQ,
1037 },
1038 [3] = {
1039 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
6dff7da2
YG		 1040 .flags = IORESOURCE_IRQ,
1041 },
1042};
1043
1044static struct platform_device sdhi0_device = {
1045 .name = "sh_mobile_sdhi",
1046 .num_resources = ARRAY_SIZE(sdhi0_resources),
1047 .resource = sdhi0_resources,
1048 .id = 0,
1049 .dev = {
1050 .platform_data = &sdhi0_info,
1051 },
1052};
1053
5bcd7517 1054#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG		 1055/* SDHI1 */
1056static struct sh_mobile_sdhi_info sdhi1_info = {
1057 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
1058 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
1059 .tmio_ocr_mask = MMC_VDD_165_195,
1060 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1061 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2
YG		 1062 MMC_CAP_NEEDS_POLL,
1063 .get_cd = slot_cn7_get_cd,
1064};
1065
1066static struct resource sdhi1_resources[] = {
1067 [0] = {
1068 .name = "SDHI1",
1069 .start = 0xe6860000,
31d31fe7 1070 .end = 0xe68600ff,
6dff7da2
YG		 1071 .flags = IORESOURCE_MEM,
1072 },
1073 [1] = {
2007aea1
SH		 1074 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
1075 .flags = IORESOURCE_IRQ,
1076 },
1077 [2] = {
1078 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
1079 .flags = IORESOURCE_IRQ,
1080 },
1081 [3] = {
1082 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
6dff7da2
YG		 1083 .flags = IORESOURCE_IRQ,
1084 },
1085};
1086
1087static struct platform_device sdhi1_device = {
1088 .name = "sh_mobile_sdhi",
1089 .num_resources = ARRAY_SIZE(sdhi1_resources),
1090 .resource = sdhi1_resources,
1091 .id = 1,
1092 .dev = {
1093 .platform_data = &sdhi1_info,
1094 },
1095};
41491b9a 1096#endif
6dff7da2 1097
da5d1f4c
YG		 1098/*
1099 * The card detect pin of the top SD/MMC slot (CN23) is active low and is
1100 * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
1101 */
1102static int slot_cn23_get_cd(struct platform_device *pdev)
1103{
1104 return !gpio_get_value(GPIO_PORT162);
1105}
1106
6dff7da2
YG		 1107/* SDHI2 */
1108static struct sh_mobile_sdhi_info sdhi2_info = {
1109 .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
1110 .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
1111 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1112 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2 1113 MMC_CAP_NEEDS_POLL,
da5d1f4c 1114 .get_cd = slot_cn23_get_cd,
6dff7da2
YG		 1115};
1116
1117static struct resource sdhi2_resources[] = {
1118 [0] = {
1119 .name = "SDHI2",
1120 .start = 0xe6870000,
31d31fe7 1121 .end = 0xe68700ff,
6dff7da2
YG		 1122 .flags = IORESOURCE_MEM,
1123 },
1124 [1] = {
2007aea1
SH		 1125 .start = evt2irq(0x1200), /* SDHI2_SDHI2I0 */
1126 .flags = IORESOURCE_IRQ,
1127 },
1128 [2] = {
1129 .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
1130 .flags = IORESOURCE_IRQ,
1131 },
1132 [3] = {
1133 .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
6dff7da2
YG		 1134 .flags = IORESOURCE_IRQ,
1135 },
1136};
1137
1138static struct platform_device sdhi2_device = {
1139 .name = "sh_mobile_sdhi",
1140 .num_resources = ARRAY_SIZE(sdhi2_resources),
1141 .resource = sdhi2_resources,
1142 .id = 2,
1143 .dev = {
1144 .platform_data = &sdhi2_info,
1145 },
1146};
1147
41491b9a
YG		 1148/* SH_MMCIF */
1149static struct resource sh_mmcif_resources[] = {
1150 [0] = {
1151 .name = "MMCIF",
1152 .start = 0xE6BD0000,
1153 .end = 0xE6BD00FF,
1154 .flags = IORESOURCE_MEM,
1155 },
1156 [1] = {
1157 /* MMC ERR */
1158 .start = evt2irq(0x1ac0),
1159 .flags = IORESOURCE_IRQ,
1160 },
1161 [2] = {
1162 /* MMC NOR */
1163 .start = evt2irq(0x1ae0),
1164 .flags = IORESOURCE_IRQ,
1165 },
1166};
1167
fe78e68a
GL		 1168static struct sh_mmcif_dma sh_mmcif_dma = {
1169 .chan_priv_rx = {
1170 .slave_id = SHDMA_SLAVE_MMCIF_RX,
1171 },
1172 .chan_priv_tx = {
1173 .slave_id = SHDMA_SLAVE_MMCIF_TX,
1174 },
1175};
1176
41491b9a
YG		 1177static struct sh_mmcif_plat_data sh_mmcif_plat = {
1178 .sup_pclk = 0,
1179 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
1180 .caps = MMC_CAP_4_BIT_DATA |
1181 MMC_CAP_8_BIT_DATA |
1182 MMC_CAP_NEEDS_POLL,
1183 .get_cd = slot_cn7_get_cd,
fe78e68a 1184 .dma = &sh_mmcif_dma,
41491b9a
YG		 1185};
1186
1187static struct platform_device sh_mmcif_device = {
1188 .name = "sh_mmcif",
1189 .id = 0,
1190 .dev = {
1191 .dma_mask = NULL,
1192 .coherent_dma_mask = 0xffffffff,
1193 .platform_data = &sh_mmcif_plat,
1194 },
1195 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
1196 .resource = sh_mmcif_resources,
1197};
1198
ae37c8de 1199
7dfff953
GL		 1200static int mackerel_camera_add(struct soc_camera_device *icd);
1201static void mackerel_camera_del(struct soc_camera_device *icd);
ae37c8de
MD		 1202
1203static int camera_set_capture(struct soc_camera_platform_info *info,
1204 int enable)
1205{
1206 return 0; /* camera sensor always enabled */
1207}
1208
1209static struct soc_camera_platform_info camera_info = {
1210 .format_name = "UYVY",
1211 .format_depth = 16,
1212 .format = {
1213 .code = V4L2_MBUS_FMT_UYVY8_2X8,
1214 .colorspace = V4L2_COLORSPACE_SMPTE170M,
1215 .field = V4L2_FIELD_NONE,
1216 .width = 640,
1217 .height = 480,
1218 },
1219 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
1220 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
1221 SOCAM_DATA_ACTIVE_HIGH,
1222 .set_capture = camera_set_capture,
1223};
1224
1225static struct soc_camera_link camera_link = {
1226 .bus_id = 0,
1227 .add_device = mackerel_camera_add,
1228 .del_device = mackerel_camera_del,
1229 .module_name = "soc_camera_platform",
1230 .priv = &camera_info,
1231};
1232
86a73144
GL		 1233static struct platform_device *camera_device;
1234
1235static void mackerel_camera_release(struct device *dev)
ae37c8de 1236{
86a73144 1237 soc_camera_platform_release(&camera_device);
ae37c8de
MD		 1238}
1239
7dfff953 1240static int mackerel_camera_add(struct soc_camera_device *icd)
ae37c8de 1241{
7dfff953 1242 return soc_camera_platform_add(icd, &camera_device, &camera_link,
86a73144 1243 mackerel_camera_release, 0);
ae37c8de
MD		 1244}
1245
7dfff953 1246static void mackerel_camera_del(struct soc_camera_device *icd)
ae37c8de 1247{
7dfff953 1248 soc_camera_platform_del(icd, camera_device, &camera_link);
ae37c8de
MD		 1249}
1250
1251static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1252 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1253};
1254
1255static struct resource ceu_resources[] = {
1256 [0] = {
1257 .name = "CEU",
1258 .start = 0xfe910000,
1259 .end = 0xfe91009f,
1260 .flags = IORESOURCE_MEM,
1261 },
1262 [1] = {
1263 .start = intcs_evt2irq(0x880),
1264 .flags = IORESOURCE_IRQ,
1265 },
1266 [2] = {
1267 /* place holder for contiguous memory */
1268 },
1269};
1270
1271static struct platform_device ceu_device = {
1272 .name = "sh_mobile_ceu",
1273 .id = 0, /* "ceu0" clock */
1274 .num_resources = ARRAY_SIZE(ceu_resources),
1275 .resource = ceu_resources,
1276 .dev = {
05a5f01c
GL		 1277 .platform_data = &sh_mobile_ceu_info,
1278 .coherent_dma_mask = 0xffffffff,
ae37c8de
MD		 1279 },
1280};
1281
1282static struct platform_device mackerel_camera = {
1283 .name = "soc-camera-pdrv",
1284 .id = 0,
1285 .dev = {
1286 .platform_data = &camera_link,
1287 },
1288};
1289
920adc75
KM		 1290static struct platform_device *mackerel_devices[] __initdata = {
1291 &nor_flash_device,
2264c151 1292 &smc911x_device,
11fee467 1293 &lcdc_device,
25338f2e 1294 &usb1_host_device,
66ee3bef 1295 &usbhs1_device,
5a568552 1296 &usbhs0_device,
d44deb35 1297 &leds_device,
1a44d72a
KM		 1298 &fsi_device,
1299 &fsi_ak4643_device,
3f25c9cc 1300 &fsi_hdmi_device,
6dff7da2 1301 &sdhi0_device,
5bcd7517 1302#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2 1303 &sdhi1_device,
41491b9a 1304#endif
6dff7da2 1305 &sdhi2_device,
41491b9a 1306 &sh_mmcif_device,
ae37c8de
MD		 1307 &ceu_device,
1308 &mackerel_camera,
12c4309b
KM		 1309 &hdmi_lcdc_device,
1310 &hdmi_device,
1c7fcbed 1311 &meram_device,
1a44d72a
KM		 1312};
1313
cd8ab004
TS		 1314/* Keypad Initialization */
1315#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
1316{ \
1317 .type = ev_type, \
1318 .code = ev_code, \
1319 .active_low = act_low, \
1320}
1321
1322#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
1323
1324static struct tca6416_button mackerel_gpio_keys[] = {
1325 KEYPAD_BUTTON_LOW(KEY_HOME),
1326 KEYPAD_BUTTON_LOW(KEY_MENU),
1327 KEYPAD_BUTTON_LOW(KEY_BACK),
1328 KEYPAD_BUTTON_LOW(KEY_POWER),
1329};
1330
1331static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
1332 .buttons = mackerel_gpio_keys,
1333 .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
1334 .rep = 1,
1335 .use_polling = 0,
1336 .pinmask = 0x000F,
1337};
1338
1a44d72a 1339/* I2C */
6ae1e19d 1340#define IRQ7 evt2irq(0x02e0)
cd8ab004
TS		 1341#define IRQ9 evt2irq(0x0320)
1342
1a44d72a
KM		 1343static struct i2c_board_info i2c0_devices[] = {
1344 {
1345 I2C_BOARD_INFO("ak4643", 0x13),
1346 },
cd8ab004
TS		 1347 /* Keypad */
1348 {
1349 I2C_BOARD_INFO("tca6408-keys", 0x20),
1350 .platform_data = &mackerel_tca6416_keys_info,
1351 .irq = IRQ9,
1352 },
6ae1e19d
TS		 1353 /* Touchscreen */
1354 {
1355 I2C_BOARD_INFO("st1232-ts", 0x55),
1356 .irq = IRQ7,
1357 },
920adc75
KM		 1358};
1359
80f1dc7c
TS		 1360#define IRQ21 evt2irq(0x32a0)
1361
1362static struct i2c_board_info i2c1_devices[] = {
1363 /* Accelerometer */
1364 {
1365 I2C_BOARD_INFO("adxl34x", 0x53),
1366 .irq = IRQ21,
1367 },
1368};
1369
920adc75
KM		 1370static struct map_desc mackerel_io_desc[] __initdata = {
1371 /* create a 1:1 entity map for 0xe6xxxxxx
1372 * used by CPGA, INTC and PFC.
1373 */
1374 {
1375 .virtual = 0xe6000000,
1376 .pfn = __phys_to_pfn(0xe6000000),
1377 .length = 256 << 20,
1378 .type = MT_DEVICE_NONSHARED
1379 },
1380};
1381
1382static void __init mackerel_map_io(void)
1383{
1384 iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc));
1385
1386 /* setup early devices and console here as well */
1387 sh7372_add_early_devices();
1388 shmobile_setup_console();
1389}
1390
1a44d72a
KM		 1391#define GPIO_PORT9CR 0xE6051009
1392#define GPIO_PORT10CR 0xE605100A
e2a53b7c 1393#define GPIO_PORT167CR 0xE60520A7
66ee3bef 1394#define GPIO_PORT168CR 0xE60520A8
12c4309b 1395#define SRCR4 0xe61580bc
98d27b8a 1396#define USCCR1 0xE6058144
920adc75
KM		 1397static void __init mackerel_init(void)
1398{
12c4309b 1399 u32 srcr4;
98d27b8a 1400 struct clk *clk;
4bff4a7e 1401 int ret;
12c4309b 1402
920adc75
KM		 1403 sh7372_pinmux_init();
1404
1405 /* enable SCIFA0 */
1406 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1407 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1408
2264c151
KM		 1409 /* enable SMSC911X */
1410 gpio_request(GPIO_FN_CS5A, NULL);
1411 gpio_request(GPIO_FN_IRQ6_39, NULL);
1412
11fee467 1413 /* LCDC */
eb87e677
KM		 1414 gpio_request(GPIO_FN_LCDD23, NULL);
1415 gpio_request(GPIO_FN_LCDD22, NULL);
1416 gpio_request(GPIO_FN_LCDD21, NULL);
1417 gpio_request(GPIO_FN_LCDD20, NULL);
1418 gpio_request(GPIO_FN_LCDD19, NULL);
1419 gpio_request(GPIO_FN_LCDD18, NULL);
11fee467
KM		 1420 gpio_request(GPIO_FN_LCDD17, NULL);
1421 gpio_request(GPIO_FN_LCDD16, NULL);
1422 gpio_request(GPIO_FN_LCDD15, NULL);
1423 gpio_request(GPIO_FN_LCDD14, NULL);
1424 gpio_request(GPIO_FN_LCDD13, NULL);
1425 gpio_request(GPIO_FN_LCDD12, NULL);
1426 gpio_request(GPIO_FN_LCDD11, NULL);
1427 gpio_request(GPIO_FN_LCDD10, NULL);
1428 gpio_request(GPIO_FN_LCDD9, NULL);
1429 gpio_request(GPIO_FN_LCDD8, NULL);
1430 gpio_request(GPIO_FN_LCDD7, NULL);
1431 gpio_request(GPIO_FN_LCDD6, NULL);
1432 gpio_request(GPIO_FN_LCDD5, NULL);
1433 gpio_request(GPIO_FN_LCDD4, NULL);
1434 gpio_request(GPIO_FN_LCDD3, NULL);
1435 gpio_request(GPIO_FN_LCDD2, NULL);
1436 gpio_request(GPIO_FN_LCDD1, NULL);
1437 gpio_request(GPIO_FN_LCDD0, NULL);
1438 gpio_request(GPIO_FN_LCDDISP, NULL);
1439 gpio_request(GPIO_FN_LCDDCK, NULL);
1440
1441 gpio_request(GPIO_PORT31, NULL); /* backlight */
1fbdfcde 1442 gpio_direction_output(GPIO_PORT31, 0); /* off by default */
11fee467
KM		 1443
1444 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1445 gpio_direction_output(GPIO_PORT151, 1);
1446
e2a53b7c
MD		 1447 /* USBHS0 */
1448 gpio_request(GPIO_FN_VBUS0_0, NULL);
1449 gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */
1450
1451 /* USBHS1 */
1452 gpio_request(GPIO_FN_VBUS0_1, NULL);
1453 gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
1454 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1455
1456 /* USB phy tweak to make the r8a66597_hcd host driver work */
1457 __raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */
25338f2e 1458
1a44d72a
KM		 1459 /* enable FSI2 port A (ak4643) */
1460 gpio_request(GPIO_FN_FSIAIBT, NULL);
1461 gpio_request(GPIO_FN_FSIAILR, NULL);
1462 gpio_request(GPIO_FN_FSIAISLD, NULL);
1463 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1464 gpio_request(GPIO_PORT161, NULL);
1465 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1466
1467 gpio_request(GPIO_PORT9, NULL);
1468 gpio_request(GPIO_PORT10, NULL);
1469 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1470 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1471
1472 intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
1473
98d27b8a
KM		 1474 /* setup FSI2 port B (HDMI) */
1475 gpio_request(GPIO_FN_FSIBCK, NULL);
1476 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1477
1478 /* set SPU2 clock to 119.6 MHz */
1479 clk = clk_get(NULL, "spu_clk");
1480 if (!IS_ERR(clk)) {
1481 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1482 clk_put(clk);
1483 }
1484
cd8ab004
TS		 1485 /* enable Keypad */
1486 gpio_request(GPIO_FN_IRQ9_42, NULL);
6845664a 1487 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
cd8ab004 1488
6ae1e19d
TS		 1489 /* enable Touchscreen */
1490 gpio_request(GPIO_FN_IRQ7_40, NULL);
6845664a 1491 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
6ae1e19d 1492
80f1dc7c
TS		 1493 /* enable Accelerometer */
1494 gpio_request(GPIO_FN_IRQ21, NULL);
6845664a 1495 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1a44d72a 1496
6dff7da2
YG		 1497 /* enable SDHI0 */
1498 gpio_request(GPIO_FN_SDHICD0, NULL);
1499 gpio_request(GPIO_FN_SDHIWP0, NULL);
1500 gpio_request(GPIO_FN_SDHICMD0, NULL);
1501 gpio_request(GPIO_FN_SDHICLK0, NULL);
1502 gpio_request(GPIO_FN_SDHID0_3, NULL);
1503 gpio_request(GPIO_FN_SDHID0_2, NULL);
1504 gpio_request(GPIO_FN_SDHID0_1, NULL);
1505 gpio_request(GPIO_FN_SDHID0_0, NULL);
1506
4bff4a7e
GL		 1507 ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
1508 IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
1509 if (!ret)
1510 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
1511 else
1512 pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
1513
5bcd7517 1514#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG		 1515 /* enable SDHI1 */
1516 gpio_request(GPIO_FN_SDHICMD1, NULL);
1517 gpio_request(GPIO_FN_SDHICLK1, NULL);
1518 gpio_request(GPIO_FN_SDHID1_3, NULL);
1519 gpio_request(GPIO_FN_SDHID1_2, NULL);
1520 gpio_request(GPIO_FN_SDHID1_1, NULL);
1521 gpio_request(GPIO_FN_SDHID1_0, NULL);
41491b9a 1522#endif
6dff7da2
YG		 1523 /* card detect pin for MMC slot (CN7) */
1524 gpio_request(GPIO_PORT41, NULL);
1525 gpio_direction_input(GPIO_PORT41);
1526
1527 /* enable SDHI2 */
1528 gpio_request(GPIO_FN_SDHICMD2, NULL);
1529 gpio_request(GPIO_FN_SDHICLK2, NULL);
1530 gpio_request(GPIO_FN_SDHID2_3, NULL);
1531 gpio_request(GPIO_FN_SDHID2_2, NULL);
1532 gpio_request(GPIO_FN_SDHID2_1, NULL);
1533 gpio_request(GPIO_FN_SDHID2_0, NULL);
1534
da5d1f4c
YG		 1535 /* card detect pin for microSD slot (CN23) */
1536 gpio_request(GPIO_PORT162, NULL);
1537 gpio_direction_input(GPIO_PORT162);
1538
41491b9a
YG		 1539 /* MMCIF */
1540 gpio_request(GPIO_FN_MMCD0_0, NULL);
1541 gpio_request(GPIO_FN_MMCD0_1, NULL);
1542 gpio_request(GPIO_FN_MMCD0_2, NULL);
1543 gpio_request(GPIO_FN_MMCD0_3, NULL);
1544 gpio_request(GPIO_FN_MMCD0_4, NULL);
1545 gpio_request(GPIO_FN_MMCD0_5, NULL);
1546 gpio_request(GPIO_FN_MMCD0_6, NULL);
1547 gpio_request(GPIO_FN_MMCD0_7, NULL);
1548 gpio_request(GPIO_FN_MMCCMD0, NULL);
1549 gpio_request(GPIO_FN_MMCCLK0, NULL);
1550
56e78daf
YG		 1551 /* enable GPS module (GT-720F) */
1552 gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
1553 gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
1554
ae37c8de
MD		 1555 /* CEU */
1556 gpio_request(GPIO_FN_VIO_CLK, NULL);
1557 gpio_request(GPIO_FN_VIO_VD, NULL);
1558 gpio_request(GPIO_FN_VIO_HD, NULL);
1559 gpio_request(GPIO_FN_VIO_FIELD, NULL);
1560 gpio_request(GPIO_FN_VIO_CKO, NULL);
1561 gpio_request(GPIO_FN_VIO_D7, NULL);
1562 gpio_request(GPIO_FN_VIO_D6, NULL);
1563 gpio_request(GPIO_FN_VIO_D5, NULL);
1564 gpio_request(GPIO_FN_VIO_D4, NULL);
1565 gpio_request(GPIO_FN_VIO_D3, NULL);
1566 gpio_request(GPIO_FN_VIO_D2, NULL);
1567 gpio_request(GPIO_FN_VIO_D1, NULL);
1568 gpio_request(GPIO_FN_VIO_D0, NULL);
1569
12c4309b
KM		 1570 /* HDMI */
1571 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1572 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1573
1574 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1575 srcr4 = __raw_readl(SRCR4);
1576 __raw_writel(srcr4 | (1 << 13), SRCR4);
1577 udelay(50);
1578 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1579
1a44d72a
KM		 1580 i2c_register_board_info(0, i2c0_devices,
1581 ARRAY_SIZE(i2c0_devices));
80f1dc7c
TS		 1582 i2c_register_board_info(1, i2c1_devices,
1583 ARRAY_SIZE(i2c1_devices));
11fee467 1584
920adc75
KM		 1585 sh7372_add_standard_devices();
1586
1587 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
2ce51f8b 1588
e3e01091
RW		 1589 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1590 sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device);
c1ba5bb5 1591 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
d93f5cde
MD		 1592 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
1593 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
1594 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
1595 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
1596#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1597 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
1598#endif
1599 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device);
382414b9 1600 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
e3e01091 1601
2ce51f8b 1602 hdmi_init_pm_clock();
97991657 1603 sh7372_pm_init();
a41b6466 1604 pm_clk_add(&fsi_device.dev, "spu2");
5c3f96b2 1605 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
920adc75
KM		 1606}
1607
1608static void __init mackerel_timer_init(void)
1609{
1610 sh7372_clock_init();
1611 shmobile_timer.init();
12c4309b
KM		 1612
1613 /* External clock source */
1614 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
920adc75
KM		 1615}
1616
1617static struct sys_timer mackerel_timer = {
1618 .init = mackerel_timer_init,
1619};
1620
1621MACHINE_START(MACKEREL, "mackerel")
1622 .map_io = mackerel_map_io,
1623 .init_irq = sh7372_init_irq,
863b1719 1624 .handle_irq = shmobile_handle_irq_intc,
920adc75
KM		 1625 .init_machine = mackerel_init,
1626 .timer = &mackerel_timer,
1627MACHINE_END
kernel source for telekom puls (alcatel/mediatek)