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ARM: mach-shmobile: ap4evb: modify FSI2 ID
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-shmobile / board-ap4evb.c
CommitLineData
2b7eda63
MD		 1/*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
8eda2f21 20#include <linux/clk.h>
2b7eda63
MD		 21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/platform_device.h>
26#include <linux/delay.h>
69bf6f45 27#include <linux/mfd/sh_mobile_sdhi.h>
341291a6 28#include <linux/mmc/host.h>
2b7eda63
MD		 29#include <linux/mtd/mtd.h>
30#include <linux/mtd/partitions.h>
31#include <linux/mtd/physmap.h>
c8ee3d4b
KM		 32#include <linux/mmc/host.h>
33#include <linux/mmc/sh_mmcif.h>
91cf5082
KM		 34#include <linux/i2c.h>
35#include <linux/i2c/tsc2007.h>
2b7eda63 36#include <linux/io.h>
1b7e0677 37#include <linux/smsc911x.h>
cb9215e1
KM		 38#include <linux/sh_intc.h>
39#include <linux/sh_clk.h>
1b7e0677 40#include <linux/gpio.h>
17ccb834 41#include <linux/input.h>
2863e935 42#include <linux/leds.h>
17ccb834 43#include <linux/input/sh_keysc.h>
fb54d268 44#include <linux/usb/r8a66597.h>
8eda2f21 45
cb9215e1
KM		 46#include <sound/sh_fsi.h>
47
dfbcdf64 48#include <video/sh_mobile_hdmi.h>
8eda2f21
GL		 49#include <video/sh_mobile_lcdc.h>
50#include <video/sh_mipi_dsi.h>
51
2b7eda63 52#include <mach/common.h>
8eda2f21 53#include <mach/irqs.h>
1b7e0677 54#include <mach/sh7372.h>
8eda2f21 55
2b7eda63
MD		 56#include <asm/mach-types.h>
57#include <asm/mach/arch.h>
58#include <asm/mach/map.h>
495b3cea 59#include <asm/mach/time.h>
2b7eda63 60
02624a17
KM		 61/*
62 * Address Interface BusWidth note
63 * ------------------------------------------------------------------
64 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
65 * 0x0800_0000 user area -
66 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
67 * 0x1400_0000 Ether (LAN9220) 16bit
68 * 0x1600_0000 user area - cannot use with NAND
69 * 0x1800_0000 user area -
70 * 0x1A00_0000 -
71 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
72 */
73
74/*
75 * NOR Flash ROM
76 *
77 * SW1 | SW2 | SW7 | NOR Flash ROM
78 * bit1 | bit1 bit2 | bit1 | Memory allocation
79 * ------+------------+------+------------------
80 * OFF | ON OFF | ON | Area 0
81 * OFF | ON OFF | OFF | Area 4
82 */
83
84/*
85 * NAND Flash ROM
86 *
87 * SW1 | SW2 | SW7 | NAND Flash ROM
88 * bit1 | bit1 bit2 | bit2 | Memory allocation
89 * ------+------------+------+------------------
90 * OFF | ON OFF | ON | FCE 0
91 * OFF | ON OFF | OFF | FCE 1
92 */
93
94/*
95 * SMSC 9220
96 *
97 * SW1 SMSC 9220
98 * -----------------------
99 * ON access disable
100 * OFF access enable
101 */
102
17ccb834 103/*
dda128dc 104 * LCD / IRQ / KEYSC / IrDA
17ccb834 105 *
9fa1b7fe
KM		 106 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
107 * LCD = 2nd LCDC (WVGA)
dda128dc
KM		 108 *
109 * | SW43 |
110 * SW3 | ON | OFF |
111 * -------------+-----------------------+---------------+
112 * ON | KEY / IrDA | LCD |
113 * OFF | KEY / IrDA / IRQ | IRQ |
9fa1b7fe
KM		 114 *
115 *
116 * QHD / WVGA display
117 *
118 * You can choice display type on menuconfig.
119 * Then, check above dip-switch.
17ccb834
KM		 120 */
121
fb54d268
KM		 122/*
123 * USB
124 *
125 * J7 : 1-2 MAX3355E VBUS
126 * 2-3 DC 5.0V
127 *
128 * S39: bit2: off
129 */
130
cb9215e1
KM		 131/*
132 * FSI/FSMI
133 *
134 * SW41 : ON : SH-Mobile AP4 Audio Mode
135 * : OFF : Bluetooth Audio Mode
136 */
137
c8ee3d4b 138/*
d3d03e48 139 * MMC0/SDHI1 (CN7)
c8ee3d4b 140 *
d3d03e48
KM		 141 * J22 : select card voltage
142 * 1-2 pin : 1.8v
143 * 2-3 pin : 3.3v
144 *
145 * SW1 | SW33
146 * | bit1 | bit2 | bit3 | bit4
147 * ------------+------+------+------+-------
148 * MMC0 OFF | OFF | ON | ON | X
149 * SDHI1 OFF | ON | X | OFF | ON
150 *
151 * voltage lebel
152 * CN7 : 1.8v
153 * CN12: 3.3v
c8ee3d4b
KM		 154 */
155
1b7e0677 156/* MTD */
2b7eda63
MD		 157static struct mtd_partition nor_flash_partitions[] = {
158 {
159 .name = "loader",
160 .offset = 0x00000000,
161 .size = 512 * 1024,
162 },
163 {
164 .name = "bootenv",
165 .offset = MTDPART_OFS_APPEND,
166 .size = 512 * 1024,
167 },
168 {
169 .name = "kernel_ro",
170 .offset = MTDPART_OFS_APPEND,
171 .size = 8 * 1024 * 1024,
172 .mask_flags = MTD_WRITEABLE,
173 },
174 {
175 .name = "kernel",
176 .offset = MTDPART_OFS_APPEND,
177 .size = 8 * 1024 * 1024,
178 },
179 {
180 .name = "data",
181 .offset = MTDPART_OFS_APPEND,
182 .size = MTDPART_SIZ_FULL,
183 },
184};
185
186static struct physmap_flash_data nor_flash_data = {
187 .width = 2,
188 .parts = nor_flash_partitions,
189 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
190};
191
192static struct resource nor_flash_resources[] = {
193 [0] = {
194 .start = 0x00000000,
195 .end = 0x08000000 - 1,
196 .flags = IORESOURCE_MEM,
197 }
198};
199
200static struct platform_device nor_flash_device = {
201 .name = "physmap-flash",
202 .dev = {
203 .platform_data = &nor_flash_data,
204 },
205 .num_resources = ARRAY_SIZE(nor_flash_resources),
206 .resource = nor_flash_resources,
207};
208
1b7e0677
KM		 209/* SMSC 9220 */
210static struct resource smc911x_resources[] = {
211 {
212 .start = 0x14000000,
213 .end = 0x16000000 - 1,
214 .flags = IORESOURCE_MEM,
215 }, {
33c9607a 216 .start = evt2irq(0x02c0) /* IRQ6A */,
1b7e0677
KM		 217 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
218 },
219};
220
221static struct smsc911x_platform_config smsc911x_info = {
222 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
223 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
224 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
225};
226
227static struct platform_device smc911x_device = {
228 .name = "smsc911x",
229 .id = -1,
230 .num_resources = ARRAY_SIZE(smc911x_resources),
231 .resource = smc911x_resources,
232 .dev = {
233 .platform_data = &smsc911x_info,
234 },
235};
2b7eda63 236
c8ee3d4b
KM		 237/* SH_MMCIF */
238static struct resource sh_mmcif_resources[] = {
239 [0] = {
240 .name = "SH_MMCIF",
241 .start = 0xE6BD0000,
242 .end = 0xE6BD00FF,
243 .flags = IORESOURCE_MEM,
244 },
245 [1] = {
246 /* MMC ERR */
8d569341 247 .start = evt2irq(0x1ac0),
c8ee3d4b
KM		 248 .flags = IORESOURCE_IRQ,
249 },
250 [2] = {
251 /* MMC NOR */
8d569341 252 .start = evt2irq(0x1ae0),
c8ee3d4b
KM		 253 .flags = IORESOURCE_IRQ,
254 },
255};
256
bb04e197 257static struct sh_mmcif_plat_data sh_mmcif_plat = {
c8ee3d4b
KM		 258 .sup_pclk = 0,
259 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
260 .caps = MMC_CAP_4_BIT_DATA |
261 MMC_CAP_8_BIT_DATA |
262 MMC_CAP_NEEDS_POLL,
263};
264
265static struct platform_device sh_mmcif_device = {
266 .name = "sh_mmcif",
267 .id = 0,
268 .dev = {
269 .dma_mask = NULL,
270 .coherent_dma_mask = 0xffffffff,
271 .platform_data = &sh_mmcif_plat,
272 },
273 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
274 .resource = sh_mmcif_resources,
275};
276
3a14d039 277/* SDHI0 */
69bf6f45 278static struct sh_mobile_sdhi_info sdhi0_info = {
341291a6
GL		 279 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
280 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
69bf6f45
GL		 281};
282
3a14d039
MD		 283static struct resource sdhi0_resources[] = {
284 [0] = {
285 .name = "SDHI0",
286 .start = 0xe6850000,
287 .end = 0xe68501ff,
288 .flags = IORESOURCE_MEM,
289 },
290 [1] = {
33c9607a 291 .start = evt2irq(0x0e00) /* SDHI0 */,
3a14d039
MD		 292 .flags = IORESOURCE_IRQ,
293 },
294};
295
296static struct platform_device sdhi0_device = {
297 .name = "sh_mobile_sdhi",
298 .num_resources = ARRAY_SIZE(sdhi0_resources),
299 .resource = sdhi0_resources,
300 .id = 0,
69bf6f45
GL		 301 .dev = {
302 .platform_data = &sdhi0_info,
303 },
3a14d039
MD		 304};
305
341291a6
GL		 306/* SDHI1 */
307static struct sh_mobile_sdhi_info sdhi1_info = {
308 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
309 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
310 .tmio_ocr_mask = MMC_VDD_165_195,
311};
312
313static struct resource sdhi1_resources[] = {
314 [0] = {
315 .name = "SDHI1",
316 .start = 0xe6860000,
317 .end = 0xe68601ff,
318 .flags = IORESOURCE_MEM,
319 },
320 [1] = {
321 .start = evt2irq(0x0e80),
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326static struct platform_device sdhi1_device = {
327 .name = "sh_mobile_sdhi",
328 .num_resources = ARRAY_SIZE(sdhi1_resources),
329 .resource = sdhi1_resources,
330 .id = 1,
331 .dev = {
332 .platform_data = &sdhi1_info,
333 },
334};
335
fb54d268 336/* USB1 */
bb04e197 337static void usb1_host_port_power(int port, int power)
fb54d268
KM		 338{
339 if (!power) /* only power-on supported for now */
340 return;
341
342 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
343 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
344}
345
346static struct r8a66597_platdata usb1_host_data = {
347 .on_chip = 1,
348 .port_power = usb1_host_port_power,
349};
350
351static struct resource usb1_host_resources[] = {
352 [0] = {
353 .name = "USBHS",
354 .start = 0xE68B0000,
355 .end = 0xE68B00E6 - 1,
356 .flags = IORESOURCE_MEM,
357 },
358 [1] = {
33c9607a 359 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
fb54d268
KM		 360 .flags = IORESOURCE_IRQ,
361 },
362};
363
364static struct platform_device usb1_host_device = {
365 .name = "r8a66597_hcd",
366 .id = 1,
367 .dev = {
368 .dma_mask = NULL, /* not use dma */
369 .coherent_dma_mask = 0xffffffff,
370 .platform_data = &usb1_host_data,
371 },
372 .num_resources = ARRAY_SIZE(usb1_host_resources),
373 .resource = usb1_host_resources,
374};
375
9fa1b7fe 376static struct sh_mobile_lcdc_info lcdc_info = {
8eda2f21
GL		 377 .ch[0] = {
378 .chan = LCDC_CHAN_MAINLCD,
379 .bpp = 16,
8eda2f21
GL		 380 }
381};
382
383static struct resource lcdc_resources[] = {
384 [0] = {
385 .name = "LCDC",
386 .start = 0xfe940000, /* P4-only space */
387 .end = 0xfe943fff,
388 .flags = IORESOURCE_MEM,
389 },
390 [1] = {
391 .start = intcs_evt2irq(0x580),
392 .flags = IORESOURCE_IRQ,
393 },
394};
395
396static struct platform_device lcdc_device = {
397 .name = "sh_mobile_lcdc_fb",
398 .num_resources = ARRAY_SIZE(lcdc_resources),
399 .resource = lcdc_resources,
400 .dev = {
9fa1b7fe 401 .platform_data = &lcdc_info,
8eda2f21
GL		 402 .coherent_dma_mask = ~0,
403 },
404};
405
9fa1b7fe
KM		 406/*
407 * QHD display
408 */
409#ifdef CONFIG_AP4EVB_QHD
410
411/* KEYSC (Needs SW43 set to ON) */
412static struct sh_keysc_info keysc_info = {
413 .mode = SH_KEYSC_MODE_1,
414 .scan_timing = 3,
415 .delay = 2500,
416 .keycodes = {
417 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
418 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
419 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
420 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
421 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
422 },
423};
424
425static struct resource keysc_resources[] = {
426 [0] = {
427 .name = "KEYSC",
428 .start = 0xe61b0000,
429 .end = 0xe61b0063,
430 .flags = IORESOURCE_MEM,
431 },
432 [1] = {
433 .start = evt2irq(0x0be0), /* KEYSC_KEY */
434 .flags = IORESOURCE_IRQ,
435 },
436};
437
438static struct platform_device keysc_device = {
439 .name = "sh_keysc",
440 .id = 0, /* "keysc0" clock */
441 .num_resources = ARRAY_SIZE(keysc_resources),
442 .resource = keysc_resources,
443 .dev = {
444 .platform_data = &keysc_info,
445 },
446};
447
448/* MIPI-DSI */
8eda2f21
GL		 449static struct resource mipidsi0_resources[] = {
450 [0] = {
451 .start = 0xffc60000,
452 .end = 0xffc68fff,
453 .flags = IORESOURCE_MEM,
454 },
455};
456
457static struct sh_mipi_dsi_info mipidsi0_info = {
458 .data_format = MIPI_RGB888,
9fa1b7fe 459 .lcd_chan = &lcdc_info.ch[0],
8eda2f21
GL		 460};
461
462static struct platform_device mipidsi0_device = {
463 .name = "sh-mipi-dsi",
464 .num_resources = ARRAY_SIZE(mipidsi0_resources),
465 .resource = mipidsi0_resources,
466 .id = 0,
467 .dev = {
468 .platform_data = &mipidsi0_info,
469 },
470};
471
9fa1b7fe
KM		 472/* This function will disappear when we switch to (runtime) PM */
473static int __init ap4evb_init_display_clk(void)
474{
475 struct clk *lcdc_clk;
476 struct clk *dsitx_clk;
477 int ret;
478
479 lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
480 if (IS_ERR(lcdc_clk))
481 return PTR_ERR(lcdc_clk);
482
483 dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
484 if (IS_ERR(dsitx_clk)) {
485 ret = PTR_ERR(dsitx_clk);
486 goto eclkdsitxget;
487 }
488
489 ret = clk_enable(lcdc_clk);
490 if (ret < 0)
491 goto eclklcdcon;
492
493 ret = clk_enable(dsitx_clk);
494 if (ret < 0)
495 goto eclkdsitxon;
496
497 return 0;
498
499eclkdsitxon:
500 clk_disable(lcdc_clk);
501eclklcdcon:
502 clk_put(dsitx_clk);
503eclkdsitxget:
504 clk_put(lcdc_clk);
505
506 return ret;
507}
508device_initcall(ap4evb_init_display_clk);
509
510static struct platform_device *qhd_devices[] __initdata = {
511 &mipidsi0_device,
512 &keysc_device,
513};
514#endif /* CONFIG_AP4EVB_QHD */
515
cb9215e1
KM		 516/* FSI */
517#define IRQ_FSI evt2irq(0x1840)
518#define FSIACKCR 0xE6150018
519static void fsiackcr_init(struct clk *clk)
520{
521 u32 status = __raw_readl(clk->enable_reg);
522
523 /* use external clock */
524 status &= ~0x000000ff;
525 status |= 0x00000080;
526 __raw_writel(status, clk->enable_reg);
527}
528
529static struct clk_ops fsiackcr_clk_ops = {
530 .init = fsiackcr_init,
531};
532
533static struct clk fsiackcr_clk = {
534 .ops = &fsiackcr_clk_ops,
535 .enable_reg = (void __iomem *)FSIACKCR,
536 .rate = 0, /* unknown */
537};
538
bb04e197 539static struct sh_fsi_platform_info fsi_info = {
cb9215e1
KM		 540 .porta_flags = SH_FSI_BRS_INV |
541 SH_FSI_OUT_SLAVE_MODE |
542 SH_FSI_IN_SLAVE_MODE |
543 SH_FSI_OFMT(PCM) |
544 SH_FSI_IFMT(PCM),
545};
546
547static struct resource fsi_resources[] = {
548 [0] = {
549 .name = "FSI",
550 .start = 0xFE3C0000,
551 .end = 0xFE3C0400 - 1,
552 .flags = IORESOURCE_MEM,
553 },
554 [1] = {
555 .start = IRQ_FSI,
556 .flags = IORESOURCE_IRQ,
557 },
558};
559
560static struct platform_device fsi_device = {
561 .name = "sh_fsi2",
9f6f11b6 562 .id = -1,
cb9215e1
KM		 563 .num_resources = ARRAY_SIZE(fsi_resources),
564 .resource = fsi_resources,
565 .dev = {
566 .platform_data = &fsi_info,
567 },
568};
569
dfbcdf64
GL		 570static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
571 .clock_source = LCDC_CLK_EXTERNAL,
572 .ch[0] = {
573 .chan = LCDC_CHAN_MAINLCD,
574 .bpp = 16,
575 .interface_type = RGB24,
576 .clock_divider = 1,
577 .flags = LCDC_FLAGS_DWPOL,
578 .lcd_cfg = {
579 .name = "HDMI",
580 /* So far only 720p is supported */
581 .xres = 1280,
582 .yres = 720,
583 /*
584 * If left and right margins are not multiples of 8,
585 * LDHAJR will be adjusted accordingly by the LCDC
586 * driver. Until we start using EDID, these values
587 * might have to be adjusted for different monitors.
588 */
589 .left_margin = 200,
590 .right_margin = 88,
591 .hsync_len = 48,
592 .upper_margin = 20,
593 .lower_margin = 5,
594 .vsync_len = 5,
595 .pixclock = 13468,
596 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
597 },
598 }
599};
600
601static struct resource lcdc1_resources[] = {
602 [0] = {
603 .name = "LCDC1",
604 .start = 0xfe944000,
605 .end = 0xfe947fff,
606 .flags = IORESOURCE_MEM,
607 },
608 [1] = {
609 .start = intcs_evt2irq(0x17a0),
610 .flags = IORESOURCE_IRQ,
611 },
612};
613
614static struct platform_device lcdc1_device = {
615 .name = "sh_mobile_lcdc_fb",
616 .num_resources = ARRAY_SIZE(lcdc1_resources),
617 .resource = lcdc1_resources,
618 .id = 1,
619 .dev = {
620 .platform_data = &sh_mobile_lcdc1_info,
621 .coherent_dma_mask = ~0,
622 },
623};
624
625static struct sh_mobile_hdmi_info hdmi_info = {
626 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
627 .lcd_dev = &lcdc1_device.dev,
628};
629
630static struct resource hdmi_resources[] = {
631 [0] = {
632 .name = "HDMI",
633 .start = 0xe6be0000,
634 .end = 0xe6be00ff,
635 .flags = IORESOURCE_MEM,
636 },
637 [1] = {
638 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
639 .start = evt2irq(0x17e0),
640 .flags = IORESOURCE_IRQ,
641 },
642};
643
644static struct platform_device hdmi_device = {
645 .name = "sh-mobile-hdmi",
646 .num_resources = ARRAY_SIZE(hdmi_resources),
647 .resource = hdmi_resources,
648 .id = -1,
649 .dev = {
650 .platform_data = &hdmi_info,
651 },
652};
653
2863e935
AH		 654static struct gpio_led ap4evb_leds[] = {
655 {
656 .name = "led4",
657 .gpio = GPIO_PORT185,
658 .default_state = LEDS_GPIO_DEFSTATE_ON,
659 },
660 {
661 .name = "led2",
662 .gpio = GPIO_PORT186,
663 .default_state = LEDS_GPIO_DEFSTATE_ON,
664 },
665 {
666 .name = "led3",
667 .gpio = GPIO_PORT187,
668 .default_state = LEDS_GPIO_DEFSTATE_ON,
669 },
670 {
671 .name = "led1",
672 .gpio = GPIO_PORT188,
673 .default_state = LEDS_GPIO_DEFSTATE_ON,
674 }
675};
676
677static struct gpio_led_platform_data ap4evb_leds_pdata = {
678 .num_leds = ARRAY_SIZE(ap4evb_leds),
8050fbf2 679 .leds = ap4evb_leds,
2863e935
AH		 680};
681
682static struct platform_device leds_device = {
683 .name = "leds-gpio",
684 .id = 0,
685 .dev = {
686 .platform_data = &ap4evb_leds_pdata,
687 },
688};
689
2b7eda63 690static struct platform_device *ap4evb_devices[] __initdata = {
2863e935 691 &leds_device,
2b7eda63 692 &nor_flash_device,
1b7e0677 693 &smc911x_device,
3a14d039 694 &sdhi0_device,
341291a6 695 &sdhi1_device,
fb54d268 696 &usb1_host_device,
cb9215e1 697 &fsi_device,
beccb12f 698 &sh_mmcif_device,
dfbcdf64
GL		 699 &lcdc1_device,
700 &lcdc_device,
701 &hdmi_device,
2b7eda63
MD		 702};
703
dfbcdf64
GL		 704static int __init hdmi_init_pm_clock(void)
705{
706 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
707 int ret;
708 long rate;
709
710 if (IS_ERR(hdmi_ick)) {
711 ret = PTR_ERR(hdmi_ick);
712 pr_err("Cannot get HDMI ICK: %d\n", ret);
713 goto out;
714 }
715
716 ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk);
717 if (ret < 0) {
718 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount);
719 goto out;
720 }
721
722 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk));
723
724 rate = clk_round_rate(&pllc2_clk, 594000000);
725 if (rate < 0) {
726 pr_err("Cannot get suitable rate: %ld\n", rate);
727 ret = rate;
728 goto out;
729 }
730
731 ret = clk_set_rate(&pllc2_clk, rate);
732 if (ret < 0) {
733 pr_err("Cannot set rate %ld: %d\n", rate, ret);
734 goto out;
735 }
736
737 pr_debug("PLLC2 set frequency %lu\n", rate);
738
739 ret = clk_set_parent(hdmi_ick, &pllc2_clk);
740 if (ret < 0) {
741 pr_err("Cannot set HDMI parent: %d\n", ret);
742 goto out;
743 }
744
745out:
746 if (!IS_ERR(hdmi_ick))
747 clk_put(hdmi_ick);
748 return ret;
749}
750
751device_initcall(hdmi_init_pm_clock);
752
71c3ba9a
KM		 753/*
754 * FIXME !!
755 *
756 * gpio_no_direction
757 * gpio_pull_up
758 * are quick_hack.
759 *
760 * current gpio frame work doesn't have
761 * the method to control only pull up/down/free.
762 * this function should be replaced by correct gpio function
763 */
764static void __init gpio_no_direction(u32 addr)
765{
766 __raw_writeb(0x00, addr);
767}
768
769static void __init gpio_pull_up(u32 addr)
770{
771 u8 data = __raw_readb(addr);
772
773 data &= 0x0F;
774 data |= 0xC0;
775 __raw_writeb(data, addr);
776}
777
9fa1b7fe 778/* TouchScreen */
33c9607a 779#define IRQ28 evt2irq(0x3380) /* IRQ28A */
9fa1b7fe 780#define IRQ7 evt2irq(0x02e0) /* IRQ7A */
71c3ba9a
KM		 781static int ts_get_pendown_state(void)
782{
783 int val1, val2;
784
785 gpio_free(GPIO_FN_IRQ28_123);
786 gpio_free(GPIO_FN_IRQ7_40);
787
788 gpio_request(GPIO_PORT123, NULL);
789 gpio_request(GPIO_PORT40, NULL);
790
791 gpio_direction_input(GPIO_PORT123);
792 gpio_direction_input(GPIO_PORT40);
793
794 val1 = gpio_get_value(GPIO_PORT123);
795 val2 = gpio_get_value(GPIO_PORT40);
796
797 gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */
798 gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */
799
800 return val1 ^ val2;
801}
802
803#define PORT40CR 0xE6051028
804#define PORT123CR 0xE605007B
805static int ts_init(void)
806{
807 gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */
808 gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */
809
810 gpio_pull_up(PORT40CR);
811 gpio_pull_up(PORT123CR);
812
813 return 0;
814}
815
bb04e197 816static struct tsc2007_platform_data tsc2007_info = {
91cf5082
KM		 817 .model = 2007,
818 .x_plate_ohms = 180,
71c3ba9a
KM		 819 .get_pendown_state = ts_get_pendown_state,
820 .init_platform_hw = ts_init,
91cf5082
KM		 821};
822
9fa1b7fe
KM		 823static struct i2c_board_info tsc_device = {
824 I2C_BOARD_INFO("tsc2007", 0x48),
825 .type = "tsc2007",
826 .platform_data = &tsc2007_info,
827 /*.irq is selected on ap4evb_init */
828};
829
91cf5082 830/* I2C */
cb9215e1
KM		 831static struct i2c_board_info i2c0_devices[] = {
832 {
833 I2C_BOARD_INFO("ak4643", 0x13),
834 },
835};
836
91cf5082 837static struct i2c_board_info i2c1_devices[] = {
8fc883c2
KM		 838 {
839 I2C_BOARD_INFO("r2025sd", 0x32),
840 },
91cf5082
KM		 841};
842
2b7eda63
MD		 843static struct map_desc ap4evb_io_desc[] __initdata = {
844 /* create a 1:1 entity map for 0xe6xxxxxx
845 * used by CPGA, INTC and PFC.
846 */
847 {
848 .virtual = 0xe6000000,
849 .pfn = __phys_to_pfn(0xe6000000),
850 .length = 256 << 20,
851 .type = MT_DEVICE_NONSHARED
852 },
853};
854
855static void __init ap4evb_map_io(void)
856{
857 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
858
495b3cea 859 /* setup early devices and console here as well */
2b7eda63 860 sh7372_add_early_devices();
4ae04acb 861 shmobile_setup_console();
2b7eda63
MD		 862}
863
cb9215e1
KM		 864#define GPIO_PORT9CR 0xE6051009
865#define GPIO_PORT10CR 0xE605100A
2b7eda63
MD		 866static void __init ap4evb_init(void)
867{
dfbcdf64 868 u32 srcr4;
cb9215e1
KM		 869 struct clk *clk;
870
1b7e0677
KM		 871 sh7372_pinmux_init();
872
b228b48e
KM		 873 /* enable SCIFA0 */
874 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
875 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
876
1b7e0677
KM		 877 /* enable SMSC911X */
878 gpio_request(GPIO_FN_CS5A, NULL);
879 gpio_request(GPIO_FN_IRQ6_39, NULL);
880
8cb3a2eb
KM		 881 /* enable Debug switch (S6) */
882 gpio_request(GPIO_PORT32, NULL);
883 gpio_request(GPIO_PORT33, NULL);
884 gpio_request(GPIO_PORT34, NULL);
885 gpio_request(GPIO_PORT35, NULL);
886 gpio_direction_input(GPIO_PORT32);
887 gpio_direction_input(GPIO_PORT33);
888 gpio_direction_input(GPIO_PORT34);
889 gpio_direction_input(GPIO_PORT35);
890 gpio_export(GPIO_PORT32, 0);
891 gpio_export(GPIO_PORT33, 0);
892 gpio_export(GPIO_PORT34, 0);
893 gpio_export(GPIO_PORT35, 0);
894
3a14d039
MD		 895 /* SDHI0 */
896 gpio_request(GPIO_FN_SDHICD0, NULL);
897 gpio_request(GPIO_FN_SDHIWP0, NULL);
898 gpio_request(GPIO_FN_SDHICMD0, NULL);
899 gpio_request(GPIO_FN_SDHICLK0, NULL);
900 gpio_request(GPIO_FN_SDHID0_3, NULL);
901 gpio_request(GPIO_FN_SDHID0_2, NULL);
902 gpio_request(GPIO_FN_SDHID0_1, NULL);
903 gpio_request(GPIO_FN_SDHID0_0, NULL);
904
9fa1b7fe
KM		 905 /* SDHI1 */
906 gpio_request(GPIO_FN_SDHICMD1, NULL);
907 gpio_request(GPIO_FN_SDHICLK1, NULL);
908 gpio_request(GPIO_FN_SDHID1_3, NULL);
909 gpio_request(GPIO_FN_SDHID1_2, NULL);
910 gpio_request(GPIO_FN_SDHID1_1, NULL);
911 gpio_request(GPIO_FN_SDHID1_0, NULL);
91cf5082 912
c8ee3d4b
KM		 913 /* MMCIF */
914 gpio_request(GPIO_FN_MMCD0_0, NULL);
915 gpio_request(GPIO_FN_MMCD0_1, NULL);
916 gpio_request(GPIO_FN_MMCD0_2, NULL);
917 gpio_request(GPIO_FN_MMCD0_3, NULL);
918 gpio_request(GPIO_FN_MMCD0_4, NULL);
919 gpio_request(GPIO_FN_MMCD0_5, NULL);
920 gpio_request(GPIO_FN_MMCD0_6, NULL);
921 gpio_request(GPIO_FN_MMCD0_7, NULL);
922 gpio_request(GPIO_FN_MMCCMD0, NULL);
923 gpio_request(GPIO_FN_MMCCLK0, NULL);
924
fb54d268
KM		 925 /* USB enable */
926 gpio_request(GPIO_FN_VBUS0_1, NULL);
927 gpio_request(GPIO_FN_IDIN_1_18, NULL);
928 gpio_request(GPIO_FN_PWEN_1_115, NULL);
929 gpio_request(GPIO_FN_OVCN_1_114, NULL);
930 gpio_request(GPIO_FN_EXTLP_1, NULL);
931 gpio_request(GPIO_FN_OVCN2_1, NULL);
932
933 /* setup USB phy */
934 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
935
cb9215e1
KM		 936 /* enable FSI2 */
937 gpio_request(GPIO_FN_FSIAIBT, NULL);
938 gpio_request(GPIO_FN_FSIAILR, NULL);
939 gpio_request(GPIO_FN_FSIAISLD, NULL);
940 gpio_request(GPIO_FN_FSIAOSLD, NULL);
941 gpio_request(GPIO_PORT161, NULL);
942 gpio_direction_output(GPIO_PORT161, 0); /* slave */
943
944 gpio_request(GPIO_PORT9, NULL);
945 gpio_request(GPIO_PORT10, NULL);
946 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
947 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
948
949 /* set SPU2 clock to 119.6 MHz */
950 clk = clk_get(NULL, "spu_clk");
2ae2b766 951 if (!IS_ERR(clk)) {
cb9215e1
KM		 952 clk_set_rate(clk, clk_round_rate(clk, 119600000));
953 clk_put(clk);
954 }
955
956 /* change parent of FSI A */
957 clk = clk_get(NULL, "fsia_clk");
2ae2b766 958 if (!IS_ERR(clk)) {
cb9215e1
KM		 959 clk_register(&fsiackcr_clk);
960 clk_set_parent(clk, &fsiackcr_clk);
961 clk_put(clk);
962 }
963
964 /*
965 * set irq priority, to avoid sound chopping
966 * when NFS rootfs is used
967 * FSI(3) > SMSC911X(2)
968 */
969 intc_set_priority(IRQ_FSI, 3);
970
971 i2c_register_board_info(0, i2c0_devices,
972 ARRAY_SIZE(i2c0_devices));
973
974 i2c_register_board_info(1, i2c1_devices,
975 ARRAY_SIZE(i2c1_devices));
976
9fa1b7fe
KM		 977#ifdef CONFIG_AP4EVB_QHD
978 /*
979 * QHD
980 */
981
982 /* enable KEYSC */
983 gpio_request(GPIO_FN_KEYOUT0, NULL);
984 gpio_request(GPIO_FN_KEYOUT1, NULL);
985 gpio_request(GPIO_FN_KEYOUT2, NULL);
986 gpio_request(GPIO_FN_KEYOUT3, NULL);
987 gpio_request(GPIO_FN_KEYOUT4, NULL);
988 gpio_request(GPIO_FN_KEYIN0_136, NULL);
989 gpio_request(GPIO_FN_KEYIN1_135, NULL);
990 gpio_request(GPIO_FN_KEYIN2_134, NULL);
991 gpio_request(GPIO_FN_KEYIN3_133, NULL);
992 gpio_request(GPIO_FN_KEYIN4, NULL);
993
994 /* enable TouchScreen */
9fa1b7fe
KM		 995 set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
996
997 tsc_device.irq = IRQ28;
998 i2c_register_board_info(1, &tsc_device, 1);
999
1000 /* LCDC0 */
1001 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1002 lcdc_info.ch[0].interface_type = RGB24;
1003 lcdc_info.ch[0].clock_divider = 1;
1004 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1005 lcdc_info.ch[0].lcd_cfg.name = "R63302(QHD)";
1006 lcdc_info.ch[0].lcd_cfg.xres = 544;
1007 lcdc_info.ch[0].lcd_cfg.yres = 961;
1008 lcdc_info.ch[0].lcd_cfg.left_margin = 72;
1009 lcdc_info.ch[0].lcd_cfg.right_margin = 600;
1010 lcdc_info.ch[0].lcd_cfg.hsync_len = 16;
1011 lcdc_info.ch[0].lcd_cfg.upper_margin = 8;
1012 lcdc_info.ch[0].lcd_cfg.lower_margin = 8;
1013 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
1014 lcdc_info.ch[0].lcd_cfg.sync = FB_SYNC_VERT_HIGH_ACT |
1015 FB_SYNC_HOR_HIGH_ACT;
1016 lcdc_info.ch[0].lcd_size_cfg.width = 44;
1017 lcdc_info.ch[0].lcd_size_cfg.height = 79;
1018
1019 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1020
1021#else
1022 /*
1023 * WVGA
1024 */
1025 gpio_request(GPIO_FN_LCDD17, NULL);
1026 gpio_request(GPIO_FN_LCDD16, NULL);
1027 gpio_request(GPIO_FN_LCDD15, NULL);
1028 gpio_request(GPIO_FN_LCDD14, NULL);
1029 gpio_request(GPIO_FN_LCDD13, NULL);
1030 gpio_request(GPIO_FN_LCDD12, NULL);
1031 gpio_request(GPIO_FN_LCDD11, NULL);
1032 gpio_request(GPIO_FN_LCDD10, NULL);
1033 gpio_request(GPIO_FN_LCDD9, NULL);
1034 gpio_request(GPIO_FN_LCDD8, NULL);
1035 gpio_request(GPIO_FN_LCDD7, NULL);
1036 gpio_request(GPIO_FN_LCDD6, NULL);
1037 gpio_request(GPIO_FN_LCDD5, NULL);
1038 gpio_request(GPIO_FN_LCDD4, NULL);
1039 gpio_request(GPIO_FN_LCDD3, NULL);
1040 gpio_request(GPIO_FN_LCDD2, NULL);
1041 gpio_request(GPIO_FN_LCDD1, NULL);
1042 gpio_request(GPIO_FN_LCDD0, NULL);
1043 gpio_request(GPIO_FN_LCDDISP, NULL);
1044 gpio_request(GPIO_FN_LCDDCK, NULL);
1045
1046 gpio_request(GPIO_PORT189, NULL); /* backlight */
1047 gpio_direction_output(GPIO_PORT189, 1);
1048
1049 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1050 gpio_direction_output(GPIO_PORT151, 1);
1051
1052 lcdc_info.clock_source = LCDC_CLK_BUS;
1053 lcdc_info.ch[0].interface_type = RGB18;
1054 lcdc_info.ch[0].clock_divider = 2;
1055 lcdc_info.ch[0].flags = 0;
1056 lcdc_info.ch[0].lcd_cfg.name = "WVGA Panel";
1057 lcdc_info.ch[0].lcd_cfg.xres = 800;
1058 lcdc_info.ch[0].lcd_cfg.yres = 480;
1059 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
1060 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
1061 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
1062 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
1063 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
1064 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
1065 lcdc_info.ch[0].lcd_cfg.sync = 0;
1066 lcdc_info.ch[0].lcd_size_cfg.width = 152;
1067 lcdc_info.ch[0].lcd_size_cfg.height = 91;
1068
1069 /* enable TouchScreen */
9fa1b7fe
KM		 1070 set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1071
1072 tsc_device.irq = IRQ7;
1073 i2c_register_board_info(0, &tsc_device, 1);
1074#endif /* CONFIG_AP4EVB_QHD */
341291a6 1075
2b7eda63
MD		 1076 sh7372_add_standard_devices();
1077
dfbcdf64
GL		 1078 /* HDMI */
1079 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1080 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1081
1082 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1083#define SRCR4 0xe61580bc
1084 srcr4 = __raw_readl(SRCR4);
1085 __raw_writel(srcr4 | (1 << 13), SRCR4);
1086 udelay(50);
1087 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1088
2b7eda63
MD		 1089 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1090}
1091
495b3cea
MD		 1092static void __init ap4evb_timer_init(void)
1093{
1094 sh7372_clock_init();
1095 shmobile_timer.init();
dfbcdf64
GL		 1096
1097 /* External clock source */
1098 clk_set_rate(&dv_clki_clk, 27000000);
495b3cea
MD		 1099}
1100
1101static struct sys_timer ap4evb_timer = {
1102 .init = ap4evb_timer_init,
1103};
1104
2b7eda63
MD		 1105MACHINE_START(AP4EVB, "ap4evb")
1106 .phys_io = 0xe6000000,
1107 .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
1108 .map_io = ap4evb_map_io,
1109 .init_irq = sh7372_init_irq,
1110 .init_machine = ap4evb_init,
495b3cea 1111 .timer = &ap4evb_timer,
2b7eda63 1112MACHINE_END
kernel source for telekom puls (alcatel/mediatek)