[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-sa1100 / generic.c

/*
 * linux/arch/arm/mach-sa1100/generic.c
 *
 * Author: Nicolas Pitre
 *
 * Code common to all SA11x0 machines.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/cpufreq.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>

#include <asm/div64.h>
#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/irq.h>
#include <asm/gpio.h>

#include "generic.h"

unsigned int reset_status;
EXPORT_SYMBOL(reset_status);

#define NR_FREQS	16

/*
 * This table is setup for a 3.6864MHz Crystal.
 */
static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
	 590,	/*  59.0 MHz */
	 737,	/*  73.7 MHz */
	 885,	/*  88.5 MHz */
	1032,	/* 103.2 MHz */
	1180,	/* 118.0 MHz */
	1327,	/* 132.7 MHz */
	1475,	/* 147.5 MHz */
	1622,	/* 162.2 MHz */
	1769,	/* 176.9 MHz */
	1917,	/* 191.7 MHz */
	2064,	/* 206.4 MHz */
	2212,	/* 221.2 MHz */
	2359,	/* 235.9 MHz */
	2507,	/* 250.7 MHz */
	2654,	/* 265.4 MHz */
	2802	/* 280.2 MHz */
};

/* rounds up(!)  */
unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
{
	int i;

	khz /= 100;

	for (i = 0; i < NR_FREQS; i++)
		if (cclk_frequency_100khz[i] >= khz)
			break;

	return i;
}

unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
{
	unsigned int freq = 0;
	if (idx < NR_FREQS)
		freq = cclk_frequency_100khz[idx] * 100;
	return freq;
}


/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
 * this platform, anyway.
 */
int sa11x0_verify_speed(struct cpufreq_policy *policy)
{
	unsigned int tmp;
	if (policy->cpu)
		return -EINVAL;

	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);

	/* make sure that at least one frequency is within the policy */
	tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
	if (tmp > policy->max)
		policy->max = tmp;

	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);

	return 0;
}

unsigned int sa11x0_getspeed(unsigned int cpu)
{
	if (cpu)
		return 0;
	return cclk_frequency_100khz[PPCR & 0xf] * 100;
}

/*
 * Default power-off for SA1100
 */
static void sa1100_power_off(void)
{
	mdelay(100);
	local_irq_disable();
	/* disable internal oscillator, float CS lines */
	PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
	/* enable wake-up on GPIO0 (Assabet...) */
	PWER = GFER = GRER = 1;
	/*
	 * set scratchpad to zero, just in case it is used as a
	 * restart address by the bootloader.
	 */
	PSPR = 0;
	/* enter sleep mode */
	PMCR = PMCR_SF;
}

static void sa11x0_register_device(struct platform_device *dev, void *data)
{
	int err;
	dev->dev.platform_data = data;
	err = platform_device_register(dev);
	if (err)
		printk(KERN_ERR "Unable to register device %s: %d\n",
			dev->name, err);
}


static struct resource sa11x0udc_resources[] = {
	[0] = {
		.start	= __PREG(Ser0UDCCR),
		.end	= __PREG(Ser0UDCCR) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser0UDC,
		.end	= IRQ_Ser0UDC,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 sa11x0udc_dma_mask = 0xffffffffUL;

static struct platform_device sa11x0udc_device = {
	.name		= "sa11x0-udc",
	.id		= -1,
	.dev		= {
		.dma_mask = &sa11x0udc_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0udc_resources),
	.resource	= sa11x0udc_resources,
};

static struct resource sa11x0uart1_resources[] = {
	[0] = {
		.start	= __PREG(Ser1UTCR0),
		.end	= __PREG(Ser1UTCR0) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser1UART,
		.end	= IRQ_Ser1UART,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device sa11x0uart1_device = {
	.name		= "sa11x0-uart",
	.id		= 1,
	.num_resources	= ARRAY_SIZE(sa11x0uart1_resources),
	.resource	= sa11x0uart1_resources,
};

static struct resource sa11x0uart3_resources[] = {
	[0] = {
		.start	= __PREG(Ser3UTCR0),
		.end	= __PREG(Ser3UTCR0) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser3UART,
		.end	= IRQ_Ser3UART,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device sa11x0uart3_device = {
	.name		= "sa11x0-uart",
	.id		= 3,
	.num_resources	= ARRAY_SIZE(sa11x0uart3_resources),
	.resource	= sa11x0uart3_resources,
};

static struct resource sa11x0mcp_resources[] = {
	[0] = {
		.start	= __PREG(Ser4MCCR0),
		.end	= __PREG(Ser4MCCR0) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser4MCP,
		.end	= IRQ_Ser4MCP,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 sa11x0mcp_dma_mask = 0xffffffffUL;

static struct platform_device sa11x0mcp_device = {
	.name		= "sa11x0-mcp",
	.id		= -1,
	.dev = {
		.dma_mask = &sa11x0mcp_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0mcp_resources),
	.resource	= sa11x0mcp_resources,
};

void sa11x0_register_mcp(struct mcp_plat_data *data)
{
	sa11x0_register_device(&sa11x0mcp_device, data);
}

static struct resource sa11x0ssp_resources[] = {
	[0] = {
		.start	= 0x80070000,
		.end	= 0x8007ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser4SSP,
		.end	= IRQ_Ser4SSP,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 sa11x0ssp_dma_mask = 0xffffffffUL;

static struct platform_device sa11x0ssp_device = {
	.name		= "sa11x0-ssp",
	.id		= -1,
	.dev = {
		.dma_mask = &sa11x0ssp_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0ssp_resources),
	.resource	= sa11x0ssp_resources,
};

static struct resource sa11x0fb_resources[] = {
	[0] = {
		.start	= 0xb0100000,
		.end	= 0xb010ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device sa11x0fb_device = {
	.name		= "sa11x0-fb",
	.id		= -1,
	.dev = {
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0fb_resources),
	.resource	= sa11x0fb_resources,
};

static struct platform_device sa11x0pcmcia_device = {
	.name		= "sa11x0-pcmcia",
	.id		= -1,
};

static struct platform_device sa11x0mtd_device = {
	.name		= "sa1100-mtd",
	.id		= -1,
};

void sa11x0_register_mtd(struct flash_platform_data *flash,
			 struct resource *res, int nr)
{
	flash->name = "sa1100";
	sa11x0mtd_device.resource = res;
	sa11x0mtd_device.num_resources = nr;
	sa11x0_register_device(&sa11x0mtd_device, flash);
}

static struct resource sa11x0ir_resources[] = {
	{
		.start	= __PREG(Ser2UTCR0),
		.end	= __PREG(Ser2UTCR0) + 0x24 - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= __PREG(Ser2HSCR0),
		.end	= __PREG(Ser2HSCR0) + 0x1c - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= __PREG(Ser2HSCR2),
		.end	= __PREG(Ser2HSCR2) + 0x04 - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_Ser2ICP,
		.end	= IRQ_Ser2ICP,
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device sa11x0ir_device = {
	.name		= "sa11x0-ir",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(sa11x0ir_resources),
	.resource	= sa11x0ir_resources,
};

void sa11x0_register_irda(struct irda_platform_data *irda)
{
	sa11x0_register_device(&sa11x0ir_device, irda);
}

static struct platform_device sa11x0rtc_device = {
	.name		= "sa1100-rtc",
	.id		= -1,
};

static struct platform_device *sa11x0_devices[] __initdata = {
	&sa11x0udc_device,
	&sa11x0uart1_device,
	&sa11x0uart3_device,
	&sa11x0ssp_device,
	&sa11x0pcmcia_device,
	&sa11x0fb_device,
	&sa11x0rtc_device,
};

static int __init sa1100_init(void)
{
	pm_power_off = sa1100_power_off;
	return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
}

arch_initcall(sa1100_init);

void (*sa1100fb_backlight_power)(int on);
void (*sa1100fb_lcd_power)(int on);

EXPORT_SYMBOL(sa1100fb_backlight_power);
EXPORT_SYMBOL(sa1100fb_lcd_power);


/*
 * Common I/O mapping:
 *
 * Typically, static virtual address mappings are as follow:
 *
 * 0xf0000000-0xf3ffffff:	miscellaneous stuff (CPLDs, etc.)
 * 0xf4000000-0xf4ffffff:	SA-1111
 * 0xf5000000-0xf5ffffff:	reserved (used by cache flushing area)
 * 0xf6000000-0xfffeffff:	reserved (internal SA1100 IO defined above)
 * 0xffff0000-0xffff0fff:	SA1100 exception vectors
 * 0xffff2000-0xffff2fff:	Minicache copy_user_page area
 *
 * Below 0xe8000000 is reserved for vm allocation.
 *
 * The machine specific code must provide the extra mapping beside the
 * default mapping provided here.
 */

static struct map_desc standard_io_desc[] __initdata = {
	{	/* PCM */
		.virtual	=  0xf8000000,
		.pfn		= __phys_to_pfn(0x80000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* SCM */
		.virtual	=  0xfa000000,
		.pfn		= __phys_to_pfn(0x90000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* MER */
		.virtual	=  0xfc000000,
		.pfn		= __phys_to_pfn(0xa0000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* LCD + DMA */
		.virtual	=  0xfe000000,
		.pfn		= __phys_to_pfn(0xb0000000),
		.length		= 0x00200000,
		.type		= MT_DEVICE
	},
};

void __init sa1100_map_io(void)
{
	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
}

/*
 * Disable the memory bus request/grant signals on the SA1110 to
 * ensure that we don't receive spurious memory requests.  We set
 * the MBGNT signal false to ensure the SA1111 doesn't own the
 * SDRAM bus.
 */
void __init sa1110_mb_disable(void)
{
	unsigned long flags;

	local_irq_save(flags);
	
	PGSR &= ~GPIO_MBGNT;
	GPCR = GPIO_MBGNT;
	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;

	GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);

	local_irq_restore(flags);
}

/*
 * If the system is going to use the SA-1111 DMA engines, set up
 * the memory bus request/grant pins.
 */
void __devinit sa1110_mb_enable(void)
{
	unsigned long flags;

	local_irq_save(flags);

	PGSR &= ~GPIO_MBGNT;
	GPCR = GPIO_MBGNT;
	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;

	GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
	TUCR |= TUCR_MR;

	local_irq_restore(flags);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-sa1100/generic.c
	3	*
	4	* Author: Nicolas Pitre
	5	*
	6	* Code common to all SA11x0 machines.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
1da177e4 LT	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/delay.h>
	16	#include <linux/pm.h>
	17	#include <linux/cpufreq.h>
	18	#include <linux/ioport.h>
d052d1be	19	#include <linux/platform_device.h>
1da177e4 LT	20
1da177e4 LT	21	#include <asm/div64.h>
a09e64fb	22	#include <mach/hardware.h>
1da177e4	23	#include <asm/system.h>
1da177e4	24	#include <asm/mach/map.h>
14e66f76	25	#include <asm/mach/flash.h>
1da177e4	26	#include <asm/irq.h>
aeb3f6d1	27	#include <asm/gpio.h>
1da177e4 LT	28
	29	#include "generic.h"
	30
04fef228 EM	31	unsigned int reset_status;
	32	EXPORT_SYMBOL(reset_status);
	33
1da177e4 LT	34	#define NR_FREQS 16
	35
	36	/*
	37	* This table is setup for a 3.6864MHz Crystal.
	38	*/
	39	static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
	40	590, /* 59.0 MHz */
	41	737, /* 73.7 MHz */
bda03086	42	885, /* 88.5 MHz */
1da177e4 LT	43	1032, /* 103.2 MHz */
	44	1180, /* 118.0 MHz */
	45	1327, /* 132.7 MHz */
	46	1475, /* 147.5 MHz */
	47	1622, /* 162.2 MHz */
	48	1769, /* 176.9 MHz */
	49	1917, /* 191.7 MHz */
	50	2064, /* 206.4 MHz */
	51	2212, /* 221.2 MHz */
bda03086 KE	52	2359, /* 235.9 MHz */
	53	2507, /* 250.7 MHz */
	54	2654, /* 265.4 MHz */
	55	2802 /* 280.2 MHz */
1da177e4 LT	56	};
1da177e4 LT	57
1da177e4 LT	58	/* rounds up(!) */
	59	unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
	60	{
	61	int i;
	62
	63	khz /= 100;
	64
	65	for (i = 0; i < NR_FREQS; i++)
	66	if (cclk_frequency_100khz[i] >= khz)
	67	break;
	68
	69	return i;
	70	}
	71
	72	unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
	73	{
	74	unsigned int freq = 0;
	75	if (idx < NR_FREQS)
	76	freq = cclk_frequency_100khz[idx] * 100;
	77	return freq;
	78	}
	79
	80
	81	/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
	82	* this platform, anyway.
	83	*/
	84	int sa11x0_verify_speed(struct cpufreq_policy *policy)
	85	{
	86	unsigned int tmp;
	87	if (policy->cpu)
	88	return -EINVAL;
	89
	90	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
	91
	92	/* make sure that at least one frequency is within the policy */
	93	tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
	94	if (tmp > policy->max)
	95	policy->max = tmp;
	96
	97	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
	98
	99	return 0;
	100	}
	101
	102	unsigned int sa11x0_getspeed(unsigned int cpu)
	103	{
	104	if (cpu)
	105	return 0;
	106	return cclk_frequency_100khz[PPCR & 0xf] * 100;
	107	}
	108
1da177e4 LT	109	/*
	110	* Default power-off for SA1100
	111	*/
	112	static void sa1100_power_off(void)
	113	{
	114	mdelay(100);
	115	local_irq_disable();
	116	/* disable internal oscillator, float CS lines */
	117	PCFR = (PCFR_OPDE \| PCFR_FP \| PCFR_FS);
	118	/* enable wake-up on GPIO0 (Assabet...) */
	119	PWER = GFER = GRER = 1;
	120	/*
	121	* set scratchpad to zero, just in case it is used as a
	122	* restart address by the bootloader.
	123	*/
	124	PSPR = 0;
	125	/* enter sleep mode */
	126	PMCR = PMCR_SF;
	127	}
	128
7a5b4e16 RK	129	static void sa11x0_register_device(struct platform_device dev, void data)
	130	{
	131	int err;
	132	dev->dev.platform_data = data;
	133	err = platform_device_register(dev);
	134	if (err)
	135	printk(KERN_ERR "Unable to register device %s: %d\n",
	136	dev->name, err);
	137	}
	138
	139
1da177e4 LT	140	static struct resource sa11x0udc_resources[] = {
1da177e4 LT	141	[0] = {
cf562b4a JF	142	.start = __PREG(Ser0UDCCR),
cf562b4a JF	143	.end = __PREG(Ser0UDCCR) + 0xffff,
1da177e4 LT	144	.flags = IORESOURCE_MEM,
1da177e4 LT	145	},
cf562b4a JF	146	[1] = {
	147	.start = IRQ_Ser0UDC,
	148	.end = IRQ_Ser0UDC,
	149	.flags = IORESOURCE_IRQ,
	150	},
1da177e4 LT	151	};
	152
	153	static u64 sa11x0udc_dma_mask = 0xffffffffUL;
	154
	155	static struct platform_device sa11x0udc_device = {
	156	.name = "sa11x0-udc",
	157	.id = -1,
	158	.dev = {
	159	.dma_mask = &sa11x0udc_dma_mask,
	160	.coherent_dma_mask = 0xffffffff,
	161	},
	162	.num_resources = ARRAY_SIZE(sa11x0udc_resources),
	163	.resource = sa11x0udc_resources,
	164	};
	165
	166	static struct resource sa11x0uart1_resources[] = {
	167	[0] = {
cf562b4a JF	168	.start = __PREG(Ser1UTCR0),
cf562b4a JF	169	.end = __PREG(Ser1UTCR0) + 0xffff,
1da177e4 LT	170	.flags = IORESOURCE_MEM,
1da177e4 LT	171	},
cf562b4a JF	172	[1] = {
	173	.start = IRQ_Ser1UART,
	174	.end = IRQ_Ser1UART,
	175	.flags = IORESOURCE_IRQ,
	176	},
1da177e4 LT	177	};
	178
	179	static struct platform_device sa11x0uart1_device = {
	180	.name = "sa11x0-uart",
	181	.id = 1,
	182	.num_resources = ARRAY_SIZE(sa11x0uart1_resources),
	183	.resource = sa11x0uart1_resources,
	184	};
	185
	186	static struct resource sa11x0uart3_resources[] = {
	187	[0] = {
cf562b4a JF	188	.start = __PREG(Ser3UTCR0),
cf562b4a JF	189	.end = __PREG(Ser3UTCR0) + 0xffff,
1da177e4 LT	190	.flags = IORESOURCE_MEM,
1da177e4 LT	191	},
cf562b4a JF	192	[1] = {
	193	.start = IRQ_Ser3UART,
	194	.end = IRQ_Ser3UART,
	195	.flags = IORESOURCE_IRQ,
	196	},
1da177e4 LT	197	};
	198
	199	static struct platform_device sa11x0uart3_device = {
	200	.name = "sa11x0-uart",
	201	.id = 3,
	202	.num_resources = ARRAY_SIZE(sa11x0uart3_resources),
	203	.resource = sa11x0uart3_resources,
	204	};
	205
	206	static struct resource sa11x0mcp_resources[] = {
	207	[0] = {
cf562b4a JF	208	.start = __PREG(Ser4MCCR0),
cf562b4a JF	209	.end = __PREG(Ser4MCCR0) + 0xffff,
1da177e4 LT	210	.flags = IORESOURCE_MEM,
1da177e4 LT	211	},
cf562b4a JF	212	[1] = {
	213	.start = IRQ_Ser4MCP,
	214	.end = IRQ_Ser4MCP,
	215	.flags = IORESOURCE_IRQ,
	216	},
1da177e4 LT	217	};
	218
	219	static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
	220
	221	static struct platform_device sa11x0mcp_device = {
	222	.name = "sa11x0-mcp",
	223	.id = -1,
	224	.dev = {
	225	.dma_mask = &sa11x0mcp_dma_mask,
	226	.coherent_dma_mask = 0xffffffff,
	227	},
	228	.num_resources = ARRAY_SIZE(sa11x0mcp_resources),
	229	.resource = sa11x0mcp_resources,
	230	};
	231
7a5b4e16	232	void sa11x0_register_mcp(struct mcp_plat_data *data)
323cdfc1	233	{
7a5b4e16	234	sa11x0_register_device(&sa11x0mcp_device, data);
323cdfc1 RK	235	}
323cdfc1 RK	236
1da177e4 LT	237	static struct resource sa11x0ssp_resources[] = {
	238	[0] = {
	239	.start = 0x80070000,
	240	.end = 0x8007ffff,
	241	.flags = IORESOURCE_MEM,
	242	},
cf562b4a JF	243	[1] = {
	244	.start = IRQ_Ser4SSP,
	245	.end = IRQ_Ser4SSP,
	246	.flags = IORESOURCE_IRQ,
	247	},
1da177e4 LT	248	};
	249
	250	static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
	251
	252	static struct platform_device sa11x0ssp_device = {
	253	.name = "sa11x0-ssp",
	254	.id = -1,
	255	.dev = {
	256	.dma_mask = &sa11x0ssp_dma_mask,
	257	.coherent_dma_mask = 0xffffffff,
	258	},
	259	.num_resources = ARRAY_SIZE(sa11x0ssp_resources),
	260	.resource = sa11x0ssp_resources,
	261	};
	262
	263	static struct resource sa11x0fb_resources[] = {
	264	[0] = {
	265	.start = 0xb0100000,
	266	.end = 0xb010ffff,
	267	.flags = IORESOURCE_MEM,
	268	},
	269	[1] = {
	270	.start = IRQ_LCD,
	271	.end = IRQ_LCD,
	272	.flags = IORESOURCE_IRQ,
	273	},
	274	};
	275
	276	static struct platform_device sa11x0fb_device = {
	277	.name = "sa11x0-fb",
	278	.id = -1,
	279	.dev = {
	280	.coherent_dma_mask = 0xffffffff,
	281	},
	282	.num_resources = ARRAY_SIZE(sa11x0fb_resources),
	283	.resource = sa11x0fb_resources,
	284	};
	285
	286	static struct platform_device sa11x0pcmcia_device = {
	287	.name = "sa11x0-pcmcia",
	288	.id = -1,
	289	};
	290
	291	static struct platform_device sa11x0mtd_device = {
bcc8f3e0	292	.name = "sa1100-mtd",
1da177e4 LT	293	.id = -1,
	294	};
	295
7a5b4e16 RK	296	void sa11x0_register_mtd(struct flash_platform_data *flash,
7a5b4e16 RK	297	struct resource *res, int nr)
1da177e4	298	{
14e66f76	299	flash->name = "sa1100";
1da177e4 LT	300	sa11x0mtd_device.resource = res;
1da177e4 LT	301	sa11x0mtd_device.num_resources = nr;
7a5b4e16	302	sa11x0_register_device(&sa11x0mtd_device, flash);
1da177e4 LT	303	}
	304
	305	static struct resource sa11x0ir_resources[] = {
	306	{
	307	.start = __PREG(Ser2UTCR0),
	308	.end = __PREG(Ser2UTCR0) + 0x24 - 1,
	309	.flags = IORESOURCE_MEM,
	310	}, {
	311	.start = __PREG(Ser2HSCR0),
	312	.end = __PREG(Ser2HSCR0) + 0x1c - 1,
	313	.flags = IORESOURCE_MEM,
	314	}, {
	315	.start = __PREG(Ser2HSCR2),
	316	.end = __PREG(Ser2HSCR2) + 0x04 - 1,
	317	.flags = IORESOURCE_MEM,
	318	}, {
	319	.start = IRQ_Ser2ICP,
	320	.end = IRQ_Ser2ICP,
	321	.flags = IORESOURCE_IRQ,
	322	}
	323	};
	324
	325	static struct platform_device sa11x0ir_device = {
	326	.name = "sa11x0-ir",
	327	.id = -1,
	328	.num_resources = ARRAY_SIZE(sa11x0ir_resources),
	329	.resource = sa11x0ir_resources,
	330	};
	331
7a5b4e16	332	void sa11x0_register_irda(struct irda_platform_data *irda)
1da177e4	333	{
7a5b4e16	334	sa11x0_register_device(&sa11x0ir_device, irda);
1da177e4 LT	335	}
1da177e4 LT	336
e842f1c8 RP	337	static struct platform_device sa11x0rtc_device = {
	338	.name = "sa1100-rtc",
	339	.id = -1,
	340	};
	341
1da177e4 LT	342	static struct platform_device *sa11x0_devices[] __initdata = {
	343	&sa11x0udc_device,
	344	&sa11x0uart1_device,
	345	&sa11x0uart3_device,
1da177e4 LT	346	&sa11x0ssp_device,
	347	&sa11x0pcmcia_device,
	348	&sa11x0fb_device,
e842f1c8	349	&sa11x0rtc_device,
1da177e4 LT	350	};
	351
	352	static int __init sa1100_init(void)
	353	{
	354	pm_power_off = sa1100_power_off;
1da177e4 LT	355	return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
	356	}
	357
	358	arch_initcall(sa1100_init);
	359
	360	void (*sa1100fb_backlight_power)(int on);
	361	void (*sa1100fb_lcd_power)(int on);
	362
	363	EXPORT_SYMBOL(sa1100fb_backlight_power);
	364	EXPORT_SYMBOL(sa1100fb_lcd_power);
	365
	366
	367	/*
	368	* Common I/O mapping:
	369	*
	370	* Typically, static virtual address mappings are as follow:
	371	*
	372	* 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
	373	* 0xf4000000-0xf4ffffff: SA-1111
	374	* 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
	375	* 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
	376	* 0xffff0000-0xffff0fff: SA1100 exception vectors
	377	* 0xffff2000-0xffff2fff: Minicache copy_user_page area
	378	*
	379	* Below 0xe8000000 is reserved for vm allocation.
	380	*
	381	* The machine specific code must provide the extra mapping beside the
	382	* default mapping provided here.
	383	*/
	384
	385	static struct map_desc standard_io_desc[] __initdata = {
bda03086	386	{ /* PCM */
92519d82 DS	387	.virtual = 0xf8000000,
	388	.pfn = __phys_to_pfn(0x80000000),
	389	.length = 0x00100000,
	390	.type = MT_DEVICE
	391	}, { /* SCM */
	392	.virtual = 0xfa000000,
	393	.pfn = __phys_to_pfn(0x90000000),
	394	.length = 0x00100000,
	395	.type = MT_DEVICE
	396	}, { /* MER */
	397	.virtual = 0xfc000000,
	398	.pfn = __phys_to_pfn(0xa0000000),
	399	.length = 0x00100000,
	400	.type = MT_DEVICE
	401	}, { /* LCD + DMA */
	402	.virtual = 0xfe000000,
	403	.pfn = __phys_to_pfn(0xb0000000),
	404	.length = 0x00200000,
	405	.type = MT_DEVICE
	406	},
1da177e4 LT	407	};
	408
	409	void __init sa1100_map_io(void)
	410	{
	411	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	412	}
	413
	414	/*
	415	* Disable the memory bus request/grant signals on the SA1110 to
	416	* ensure that we don't receive spurious memory requests. We set
	417	* the MBGNT signal false to ensure the SA1111 doesn't own the
	418	* SDRAM bus.
	419	*/
	420	void __init sa1110_mb_disable(void)
	421	{
	422	unsigned long flags;
	423
	424	local_irq_save(flags);
	425
	426	PGSR &= ~GPIO_MBGNT;
	427	GPCR = GPIO_MBGNT;
	428	GPDR = (GPDR & ~GPIO_MBREQ) \| GPIO_MBGNT;
	429
	430	GAFR &= ~(GPIO_MBGNT \| GPIO_MBREQ);
	431
	432	local_irq_restore(flags);
	433	}
	434
	435	/*
	436	* If the system is going to use the SA-1111 DMA engines, set up
	437	* the memory bus request/grant pins.
	438	*/
85e6c7a7	439	void __devinit sa1110_mb_enable(void)
1da177e4 LT	440	{
	441	unsigned long flags;
	442
	443	local_irq_save(flags);
	444
	445	PGSR &= ~GPIO_MBGNT;
	446	GPCR = GPIO_MBGNT;
	447	GPDR = (GPDR & ~GPIO_MBREQ) \| GPIO_MBGNT;
	448
	449	GAFR \|= (GPIO_MBGNT \| GPIO_MBREQ);
	450	TUCR \|= TUCR_MR;
	451
	452	local_irq_restore(flags);
	453	}
	454