[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-sa1100 / generic.c

/*
 * linux/arch/arm/mach-sa1100/generic.c
 *
 * Author: Nicolas Pitre
 *
 * Code common to all SA11x0 machines.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/cpufreq.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>

#include <asm/div64.h>
#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/irq.h>
#include <asm/gpio.h>

#include "generic.h"

unsigned int reset_status;
EXPORT_SYMBOL(reset_status);

#define NR_FREQS	16

/*
 * This table is setup for a 3.6864MHz Crystal.
 */
static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
	 590,	/*  59.0 MHz */
	 737,	/*  73.7 MHz */
	 885,	/*  88.5 MHz */
	1032,	/* 103.2 MHz */
	1180,	/* 118.0 MHz */
	1327,	/* 132.7 MHz */
	1475,	/* 147.5 MHz */
	1622,	/* 162.2 MHz */
	1769,	/* 176.9 MHz */
	1917,	/* 191.7 MHz */
	2064,	/* 206.4 MHz */
	2212,	/* 221.2 MHz */
	2359,	/* 235.9 MHz */
	2507,	/* 250.7 MHz */
	2654,	/* 265.4 MHz */
	2802	/* 280.2 MHz */
};

/* rounds up(!)  */
unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
{
	int i;

	khz /= 100;

	for (i = 0; i < NR_FREQS; i++)
		if (cclk_frequency_100khz[i] >= khz)
			break;

	return i;
}

unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
{
	unsigned int freq = 0;
	if (idx < NR_FREQS)
		freq = cclk_frequency_100khz[idx] * 100;
	return freq;
}


/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
 * this platform, anyway.
 */
int sa11x0_verify_speed(struct cpufreq_policy *policy)
{
	unsigned int tmp;
	if (policy->cpu)
		return -EINVAL;

	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);

	/* make sure that at least one frequency is within the policy */
	tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
	if (tmp > policy->max)
		policy->max = tmp;

	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);

	return 0;
}

unsigned int sa11x0_getspeed(unsigned int cpu)
{
	if (cpu)
		return 0;
	return cclk_frequency_100khz[PPCR & 0xf] * 100;
}

/*
 * Default power-off for SA1100
 */
static void sa1100_power_off(void)
{
	mdelay(100);
	local_irq_disable();
	/* disable internal oscillator, float CS lines */
	PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
	/* enable wake-up on GPIO0 (Assabet...) */
	PWER = GFER = GRER = 1;
	/*
	 * set scratchpad to zero, just in case it is used as a
	 * restart address by the bootloader.
	 */
	PSPR = 0;
	/* enter sleep mode */
	PMCR = PMCR_SF;
}

static void sa11x0_register_device(struct platform_device *dev, void *data)
{
	int err;
	dev->dev.platform_data = data;
	err = platform_device_register(dev);
	if (err)
		printk(KERN_ERR "Unable to register device %s: %d\n",
			dev->name, err);
}


static struct resource sa11x0udc_resources[] = {
	[0] = {
		.start	= __PREG(Ser0UDCCR),
		.end	= __PREG(Ser0UDCCR) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser0UDC,
		.end	= IRQ_Ser0UDC,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 sa11x0udc_dma_mask = 0xffffffffUL;

static struct platform_device sa11x0udc_device = {
	.name		= "sa11x0-udc",
	.id		= -1,
	.dev		= {
		.dma_mask = &sa11x0udc_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0udc_resources),
	.resource	= sa11x0udc_resources,
};

static struct resource sa11x0uart1_resources[] = {
	[0] = {
		.start	= __PREG(Ser1UTCR0),
		.end	= __PREG(Ser1UTCR0) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser1UART,
		.end	= IRQ_Ser1UART,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device sa11x0uart1_device = {
	.name		= "sa11x0-uart",
	.id		= 1,
	.num_resources	= ARRAY_SIZE(sa11x0uart1_resources),
	.resource	= sa11x0uart1_resources,
};

static struct resource sa11x0uart3_resources[] = {
	[0] = {
		.start	= __PREG(Ser3UTCR0),
		.end	= __PREG(Ser3UTCR0) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser3UART,
		.end	= IRQ_Ser3UART,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device sa11x0uart3_device = {
	.name		= "sa11x0-uart",
	.id		= 3,
	.num_resources	= ARRAY_SIZE(sa11x0uart3_resources),
	.resource	= sa11x0uart3_resources,
};

static struct resource sa11x0mcp_resources[] = {
	[0] = {
		.start	= __PREG(Ser4MCCR0),
		.end	= __PREG(Ser4MCCR0) + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser4MCP,
		.end	= IRQ_Ser4MCP,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 sa11x0mcp_dma_mask = 0xffffffffUL;

static struct platform_device sa11x0mcp_device = {
	.name		= "sa11x0-mcp",
	.id		= -1,
	.dev = {
		.dma_mask = &sa11x0mcp_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0mcp_resources),
	.resource	= sa11x0mcp_resources,
};

void sa11x0_register_mcp(struct mcp_plat_data *data)
{
	sa11x0_register_device(&sa11x0mcp_device, data);
}

static struct resource sa11x0ssp_resources[] = {
	[0] = {
		.start	= 0x80070000,
		.end	= 0x8007ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_Ser4SSP,
		.end	= IRQ_Ser4SSP,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 sa11x0ssp_dma_mask = 0xffffffffUL;

static struct platform_device sa11x0ssp_device = {
	.name		= "sa11x0-ssp",
	.id		= -1,
	.dev = {
		.dma_mask = &sa11x0ssp_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0ssp_resources),
	.resource	= sa11x0ssp_resources,
};

static struct resource sa11x0fb_resources[] = {
	[0] = {
		.start	= 0xb0100000,
		.end	= 0xb010ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device sa11x0fb_device = {
	.name		= "sa11x0-fb",
	.id		= -1,
	.dev = {
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(sa11x0fb_resources),
	.resource	= sa11x0fb_resources,
};

static struct platform_device sa11x0pcmcia_device = {
	.name		= "sa11x0-pcmcia",
	.id		= -1,
};

static struct platform_device sa11x0mtd_device = {
	.name		= "sa1100-mtd",
	.id		= -1,
};

void sa11x0_register_mtd(struct flash_platform_data *flash,
			 struct resource *res, int nr)
{
	flash->name = "sa1100";
	sa11x0mtd_device.resource = res;
	sa11x0mtd_device.num_resources = nr;
	sa11x0_register_device(&sa11x0mtd_device, flash);
}

static struct resource sa11x0ir_resources[] = {
	{
		.start	= __PREG(Ser2UTCR0),
		.end	= __PREG(Ser2UTCR0) + 0x24 - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= __PREG(Ser2HSCR0),
		.end	= __PREG(Ser2HSCR0) + 0x1c - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= __PREG(Ser2HSCR2),
		.end	= __PREG(Ser2HSCR2) + 0x04 - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_Ser2ICP,
		.end	= IRQ_Ser2ICP,
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device sa11x0ir_device = {
	.name		= "sa11x0-ir",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(sa11x0ir_resources),
	.resource	= sa11x0ir_resources,
};

void sa11x0_register_irda(struct irda_platform_data *irda)
{
	sa11x0_register_device(&sa11x0ir_device, irda);
}

static struct platform_device sa11x0rtc_device = {
	.name		= "sa1100-rtc",
	.id		= -1,
};

static struct platform_device *sa11x0_devices[] __initdata = {
	&sa11x0udc_device,
	&sa11x0uart1_device,
	&sa11x0uart3_device,
	&sa11x0ssp_device,
	&sa11x0pcmcia_device,
	&sa11x0fb_device,
	&sa11x0rtc_device,
};

static int __init sa1100_init(void)
{
	pm_power_off = sa1100_power_off;
	return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
}

arch_initcall(sa1100_init);

void (*sa1100fb_backlight_power)(int on);
void (*sa1100fb_lcd_power)(int on);

EXPORT_SYMBOL(sa1100fb_backlight_power);
EXPORT_SYMBOL(sa1100fb_lcd_power);


/*
 * Common I/O mapping:
 *
 * Typically, static virtual address mappings are as follow:
 *
 * 0xf0000000-0xf3ffffff:	miscellaneous stuff (CPLDs, etc.)
 * 0xf4000000-0xf4ffffff:	SA-1111
 * 0xf5000000-0xf5ffffff:	reserved (used by cache flushing area)
 * 0xf6000000-0xfffeffff:	reserved (internal SA1100 IO defined above)
 * 0xffff0000-0xffff0fff:	SA1100 exception vectors
 * 0xffff2000-0xffff2fff:	Minicache copy_user_page area
 *
 * Below 0xe8000000 is reserved for vm allocation.
 *
 * The machine specific code must provide the extra mapping beside the
 * default mapping provided here.
 */

static struct map_desc standard_io_desc[] __initdata = {
	{	/* PCM */
		.virtual	=  0xf8000000,
		.pfn		= __phys_to_pfn(0x80000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* SCM */
		.virtual	=  0xfa000000,
		.pfn		= __phys_to_pfn(0x90000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* MER */
		.virtual	=  0xfc000000,
		.pfn		= __phys_to_pfn(0xa0000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* LCD + DMA */
		.virtual	=  0xfe000000,
		.pfn		= __phys_to_pfn(0xb0000000),
		.length		= 0x00200000,
		.type		= MT_DEVICE
	},
};

void __init sa1100_map_io(void)
{
	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
}

/*
 * Disable the memory bus request/grant signals on the SA1110 to
 * ensure that we don't receive spurious memory requests.  We set
 * the MBGNT signal false to ensure the SA1111 doesn't own the
 * SDRAM bus.
 */
void __init sa1110_mb_disable(void)
{
	unsigned long flags;

	local_irq_save(flags);
	
	PGSR &= ~GPIO_MBGNT;
	GPCR = GPIO_MBGNT;
	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;

	GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);

	local_irq_restore(flags);
}

/*
 * If the system is going to use the SA-1111 DMA engines, set up
 * the memory bus request/grant pins.
 */
void __devinit sa1110_mb_enable(void)
{
	unsigned long flags;

	local_irq_save(flags);

	PGSR &= ~GPIO_MBGNT;
	GPCR = GPIO_MBGNT;
	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;

	GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
	TUCR |= TUCR_MR;

	local_irq_restore(flags);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-sa1100/generic.c
	3	*
	4	* Author: Nicolas Pitre
	5	*
	6	* Code common to all SA11x0 machines.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
1da177e4 LT	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/delay.h>
	16	#include <linux/pm.h>
	17	#include <linux/cpufreq.h>
	18	#include <linux/ioport.h>
d052d1be	19	#include <linux/platform_device.h>
1da177e4 LT	20
1da177e4 LT	21	#include <asm/div64.h>
a09e64fb	22	#include <mach/hardware.h>
1da177e4 LT	23	#include <asm/system.h>
	24	#include <asm/pgtable.h>
	25	#include <asm/mach/map.h>
14e66f76	26	#include <asm/mach/flash.h>
1da177e4	27	#include <asm/irq.h>
aeb3f6d1	28	#include <asm/gpio.h>
1da177e4 LT	29
	30	#include "generic.h"
	31
04fef228 EM	32	unsigned int reset_status;
	33	EXPORT_SYMBOL(reset_status);
	34
1da177e4 LT	35	#define NR_FREQS 16
	36
	37	/*
	38	* This table is setup for a 3.6864MHz Crystal.
	39	*/
	40	static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
	41	590, /* 59.0 MHz */
	42	737, /* 73.7 MHz */
bda03086	43	885, /* 88.5 MHz */
1da177e4 LT	44	1032, /* 103.2 MHz */
	45	1180, /* 118.0 MHz */
	46	1327, /* 132.7 MHz */
	47	1475, /* 147.5 MHz */
	48	1622, /* 162.2 MHz */
	49	1769, /* 176.9 MHz */
	50	1917, /* 191.7 MHz */
	51	2064, /* 206.4 MHz */
	52	2212, /* 221.2 MHz */
bda03086 KE	53	2359, /* 235.9 MHz */
	54	2507, /* 250.7 MHz */
	55	2654, /* 265.4 MHz */
	56	2802 /* 280.2 MHz */
1da177e4 LT	57	};
1da177e4 LT	58
1da177e4 LT	59	/* rounds up(!) */
	60	unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
	61	{
	62	int i;
	63
	64	khz /= 100;
	65
	66	for (i = 0; i < NR_FREQS; i++)
	67	if (cclk_frequency_100khz[i] >= khz)
	68	break;
	69
	70	return i;
	71	}
	72
	73	unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
	74	{
	75	unsigned int freq = 0;
	76	if (idx < NR_FREQS)
	77	freq = cclk_frequency_100khz[idx] * 100;
	78	return freq;
	79	}
	80
	81
	82	/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
	83	* this platform, anyway.
	84	*/
	85	int sa11x0_verify_speed(struct cpufreq_policy *policy)
	86	{
	87	unsigned int tmp;
	88	if (policy->cpu)
	89	return -EINVAL;
	90
	91	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
	92
	93	/* make sure that at least one frequency is within the policy */
	94	tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
	95	if (tmp > policy->max)
	96	policy->max = tmp;
	97
	98	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
	99
	100	return 0;
	101	}
	102
	103	unsigned int sa11x0_getspeed(unsigned int cpu)
	104	{
	105	if (cpu)
	106	return 0;
	107	return cclk_frequency_100khz[PPCR & 0xf] * 100;
	108	}
	109
1da177e4 LT	110	/*
	111	* Default power-off for SA1100
	112	*/
	113	static void sa1100_power_off(void)
	114	{
	115	mdelay(100);
	116	local_irq_disable();
	117	/* disable internal oscillator, float CS lines */
	118	PCFR = (PCFR_OPDE \| PCFR_FP \| PCFR_FS);
	119	/* enable wake-up on GPIO0 (Assabet...) */
	120	PWER = GFER = GRER = 1;
	121	/*
	122	* set scratchpad to zero, just in case it is used as a
	123	* restart address by the bootloader.
	124	*/
	125	PSPR = 0;
	126	/* enter sleep mode */
	127	PMCR = PMCR_SF;
	128	}
	129
7a5b4e16 RK	130	static void sa11x0_register_device(struct platform_device dev, void data)
	131	{
	132	int err;
	133	dev->dev.platform_data = data;
	134	err = platform_device_register(dev);
	135	if (err)
	136	printk(KERN_ERR "Unable to register device %s: %d\n",
	137	dev->name, err);
	138	}
	139
	140
1da177e4 LT	141	static struct resource sa11x0udc_resources[] = {
1da177e4 LT	142	[0] = {
cf562b4a JF	143	.start = __PREG(Ser0UDCCR),
cf562b4a JF	144	.end = __PREG(Ser0UDCCR) + 0xffff,
1da177e4 LT	145	.flags = IORESOURCE_MEM,
1da177e4 LT	146	},
cf562b4a JF	147	[1] = {
	148	.start = IRQ_Ser0UDC,
	149	.end = IRQ_Ser0UDC,
	150	.flags = IORESOURCE_IRQ,
	151	},
1da177e4 LT	152	};
	153
	154	static u64 sa11x0udc_dma_mask = 0xffffffffUL;
	155
	156	static struct platform_device sa11x0udc_device = {
	157	.name = "sa11x0-udc",
	158	.id = -1,
	159	.dev = {
	160	.dma_mask = &sa11x0udc_dma_mask,
	161	.coherent_dma_mask = 0xffffffff,
	162	},
	163	.num_resources = ARRAY_SIZE(sa11x0udc_resources),
	164	.resource = sa11x0udc_resources,
	165	};
	166
	167	static struct resource sa11x0uart1_resources[] = {
	168	[0] = {
cf562b4a JF	169	.start = __PREG(Ser1UTCR0),
cf562b4a JF	170	.end = __PREG(Ser1UTCR0) + 0xffff,
1da177e4 LT	171	.flags = IORESOURCE_MEM,
1da177e4 LT	172	},
cf562b4a JF	173	[1] = {
	174	.start = IRQ_Ser1UART,
	175	.end = IRQ_Ser1UART,
	176	.flags = IORESOURCE_IRQ,
	177	},
1da177e4 LT	178	};
	179
	180	static struct platform_device sa11x0uart1_device = {
	181	.name = "sa11x0-uart",
	182	.id = 1,
	183	.num_resources = ARRAY_SIZE(sa11x0uart1_resources),
	184	.resource = sa11x0uart1_resources,
	185	};
	186
	187	static struct resource sa11x0uart3_resources[] = {
	188	[0] = {
cf562b4a JF	189	.start = __PREG(Ser3UTCR0),
cf562b4a JF	190	.end = __PREG(Ser3UTCR0) + 0xffff,
1da177e4 LT	191	.flags = IORESOURCE_MEM,
1da177e4 LT	192	},
cf562b4a JF	193	[1] = {
	194	.start = IRQ_Ser3UART,
	195	.end = IRQ_Ser3UART,
	196	.flags = IORESOURCE_IRQ,
	197	},
1da177e4 LT	198	};
	199
	200	static struct platform_device sa11x0uart3_device = {
	201	.name = "sa11x0-uart",
	202	.id = 3,
	203	.num_resources = ARRAY_SIZE(sa11x0uart3_resources),
	204	.resource = sa11x0uart3_resources,
	205	};
	206
	207	static struct resource sa11x0mcp_resources[] = {
	208	[0] = {
cf562b4a JF	209	.start = __PREG(Ser4MCCR0),
cf562b4a JF	210	.end = __PREG(Ser4MCCR0) + 0xffff,
1da177e4 LT	211	.flags = IORESOURCE_MEM,
1da177e4 LT	212	},
cf562b4a JF	213	[1] = {
	214	.start = IRQ_Ser4MCP,
	215	.end = IRQ_Ser4MCP,
	216	.flags = IORESOURCE_IRQ,
	217	},
1da177e4 LT	218	};
	219
	220	static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
	221
	222	static struct platform_device sa11x0mcp_device = {
	223	.name = "sa11x0-mcp",
	224	.id = -1,
	225	.dev = {
	226	.dma_mask = &sa11x0mcp_dma_mask,
	227	.coherent_dma_mask = 0xffffffff,
	228	},
	229	.num_resources = ARRAY_SIZE(sa11x0mcp_resources),
	230	.resource = sa11x0mcp_resources,
	231	};
	232
7a5b4e16	233	void sa11x0_register_mcp(struct mcp_plat_data *data)
323cdfc1	234	{
7a5b4e16	235	sa11x0_register_device(&sa11x0mcp_device, data);
323cdfc1 RK	236	}
323cdfc1 RK	237
1da177e4 LT	238	static struct resource sa11x0ssp_resources[] = {
	239	[0] = {
	240	.start = 0x80070000,
	241	.end = 0x8007ffff,
	242	.flags = IORESOURCE_MEM,
	243	},
cf562b4a JF	244	[1] = {
	245	.start = IRQ_Ser4SSP,
	246	.end = IRQ_Ser4SSP,
	247	.flags = IORESOURCE_IRQ,
	248	},
1da177e4 LT	249	};
	250
	251	static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
	252
	253	static struct platform_device sa11x0ssp_device = {
	254	.name = "sa11x0-ssp",
	255	.id = -1,
	256	.dev = {
	257	.dma_mask = &sa11x0ssp_dma_mask,
	258	.coherent_dma_mask = 0xffffffff,
	259	},
	260	.num_resources = ARRAY_SIZE(sa11x0ssp_resources),
	261	.resource = sa11x0ssp_resources,
	262	};
	263
	264	static struct resource sa11x0fb_resources[] = {
	265	[0] = {
	266	.start = 0xb0100000,
	267	.end = 0xb010ffff,
	268	.flags = IORESOURCE_MEM,
	269	},
	270	[1] = {
	271	.start = IRQ_LCD,
	272	.end = IRQ_LCD,
	273	.flags = IORESOURCE_IRQ,
	274	},
	275	};
	276
	277	static struct platform_device sa11x0fb_device = {
	278	.name = "sa11x0-fb",
	279	.id = -1,
	280	.dev = {
	281	.coherent_dma_mask = 0xffffffff,
	282	},
	283	.num_resources = ARRAY_SIZE(sa11x0fb_resources),
	284	.resource = sa11x0fb_resources,
	285	};
	286
	287	static struct platform_device sa11x0pcmcia_device = {
	288	.name = "sa11x0-pcmcia",
	289	.id = -1,
	290	};
	291
	292	static struct platform_device sa11x0mtd_device = {
bcc8f3e0	293	.name = "sa1100-mtd",
1da177e4 LT	294	.id = -1,
	295	};
	296
7a5b4e16 RK	297	void sa11x0_register_mtd(struct flash_platform_data *flash,
7a5b4e16 RK	298	struct resource *res, int nr)
1da177e4	299	{
14e66f76	300	flash->name = "sa1100";
1da177e4 LT	301	sa11x0mtd_device.resource = res;
1da177e4 LT	302	sa11x0mtd_device.num_resources = nr;
7a5b4e16	303	sa11x0_register_device(&sa11x0mtd_device, flash);
1da177e4 LT	304	}
	305
	306	static struct resource sa11x0ir_resources[] = {
	307	{
	308	.start = __PREG(Ser2UTCR0),
	309	.end = __PREG(Ser2UTCR0) + 0x24 - 1,
	310	.flags = IORESOURCE_MEM,
	311	}, {
	312	.start = __PREG(Ser2HSCR0),
	313	.end = __PREG(Ser2HSCR0) + 0x1c - 1,
	314	.flags = IORESOURCE_MEM,
	315	}, {
	316	.start = __PREG(Ser2HSCR2),
	317	.end = __PREG(Ser2HSCR2) + 0x04 - 1,
	318	.flags = IORESOURCE_MEM,
	319	}, {
	320	.start = IRQ_Ser2ICP,
	321	.end = IRQ_Ser2ICP,
	322	.flags = IORESOURCE_IRQ,
	323	}
	324	};
	325
	326	static struct platform_device sa11x0ir_device = {
	327	.name = "sa11x0-ir",
	328	.id = -1,
	329	.num_resources = ARRAY_SIZE(sa11x0ir_resources),
	330	.resource = sa11x0ir_resources,
	331	};
	332
7a5b4e16	333	void sa11x0_register_irda(struct irda_platform_data *irda)
1da177e4	334	{
7a5b4e16	335	sa11x0_register_device(&sa11x0ir_device, irda);
1da177e4 LT	336	}
1da177e4 LT	337
e842f1c8 RP	338	static struct platform_device sa11x0rtc_device = {
	339	.name = "sa1100-rtc",
	340	.id = -1,
	341	};
	342
1da177e4 LT	343	static struct platform_device *sa11x0_devices[] __initdata = {
	344	&sa11x0udc_device,
	345	&sa11x0uart1_device,
	346	&sa11x0uart3_device,
1da177e4 LT	347	&sa11x0ssp_device,
	348	&sa11x0pcmcia_device,
	349	&sa11x0fb_device,
e842f1c8	350	&sa11x0rtc_device,
1da177e4 LT	351	};
	352
	353	static int __init sa1100_init(void)
	354	{
	355	pm_power_off = sa1100_power_off;
1da177e4 LT	356	return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
	357	}
	358
	359	arch_initcall(sa1100_init);
	360
	361	void (*sa1100fb_backlight_power)(int on);
	362	void (*sa1100fb_lcd_power)(int on);
	363
	364	EXPORT_SYMBOL(sa1100fb_backlight_power);
	365	EXPORT_SYMBOL(sa1100fb_lcd_power);
	366
	367
	368	/*
	369	* Common I/O mapping:
	370	*
	371	* Typically, static virtual address mappings are as follow:
	372	*
	373	* 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
	374	* 0xf4000000-0xf4ffffff: SA-1111
	375	* 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
	376	* 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
	377	* 0xffff0000-0xffff0fff: SA1100 exception vectors
	378	* 0xffff2000-0xffff2fff: Minicache copy_user_page area
	379	*
	380	* Below 0xe8000000 is reserved for vm allocation.
	381	*
	382	* The machine specific code must provide the extra mapping beside the
	383	* default mapping provided here.
	384	*/
	385
	386	static struct map_desc standard_io_desc[] __initdata = {
bda03086	387	{ /* PCM */
92519d82 DS	388	.virtual = 0xf8000000,
	389	.pfn = __phys_to_pfn(0x80000000),
	390	.length = 0x00100000,
	391	.type = MT_DEVICE
	392	}, { /* SCM */
	393	.virtual = 0xfa000000,
	394	.pfn = __phys_to_pfn(0x90000000),
	395	.length = 0x00100000,
	396	.type = MT_DEVICE
	397	}, { /* MER */
	398	.virtual = 0xfc000000,
	399	.pfn = __phys_to_pfn(0xa0000000),
	400	.length = 0x00100000,
	401	.type = MT_DEVICE
	402	}, { /* LCD + DMA */
	403	.virtual = 0xfe000000,
	404	.pfn = __phys_to_pfn(0xb0000000),
	405	.length = 0x00200000,
	406	.type = MT_DEVICE
	407	},
1da177e4 LT	408	};
	409
	410	void __init sa1100_map_io(void)
	411	{
	412	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	413	}
	414
	415	/*
	416	* Disable the memory bus request/grant signals on the SA1110 to
	417	* ensure that we don't receive spurious memory requests. We set
	418	* the MBGNT signal false to ensure the SA1111 doesn't own the
	419	* SDRAM bus.
	420	*/
	421	void __init sa1110_mb_disable(void)
	422	{
	423	unsigned long flags;
	424
	425	local_irq_save(flags);
	426
	427	PGSR &= ~GPIO_MBGNT;
	428	GPCR = GPIO_MBGNT;
	429	GPDR = (GPDR & ~GPIO_MBREQ) \| GPIO_MBGNT;
	430
	431	GAFR &= ~(GPIO_MBGNT \| GPIO_MBREQ);
	432
	433	local_irq_restore(flags);
	434	}
	435
	436	/*
	437	* If the system is going to use the SA-1111 DMA engines, set up
	438	* the memory bus request/grant pins.
	439	*/
85e6c7a7	440	void __devinit sa1110_mb_enable(void)
1da177e4 LT	441	{
	442	unsigned long flags;
	443
	444	local_irq_save(flags);
	445
	446	PGSR &= ~GPIO_MBGNT;
	447	GPCR = GPIO_MBGNT;
	448	GPDR = (GPDR & ~GPIO_MBREQ) \| GPIO_MBGNT;
	449
	450	GAFR \|= (GPIO_MBGNT \| GPIO_MBREQ);
	451	TUCR \|= TUCR_MR;
	452
	453	local_irq_restore(flags);
	454	}
	455