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1 | /* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/list.h> | |
15 | #include <linux/timer.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/serial_core.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/gpio.h> | |
b0fd644f | 25 | #include <linux/pwm_backlight.h> |
7301794c | 26 | #include <linux/fb.h> |
6640790c | 27 | #include <linux/mmc/host.h> |
7301794c AK |
28 | |
29 | #include <video/platform_lcd.h> | |
5a213a55 | 30 | #include <video/samsung_fimd.h> |
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31 | |
32 | #include <asm/mach/arch.h> | |
33 | #include <asm/mach/map.h> | |
34 | #include <asm/irq.h> | |
35 | #include <asm/mach-types.h> | |
36 | ||
37 | #include <mach/hardware.h> | |
38 | #include <mach/map.h> | |
39 | #include <mach/regs-clock.h> | |
b0fd644f | 40 | #include <mach/regs-gpio.h> |
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41 | |
42 | #include <plat/regs-serial.h> | |
43 | #include <plat/gpio-cfg.h> | |
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44 | #include <plat/clock.h> |
45 | #include <plat/devs.h> | |
46 | #include <plat/cpu.h> | |
436d42c6 | 47 | #include <linux/platform_data/i2c-s3c2410.h> |
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48 | #include <plat/pll.h> |
49 | #include <plat/adc.h> | |
436d42c6 | 50 | #include <linux/platform_data/touchscreen-s3c2410.h> |
c1fcd403 | 51 | #include <plat/samsung-time.h> |
543601f5 | 52 | #include <plat/backlight.h> |
7301794c | 53 | #include <plat/fb.h> |
6640790c | 54 | #include <plat/sdhci.h> |
6f315cb5 | 55 | |
95af214b | 56 | #include "common.h" |
102c3065 | 57 | #include "i2c.h" |
95af214b | 58 | |
6f315cb5 KK |
59 | #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
60 | S3C2410_UCON_RXILEVEL | \ | |
61 | S3C2410_UCON_TXIRQMODE | \ | |
62 | S3C2410_UCON_RXIRQMODE | \ | |
63 | S3C2410_UCON_RXFIFO_TOI | \ | |
64 | S3C2443_UCON_RXERR_IRQEN) | |
65 | ||
66 | #define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8 | |
67 | ||
68 | #define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | |
69 | S3C2440_UFCON_TXTRIG16 | \ | |
70 | S3C2410_UFCON_RXTRIG8) | |
71 | ||
72 | static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = { | |
73 | [0] = { | |
74 | .hwport = 0, | |
75 | .flags = 0, | |
76 | .ucon = SMDK6450_UCON_DEFAULT, | |
77 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
78 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
79 | }, | |
80 | [1] = { | |
81 | .hwport = 1, | |
82 | .flags = 0, | |
83 | .ucon = SMDK6450_UCON_DEFAULT, | |
84 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
85 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
86 | }, | |
87 | [2] = { | |
88 | .hwport = 2, | |
89 | .flags = 0, | |
90 | .ucon = SMDK6450_UCON_DEFAULT, | |
91 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
92 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
93 | }, | |
94 | [3] = { | |
95 | .hwport = 3, | |
96 | .flags = 0, | |
97 | .ucon = SMDK6450_UCON_DEFAULT, | |
98 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
99 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
100 | }, | |
101 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 | |
102 | [4] = { | |
103 | .hwport = 4, | |
104 | .flags = 0, | |
105 | .ucon = SMDK6450_UCON_DEFAULT, | |
106 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
107 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
108 | }, | |
109 | #endif | |
110 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 | |
111 | [5] = { | |
112 | .hwport = 5, | |
113 | .flags = 0, | |
114 | .ucon = SMDK6450_UCON_DEFAULT, | |
115 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
116 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
117 | }, | |
118 | #endif | |
119 | }; | |
120 | ||
7301794c AK |
121 | /* Frame Buffer */ |
122 | static struct s3c_fb_pd_win smdk6450_fb_win0 = { | |
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123 | .max_bpp = 32, |
124 | .default_bpp = 24, | |
79d3c41a TA |
125 | .xres = 800, |
126 | .yres = 480, | |
127 | }; | |
128 | ||
129 | static struct fb_videomode smdk6450_lcd_timing = { | |
130 | .left_margin = 8, | |
131 | .right_margin = 13, | |
132 | .upper_margin = 7, | |
133 | .lower_margin = 5, | |
134 | .hsync_len = 3, | |
135 | .vsync_len = 1, | |
136 | .xres = 800, | |
137 | .yres = 480, | |
7301794c AK |
138 | }; |
139 | ||
140 | static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = { | |
141 | .win[0] = &smdk6450_fb_win0, | |
79d3c41a | 142 | .vtiming = &smdk6450_lcd_timing, |
7301794c AK |
143 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, |
144 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | |
145 | .setup_gpio = s5p64x0_fb_gpio_setup_24bpp, | |
146 | }; | |
147 | ||
148 | /* LCD power controller */ | |
149 | static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd, | |
150 | unsigned int power) | |
151 | { | |
152 | int err; | |
153 | ||
154 | if (power) { | |
155 | err = gpio_request(S5P6450_GPN(5), "GPN"); | |
156 | if (err) { | |
157 | printk(KERN_ERR "failed to request GPN for lcd reset\n"); | |
158 | return; | |
159 | } | |
160 | ||
161 | gpio_direction_output(S5P6450_GPN(5), 1); | |
162 | gpio_set_value(S5P6450_GPN(5), 0); | |
163 | gpio_set_value(S5P6450_GPN(5), 1); | |
164 | gpio_free(S5P6450_GPN(5)); | |
165 | } | |
166 | } | |
167 | ||
168 | static struct plat_lcd_data smdk6450_lcd_power_data = { | |
169 | .set_power = smdk6450_lte480_reset_power, | |
170 | }; | |
171 | ||
172 | static struct platform_device smdk6450_lcd_lte480wv = { | |
173 | .name = "platform-lcd", | |
174 | .dev.parent = &s3c_device_fb.dev, | |
175 | .dev.platform_data = &smdk6450_lcd_power_data, | |
176 | }; | |
177 | ||
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178 | static struct platform_device *smdk6450_devices[] __initdata = { |
179 | &s3c_device_adc, | |
180 | &s3c_device_rtc, | |
181 | &s3c_device_i2c0, | |
182 | &s3c_device_i2c1, | |
183 | &s3c_device_ts, | |
184 | &s3c_device_wdt, | |
185 | &s5p6450_device_iis0, | |
7301794c AK |
186 | &s3c_device_fb, |
187 | &smdk6450_lcd_lte480wv, | |
6640790c RS |
188 | &s3c_device_hsmmc0, |
189 | &s3c_device_hsmmc1, | |
190 | &s3c_device_hsmmc2, | |
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191 | /* s5p6450_device_spi0 will be added */ |
192 | }; | |
193 | ||
6640790c RS |
194 | static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = { |
195 | .cd_type = S3C_SDHCI_CD_NONE, | |
196 | }; | |
197 | ||
198 | static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = { | |
199 | .cd_type = S3C_SDHCI_CD_NONE, | |
200 | #if defined(CONFIG_S5P64X0_SD_CH1_8BIT) | |
201 | .max_width = 8, | |
202 | .host_caps = MMC_CAP_8_BIT_DATA, | |
203 | #endif | |
204 | }; | |
205 | ||
206 | static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = { | |
207 | .cd_type = S3C_SDHCI_CD_NONE, | |
208 | }; | |
209 | ||
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210 | static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { |
211 | .flags = 0, | |
212 | .slave_addr = 0x10, | |
213 | .frequency = 100*1000, | |
214 | .sda_delay = 100, | |
215 | .cfg_gpio = s5p6450_i2c0_cfg_gpio, | |
216 | }; | |
217 | ||
218 | static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = { | |
219 | .flags = 0, | |
220 | .bus_num = 1, | |
221 | .slave_addr = 0x10, | |
222 | .frequency = 100*1000, | |
223 | .sda_delay = 100, | |
224 | .cfg_gpio = s5p6450_i2c1_cfg_gpio, | |
225 | }; | |
226 | ||
227 | static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = { | |
fcf8897d | 228 | { I2C_BOARD_INFO("wm8580", 0x1b), }, |
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229 | { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */ |
230 | }; | |
231 | ||
232 | static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = { | |
233 | { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */ | |
234 | }; | |
235 | ||
543601f5 BG |
236 | /* LCD Backlight data */ |
237 | static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = { | |
238 | .no = S5P6450_GPF(15), | |
239 | .func = S3C_GPIO_SFN(2), | |
240 | }; | |
241 | ||
242 | static struct platform_pwm_backlight_data smdk6450_bl_data = { | |
243 | .pwm_id = 1, | |
244 | }; | |
245 | ||
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246 | static void __init smdk6450_map_io(void) |
247 | { | |
95af214b | 248 | s5p64x0_init_io(NULL, 0); |
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249 | s3c24xx_init_clocks(19200000); |
250 | s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); | |
c1fcd403 | 251 | samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); |
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252 | } |
253 | ||
7301794c AK |
254 | static void s5p6450_set_lcd_interface(void) |
255 | { | |
256 | unsigned int cfg; | |
257 | ||
258 | /* select TFT LCD type (RGB I/F) */ | |
259 | cfg = __raw_readl(S5P64X0_SPCON0); | |
260 | cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK; | |
261 | cfg |= S5P64X0_SPCON0_LCD_SEL_RGB; | |
262 | __raw_writel(cfg, S5P64X0_SPCON0); | |
263 | } | |
264 | ||
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265 | static void __init smdk6450_machine_init(void) |
266 | { | |
0804765a | 267 | s3c24xx_ts_set_platdata(NULL); |
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268 | |
269 | s3c_i2c0_set_platdata(&s5p6450_i2c0_data); | |
270 | s3c_i2c1_set_platdata(&s5p6450_i2c1_data); | |
271 | i2c_register_board_info(0, smdk6450_i2c_devs0, | |
272 | ARRAY_SIZE(smdk6450_i2c_devs0)); | |
273 | i2c_register_board_info(1, smdk6450_i2c_devs1, | |
274 | ARRAY_SIZE(smdk6450_i2c_devs1)); | |
275 | ||
543601f5 BG |
276 | samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data); |
277 | ||
7301794c AK |
278 | s5p6450_set_lcd_interface(); |
279 | s3c_fb_set_platdata(&smdk6450_lcd_pdata); | |
280 | ||
6640790c RS |
281 | s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata); |
282 | s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata); | |
283 | s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata); | |
284 | ||
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285 | platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); |
286 | } | |
287 | ||
288 | MACHINE_START(SMDK6450, "SMDK6450") | |
289 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | |
32bc8201 | 290 | .atag_offset = 0x100, |
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291 | |
292 | .init_irq = s5p6450_init_irq, | |
293 | .map_io = smdk6450_map_io, | |
294 | .init_machine = smdk6450_machine_init, | |
c1fcd403 | 295 | .init_time = samsung_timer_init, |
73aed8b9 | 296 | .restart = s5p64x0_restart, |
6f315cb5 | 297 | MACHINE_END |