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1 | /* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/list.h> | |
15 | #include <linux/timer.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/serial_core.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/gpio.h> | |
25 | ||
26 | #include <asm/mach/arch.h> | |
27 | #include <asm/mach/map.h> | |
28 | #include <asm/irq.h> | |
29 | #include <asm/mach-types.h> | |
30 | ||
31 | #include <mach/hardware.h> | |
32 | #include <mach/map.h> | |
33 | #include <mach/regs-clock.h> | |
34 | #include <mach/i2c.h> | |
35 | ||
36 | #include <plat/regs-serial.h> | |
37 | #include <plat/gpio-cfg.h> | |
38 | #include <plat/s5p6450.h> | |
39 | #include <plat/clock.h> | |
40 | #include <plat/devs.h> | |
41 | #include <plat/cpu.h> | |
42 | #include <plat/iic.h> | |
43 | #include <plat/pll.h> | |
44 | #include <plat/adc.h> | |
45 | #include <plat/ts.h> | |
46 | ||
47 | #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | |
48 | S3C2410_UCON_RXILEVEL | \ | |
49 | S3C2410_UCON_TXIRQMODE | \ | |
50 | S3C2410_UCON_RXIRQMODE | \ | |
51 | S3C2410_UCON_RXFIFO_TOI | \ | |
52 | S3C2443_UCON_RXERR_IRQEN) | |
53 | ||
54 | #define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8 | |
55 | ||
56 | #define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | |
57 | S3C2440_UFCON_TXTRIG16 | \ | |
58 | S3C2410_UFCON_RXTRIG8) | |
59 | ||
60 | static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = { | |
61 | [0] = { | |
62 | .hwport = 0, | |
63 | .flags = 0, | |
64 | .ucon = SMDK6450_UCON_DEFAULT, | |
65 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
66 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
67 | }, | |
68 | [1] = { | |
69 | .hwport = 1, | |
70 | .flags = 0, | |
71 | .ucon = SMDK6450_UCON_DEFAULT, | |
72 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
73 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
74 | }, | |
75 | [2] = { | |
76 | .hwport = 2, | |
77 | .flags = 0, | |
78 | .ucon = SMDK6450_UCON_DEFAULT, | |
79 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
80 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
81 | }, | |
82 | [3] = { | |
83 | .hwport = 3, | |
84 | .flags = 0, | |
85 | .ucon = SMDK6450_UCON_DEFAULT, | |
86 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
87 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
88 | }, | |
89 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 4 | |
90 | [4] = { | |
91 | .hwport = 4, | |
92 | .flags = 0, | |
93 | .ucon = SMDK6450_UCON_DEFAULT, | |
94 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
95 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
96 | }, | |
97 | #endif | |
98 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 5 | |
99 | [5] = { | |
100 | .hwport = 5, | |
101 | .flags = 0, | |
102 | .ucon = SMDK6450_UCON_DEFAULT, | |
103 | .ulcon = SMDK6450_ULCON_DEFAULT, | |
104 | .ufcon = SMDK6450_UFCON_DEFAULT, | |
105 | }, | |
106 | #endif | |
107 | }; | |
108 | ||
109 | static struct platform_device *smdk6450_devices[] __initdata = { | |
110 | &s3c_device_adc, | |
111 | &s3c_device_rtc, | |
112 | &s3c_device_i2c0, | |
113 | &s3c_device_i2c1, | |
114 | &s3c_device_ts, | |
115 | &s3c_device_wdt, | |
be370adc | 116 | &samsung_asoc_dma, |
6f315cb5 KK |
117 | &s5p6450_device_iis0, |
118 | /* s5p6450_device_spi0 will be added */ | |
119 | }; | |
120 | ||
121 | static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { | |
122 | .flags = 0, | |
123 | .slave_addr = 0x10, | |
124 | .frequency = 100*1000, | |
125 | .sda_delay = 100, | |
126 | .cfg_gpio = s5p6450_i2c0_cfg_gpio, | |
127 | }; | |
128 | ||
129 | static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = { | |
130 | .flags = 0, | |
131 | .bus_num = 1, | |
132 | .slave_addr = 0x10, | |
133 | .frequency = 100*1000, | |
134 | .sda_delay = 100, | |
135 | .cfg_gpio = s5p6450_i2c1_cfg_gpio, | |
136 | }; | |
137 | ||
138 | static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = { | |
fcf8897d | 139 | { I2C_BOARD_INFO("wm8580", 0x1b), }, |
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140 | { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */ |
141 | }; | |
142 | ||
143 | static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = { | |
144 | { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */ | |
145 | }; | |
146 | ||
147 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | |
148 | .delay = 10000, | |
149 | .presc = 49, | |
150 | .oversampling_shift = 2, | |
151 | }; | |
152 | ||
153 | static void __init smdk6450_map_io(void) | |
154 | { | |
155 | s5p_init_io(NULL, 0, S5P64X0_SYS_ID); | |
156 | s3c24xx_init_clocks(19200000); | |
157 | s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); | |
158 | } | |
159 | ||
160 | static void __init smdk6450_machine_init(void) | |
161 | { | |
162 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | |
163 | ||
164 | s3c_i2c0_set_platdata(&s5p6450_i2c0_data); | |
165 | s3c_i2c1_set_platdata(&s5p6450_i2c1_data); | |
166 | i2c_register_board_info(0, smdk6450_i2c_devs0, | |
167 | ARRAY_SIZE(smdk6450_i2c_devs0)); | |
168 | i2c_register_board_info(1, smdk6450_i2c_devs1, | |
169 | ARRAY_SIZE(smdk6450_i2c_devs1)); | |
170 | ||
171 | platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); | |
172 | } | |
173 | ||
174 | MACHINE_START(SMDK6450, "SMDK6450") | |
175 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | |
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176 | .boot_params = S5P64X0_PA_SDRAM + 0x100, |
177 | ||
178 | .init_irq = s5p6450_init_irq, | |
179 | .map_io = smdk6450_map_io, | |
180 | .init_machine = smdk6450_machine_init, | |
181 | .timer = &s3c24xx_timer, | |
182 | MACHINE_END |