Commit | Line | Data |
---|---|---|
5cc7fd88 BD |
1 | /* linux/arch/arm/mach-s3c6410/setup-sdhci.c |
2 | * | |
3 | * Copyright 2008 Simtec Electronics | |
4 | * Copyright 2008 Simtec Electronics | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * http://armlinux.simtec.co.uk/ | |
7 | * | |
8 | * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/types.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/io.h> | |
20 | ||
21 | #include <linux/mmc/card.h> | |
22 | #include <linux/mmc/host.h> | |
23 | ||
24 | #include <mach/gpio.h> | |
25 | #include <plat/gpio-cfg.h> | |
26 | #include <plat/regs-sdhci.h> | |
27 | #include <plat/sdhci.h> | |
28 | ||
29 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | |
30 | ||
31 | char *s3c6410_hsmmc_clksrcs[4] = { | |
32 | [0] = "hsmmc", | |
33 | [1] = "hsmmc", | |
34 | [2] = "mmc_bus", | |
35 | /* [3] = "48m", - note not succesfully used yet */ | |
36 | }; | |
37 | ||
38 | void s3c6410_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | |
39 | { | |
40 | unsigned int gpio; | |
41 | unsigned int end; | |
42 | ||
43 | end = S3C64XX_GPG(2 + width); | |
44 | ||
45 | /* Set all the necessary GPG pins to special-function 0 */ | |
46 | for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { | |
47 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | |
48 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
49 | } | |
50 | ||
51 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); | |
52 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); | |
53 | } | |
54 | ||
55 | void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, | |
56 | void __iomem *r, | |
57 | struct mmc_ios *ios, | |
58 | struct mmc_card *card) | |
59 | { | |
60 | u32 ctrl2, ctrl3; | |
61 | ||
62 | /* don't need to alter anything acording to card-type */ | |
63 | ||
64 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | |
65 | ||
66 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | |
67 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | |
68 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | |
69 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | |
70 | S3C_SDHCI_CTRL2_ENFBCLKRX | | |
71 | S3C_SDHCI_CTRL2_DFCNT_NONE | | |
72 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | |
73 | ||
74 | if (ios->clock < 25 * 1000000) | |
75 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | |
76 | S3C_SDHCI_CTRL3_FCSEL2 | | |
77 | S3C_SDHCI_CTRL3_FCSEL1 | | |
78 | S3C_SDHCI_CTRL3_FCSEL0); | |
79 | else | |
80 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | |
81 | ||
82 | printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); | |
83 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | |
84 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | |
85 | } | |
86 | ||
87 | void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | |
88 | { | |
89 | unsigned int gpio; | |
90 | unsigned int end; | |
91 | ||
92 | end = S3C64XX_GPH(2 + width); | |
93 | ||
94 | /* Set all the necessary GPG pins to special-function 0 */ | |
95 | for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { | |
96 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | |
97 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
98 | } | |
99 | ||
100 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); | |
101 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); | |
102 | } |