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d626aeed BD |
1 | /* linux/arch/arm/mach-s3c6410/cpu.c |
2 | * | |
3 | * Copyright 2008 Simtec Electronics | |
4 | * Copyright 2008 Simtec Electronics | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * http://armlinux.simtec.co.uk/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/timer.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/clk.h> | |
20 | #include <linux/io.h> | |
21 | #include <linux/sysdev.h> | |
22 | #include <linux/serial_core.h> | |
23 | #include <linux/platform_device.h> | |
24 | ||
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach/map.h> | |
27 | #include <asm/mach/irq.h> | |
28 | ||
29 | #include <mach/hardware.h> | |
30 | #include <asm/irq.h> | |
31 | ||
32 | #include <plat/cpu-freq.h> | |
33 | #include <plat/regs-serial.h> | |
34 | ||
35 | #include <plat/cpu.h> | |
36 | #include <plat/devs.h> | |
37 | #include <plat/clock.h> | |
5cc7fd88 | 38 | #include <plat/sdhci.h> |
4f507d19 | 39 | #include <plat/iic-core.h> |
cf18acf0 | 40 | #include <plat/s3c6400.h> |
d626aeed BD |
41 | #include <plat/s3c6410.h> |
42 | ||
43 | /* Initial IO mappings */ | |
44 | ||
45 | static struct map_desc s3c6410_iodesc[] __initdata = { | |
46 | }; | |
47 | ||
48 | /* s3c6410_map_io | |
49 | * | |
50 | * register the standard cpu IO areas | |
51 | */ | |
52 | ||
53 | void __init s3c6410_map_io(void) | |
54 | { | |
55 | iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc)); | |
5cc7fd88 BD |
56 | |
57 | /* initialise device information early */ | |
58 | s3c6410_default_sdhci0(); | |
a2205cd2 | 59 | s3c6410_default_sdhci1(); |
4f507d19 BD |
60 | |
61 | /* the i2c devices are directly compatible with s3c2440 */ | |
62 | s3c_i2c0_setname("s3c2440-i2c"); | |
63 | s3c_i2c1_setname("s3c2440-i2c"); | |
d626aeed BD |
64 | } |
65 | ||
66 | void __init s3c6410_init_clocks(int xtal) | |
67 | { | |
39669f59 | 68 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); |
d626aeed | 69 | s3c24xx_register_baseclocks(xtal); |
4b31d8b2 | 70 | s3c64xx_register_clocks(); |
cf18acf0 BD |
71 | s3c6400_register_clocks(); |
72 | s3c6400_setup_clocks(); | |
d626aeed BD |
73 | } |
74 | ||
d9b79fb5 BD |
75 | void __init s3c6410_init_irq(void) |
76 | { | |
77 | /* VIC0 is missing IRQ7, VIC1 is fully populated. */ | |
78 | s3c64xx_init_irq(~0 & ~(1 << 7), ~0); | |
79 | } | |
80 | ||
d626aeed BD |
81 | struct sysdev_class s3c6410_sysclass = { |
82 | .name = "s3c6410-core", | |
83 | }; | |
84 | ||
85 | static struct sys_device s3c6410_sysdev = { | |
86 | .cls = &s3c6410_sysclass, | |
87 | }; | |
88 | ||
89 | static int __init s3c6410_core_init(void) | |
90 | { | |
91 | return sysdev_class_register(&s3c6410_sysclass); | |
92 | } | |
93 | ||
94 | core_initcall(s3c6410_core_init); | |
95 | ||
96 | int __init s3c6410_init(void) | |
97 | { | |
98 | printk("S3C6410: Initialising architecture\n"); | |
99 | ||
100 | return sysdev_register(&s3c6410_sysdev); | |
101 | } |