projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
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1 | /* linux/arch/arm/mach-s3c6400/include/mach/map.h |
| 2 | * | |
| 3 | * Copyright 2008 Openmoko, Inc. | |
| 4 | * Copyright 2008 Simtec Electronics | |
| 5 | * http://armlinux.simtec.co.uk/ | |
| 6 | * Ben Dooks <ben@simtec.co.uk> | |
| 7 | * | |
| 8 | * S3C64XX - Memory map definitions | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License version 2 as | |
| 12 | * published by the Free Software Foundation. | |
| 13 | */ | |
| 14 | ||
| 15 | #ifndef __ASM_ARCH_MAP_H | |
| 16 | #define __ASM_ARCH_MAP_H __FILE__ | |
| 17 | ||
| 18 | #include <plat/map-base.h> | |
| 19 | ||
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20 | /* HSMMC units */ |
| 21 | #define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000)) | |
| 22 | #define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0) | |
| 23 | #define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1) | |
| 24 | #define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2) | |
| 25 | ||
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26 | #define S3C_PA_UART (0x7F005000) |
| 27 | #define S3C_PA_UART0 (S3C_PA_UART + 0x00) | |
| 28 | #define S3C_PA_UART1 (S3C_PA_UART + 0x400) | |
| 29 | #define S3C_PA_UART2 (S3C_PA_UART + 0x800) | |
| 30 | #define S3C_PA_UART3 (S3C_PA_UART + 0xC00) | |
| 31 | #define S3C_UART_OFFSET (0x400) | |
| 32 | ||
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33 | /* See notes on UART VA mapping in debug-macro.S */ |
| 34 | #define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET)) | |
| 35 | ||
| 36 | #define S3C_VA_UART0 S3C_VA_UARTx(0) | |
| 37 | #define S3C_VA_UART1 S3C_VA_UARTx(1) | |
| 38 | #define S3C_VA_UART2 S3C_VA_UARTx(2) | |
| 39 | #define S3C_VA_UART3 S3C_VA_UARTx(3) | |
| 40 | ||
| 58435f7b | 41 | #define S3C64XX_PA_FB (0x77100000) |
| f0e1fa76 | 42 | #define S3C64XX_PA_USB_HSOTG (0x7C000000) |
| 543899f6 | 43 | #define S3C64XX_PA_WATCHDOG (0x7E004000) |
| beda30f6 | 44 | #define S3C64XX_PA_SYSCON (0x7E00F000) |
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45 | #define S3C64XX_PA_IIS0 (0x7F002000) |
| 46 | #define S3C64XX_PA_IIS1 (0x7F003000) | |
| dcb0902b | 47 | #define S3C64XX_PA_TIMER (0x7F006000) |
| 3e1b776c | 48 | #define S3C64XX_PA_IIC0 (0x7F004000) |
| 1aba834d | 49 | #define S3C64XX_PA_IIC1 (0x7F00F000) |
| dcb0902b | 50 | |
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51 | #define S3C64XX_PA_GPIO (0x7F008000) |
| 52 | #define S3C64XX_VA_GPIO S3C_ADDR(0x00500000) | |
| 53 | #define S3C64XX_SZ_GPIO SZ_4K | |
| 54 | ||
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55 | #define S3C64XX_PA_SDRAM (0x50000000) |
| 56 | #define S3C64XX_PA_VIC0 (0x71200000) | |
| 57 | #define S3C64XX_PA_VIC1 (0x71300000) | |
| 58 | ||
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59 | #define S3C64XX_PA_MODEM (0x74108000) |
| 60 | #define S3C64XX_VA_MODEM S3C_ADDR(0x00600000) | |
| 61 | ||
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62 | #define S3C64XX_PA_USBHOST (0x74300000) |
| 63 | ||
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64 | /* place VICs close together */ |
| 65 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00) | |
| 66 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | |
| 67 | ||
| 68 | /* compatibiltiy defines. */ | |
| 69 | #define S3C_PA_TIMER S3C64XX_PA_TIMER | |
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70 | #define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0 |
| 71 | #define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1 | |
| 72 | #define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2 | |
| 3e1b776c | 73 | #define S3C_PA_IIC S3C64XX_PA_IIC0 |
| 1aba834d | 74 | #define S3C_PA_IIC1 S3C64XX_PA_IIC1 |
| 58435f7b | 75 | #define S3C_PA_FB S3C64XX_PA_FB |
| 67b3e542 | 76 | #define S3C_PA_USBHOST S3C64XX_PA_USBHOST |
| f0e1fa76 | 77 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG |
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78 | |
| 79 | #endif /* __ASM_ARCH_6400_MAP_H */ |