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1 | /* arch/arm/mach-s3c6400/include/mach/gpio.h |
2 | * | |
3 | * Copyright 2008 Openmoko, Inc. | |
4 | * Copyright 2008 Simtec Electronics | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * Ben Dooks <ben@simtec.co.uk> | |
7 | * | |
8 | * S3C6400 - GPIO lib support | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #define gpio_get_value __gpio_get_value | |
16 | #define gpio_set_value __gpio_set_value | |
17 | #define gpio_cansleep __gpio_cansleep | |
18 | #define gpio_to_irq __gpio_to_irq | |
19 | ||
efd3a8eb BD |
20 | /* GPIO bank sizes */ |
21 | #define S3C64XX_GPIO_A_NR (8) | |
22 | #define S3C64XX_GPIO_B_NR (7) | |
23 | #define S3C64XX_GPIO_C_NR (8) | |
24 | #define S3C64XX_GPIO_D_NR (5) | |
25 | #define S3C64XX_GPIO_E_NR (5) | |
26 | #define S3C64XX_GPIO_F_NR (16) | |
27 | #define S3C64XX_GPIO_G_NR (7) | |
28 | #define S3C64XX_GPIO_H_NR (10) | |
29 | #define S3C64XX_GPIO_I_NR (16) | |
30 | #define S3C64XX_GPIO_J_NR (12) | |
31 | #define S3C64XX_GPIO_K_NR (16) | |
32 | #define S3C64XX_GPIO_L_NR (15) | |
33 | #define S3C64XX_GPIO_M_NR (6) | |
34 | #define S3C64XX_GPIO_N_NR (16) | |
35 | #define S3C64XX_GPIO_O_NR (16) | |
36 | #define S3C64XX_GPIO_P_NR (15) | |
37 | #define S3C64XX_GPIO_Q_NR (9) | |
38 | ||
39 | /* GPIO bank numbes */ | |
40 | ||
41 | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra | |
42 | * space for debugging purposes so that any accidental | |
43 | * change from one gpio bank to another can be caught. | |
44 | */ | |
45 | ||
46 | #define S3C64XX_GPIO_NEXT(__gpio) \ | |
47 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | |
48 | ||
49 | enum s3c_gpio_number { | |
50 | S3C64XX_GPIO_A_START = 0, | |
51 | S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A), | |
52 | S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B), | |
53 | S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C), | |
54 | S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D), | |
55 | S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E), | |
56 | S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F), | |
57 | S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G), | |
58 | S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H), | |
59 | S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I), | |
60 | S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J), | |
61 | S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K), | |
62 | S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L), | |
63 | S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M), | |
64 | S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N), | |
65 | S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O), | |
66 | S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P), | |
67 | }; | |
68 | ||
69 | /* S3C64XX GPIO number definitions. */ | |
70 | ||
71 | #define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr)) | |
72 | #define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr)) | |
73 | #define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr)) | |
74 | #define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr)) | |
75 | #define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr)) | |
76 | #define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr)) | |
77 | #define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr)) | |
78 | #define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr)) | |
79 | #define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr)) | |
80 | #define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr)) | |
81 | #define S3C64XX_GPK(_nr) (S3C64XX_GPIO_K_START + (_nr)) | |
82 | #define S3C64XX_GPL(_nr) (S3C64XX_GPIO_L_START + (_nr)) | |
83 | #define S3C64XX_GPM(_nr) (S3C64XX_GPIO_M_START + (_nr)) | |
84 | #define S3C64XX_GPN(_nr) (S3C64XX_GPIO_N_START + (_nr)) | |
85 | #define S3C64XX_GPO(_nr) (S3C64XX_GPIO_O_START + (_nr)) | |
86 | #define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr)) | |
87 | #define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr)) | |
88 | ||
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89 | /* the end of the S3C64XX specific gpios */ |
90 | #define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) | |
91 | #define S3C_GPIO_END S3C64XX_GPIO_END | |
92 | ||
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93 | /* define the number of gpios we need to the one after the GPQ() range */ |
94 | #define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) | |
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95 | |
96 | #include <asm-generic/gpio.h> |