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[ARM] smp: allow re-use of realview localtimer TWD support
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-realview / realview_pb11mp.c
CommitLineData
a9b67db5
BB		 1/*
2 * linux/arch/arm/mach-realview/realview_pb11mp.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
fced80c7 26#include <linux/io.h>
a9b67db5 27
a09e64fb 28#include <mach/hardware.h>
a9b67db5
BB		 29#include <asm/irq.h>
30#include <asm/leds.h>
31#include <asm/mach-types.h>
32#include <asm/hardware/gic.h>
33#include <asm/hardware/icst307.h>
34#include <asm/hardware/cache-l2x0.h>
f32f4ce2 35#include <asm/localtimer.h>
a9b67db5
BB		 36
37#include <asm/mach/arch.h>
38#include <asm/mach/flash.h>
39#include <asm/mach/map.h>
40#include <asm/mach/mmc.h>
41#include <asm/mach/time.h>
42
a09e64fb
RK		 43#include <mach/board-pb11mp.h>
44#include <mach/irqs.h>
a9b67db5
BB		 45
46#include "core.h"
47#include "clock.h"
48
49static struct map_desc realview_pb11mp_io_desc[] __initdata = {
50 {
51 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
52 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
53 .length = SZ_4K,
54 .type = MT_DEVICE,
55 }, {
56 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
57 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
58 .length = SZ_4K,
59 .type = MT_DEVICE,
60 }, {
61 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
62 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
63 .length = SZ_4K,
64 .type = MT_DEVICE,
65 }, {
66 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
67 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
68 .length = SZ_4K,
69 .type = MT_DEVICE,
70 }, {
71 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
72 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
73 .length = SZ_4K,
74 .type = MT_DEVICE,
75 }, {
76 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
77 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
78 .length = SZ_4K,
79 .type = MT_DEVICE,
80 }, {
81 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
82 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
83 .length = SZ_4K,
84 .type = MT_DEVICE,
85 }, {
86 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
87 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
88 .length = SZ_4K,
89 .type = MT_DEVICE,
90 }, {
91 .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
92 .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
93 .length = SZ_8K,
94 .type = MT_DEVICE,
95 },
96#ifdef CONFIG_DEBUG_LL
97 {
98 .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
99 .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
100 .length = SZ_4K,
101 .type = MT_DEVICE,
102 },
103#endif
104};
105
106static void __init realview_pb11mp_map_io(void)
107{
108 iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
109}
110
111/*
112 * RealView PB11MPCore AMBA devices
113 */
114
115#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ }
116#define GPIO2_DMA { 0, 0 }
117#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ }
118#define GPIO3_DMA { 0, 0 }
119#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ }
120#define AACI_DMA { 0x80, 0x81 }
121#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
122#define MMCI0_DMA { 0x84, 0 }
123#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ }
124#define KMI0_DMA { 0, 0 }
125#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ }
126#define KMI1_DMA { 0, 0 }
127#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ }
128#define PB11MP_SMC_DMA { 0, 0 }
129#define MPMC_IRQ { NO_IRQ, NO_IRQ }
130#define MPMC_DMA { 0, 0 }
131#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ }
132#define PB11MP_CLCD_DMA { 0, 0 }
133#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ }
134#define DMAC_DMA { 0, 0 }
135#define SCTL_IRQ { NO_IRQ, NO_IRQ }
136#define SCTL_DMA { 0, 0 }
137#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ }
138#define PB11MP_WATCHDOG_DMA { 0, 0 }
139#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ }
140#define PB11MP_GPIO0_DMA { 0, 0 }
141#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ }
142#define GPIO1_DMA { 0, 0 }
143#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ }
144#define PB11MP_RTC_DMA { 0, 0 }
145#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ }
146#define SCI_DMA { 7, 6 }
147#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ }
148#define PB11MP_UART0_DMA { 15, 14 }
149#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ }
150#define PB11MP_UART1_DMA { 13, 12 }
151#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ }
152#define PB11MP_UART2_DMA { 11, 10 }
153#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ }
154#define PB11MP_UART3_DMA { 0x86, 0x87 }
155#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ }
156#define PB11MP_SSP_DMA { 9, 8 }
157
158/* FPGA Primecells */
159AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
160AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
161AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
162AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
163AMBA_DEVICE(uart3, "fpga:09", PB11MP_UART3, NULL);
164
165/* DevChip Primecells */
166AMBA_DEVICE(smc, "dev:00", PB11MP_SMC, NULL);
167AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
168AMBA_DEVICE(wdog, "dev:e1", PB11MP_WATCHDOG, NULL);
169AMBA_DEVICE(gpio0, "dev:e4", PB11MP_GPIO0, NULL);
170AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
171AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
172AMBA_DEVICE(rtc, "dev:e8", PB11MP_RTC, NULL);
173AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
174AMBA_DEVICE(uart0, "dev:f1", PB11MP_UART0, NULL);
175AMBA_DEVICE(uart1, "dev:f2", PB11MP_UART1, NULL);
176AMBA_DEVICE(uart2, "dev:f3", PB11MP_UART2, NULL);
177AMBA_DEVICE(ssp0, "dev:f4", PB11MP_SSP, NULL);
178
179/* Primecells on the NEC ISSP chip */
180AMBA_DEVICE(clcd, "issp:20", PB11MP_CLCD, &clcd_plat_data);
181AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
182
183static struct amba_device *amba_devs[] __initdata = {
184 &dmac_device,
185 &uart0_device,
186 &uart1_device,
187 &uart2_device,
188 &uart3_device,
189 &smc_device,
190 &clcd_device,
191 &sctl_device,
192 &wdog_device,
193 &gpio0_device,
194 &gpio1_device,
195 &gpio2_device,
196 &rtc_device,
197 &sci0_device,
198 &ssp0_device,
199 &aaci_device,
200 &mmc0_device,
201 &kmi0_device,
202 &kmi1_device,
203};
204
205/*
206 * RealView PB11MPCore platform devices
207 */
208static struct resource realview_pb11mp_flash_resource[] = {
209 [0] = {
210 .start = REALVIEW_PB11MP_FLASH0_BASE,
211 .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
212 .flags = IORESOURCE_MEM,
213 },
214 [1] = {
215 .start = REALVIEW_PB11MP_FLASH1_BASE,
216 .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
217 .flags = IORESOURCE_MEM,
218 },
219};
220
221static struct resource realview_pb11mp_smsc911x_resources[] = {
222 [0] = {
223 .start = REALVIEW_PB11MP_ETH_BASE,
224 .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
225 .flags = IORESOURCE_MEM,
226 },
227 [1] = {
228 .start = IRQ_TC11MP_ETH,
229 .end = IRQ_TC11MP_ETH,
230 .flags = IORESOURCE_IRQ,
231 },
232};
233
7db21712
CM		 234static struct resource realview_pb11mp_isp1761_resources[] = {
235 [0] = {
236 .start = REALVIEW_PB11MP_USB_BASE,
237 .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
238 .flags = IORESOURCE_MEM,
239 },
240 [1] = {
241 .start = IRQ_TC11MP_USB,
242 .end = IRQ_TC11MP_USB,
243 .flags = IORESOURCE_IRQ,
244 },
245};
246
a9b67db5
BB		 247static void __init gic_init_irq(void)
248{
249 unsigned int pldctrl;
250
251 /* new irq mode with no DCC */
252 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
253 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
254 pldctrl |= 2 << 22;
255 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
256 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
257
258 /* ARM11MPCore test chip GIC, primary */
259 gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
260 gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
261 gic_cpu_init(0, gic_cpu_base_addr);
262
263 /* board GIC, secondary */
264 gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
265 gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
266 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
267}
268
269static void __init realview_pb11mp_timer_init(void)
270{
271 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
272 timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
273 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
274 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
275
276#ifdef CONFIG_LOCAL_TIMERS
ebac6546 277 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
a9b67db5
BB		 278#endif
279 realview_timer_init(IRQ_TC11MP_TIMER0_1);
280}
281
282static struct sys_timer realview_pb11mp_timer = {
283 .init = realview_pb11mp_timer_init,
284};
285
286static void __init realview_pb11mp_init(void)
287{
288 int i;
289
ba927951 290#ifdef CONFIG_CACHE_L2X0
a9b67db5
BB		 291 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
292 * Bits: .... ...0 0111 1001 0000 .... .... .... */
293 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
ba927951 294#endif
a9b67db5 295
a9b67db5
BB		 296 realview_flash_register(realview_pb11mp_flash_resource,
297 ARRAY_SIZE(realview_pb11mp_flash_resource));
0a381330 298 realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
a9b67db5 299 platform_device_register(&realview_i2c_device);
6be62ba2 300 platform_device_register(&realview_cf_device);
7db21712 301 realview_usb_register(realview_pb11mp_isp1761_resources);
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BB		 302
303 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
304 struct amba_device *d = amba_devs[i];
305 amba_device_register(d, &iomem_resource);
306 }
307
308#ifdef CONFIG_LEDS
309 leds_event = realview_leds_event;
310#endif
311}
312
313MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
314 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
315 .phys_io = REALVIEW_PB11MP_UART0_BASE,
316 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
70bb62f8 317 .boot_params = PHYS_OFFSET + 0x00000100,
a9b67db5
BB		 318 .map_io = realview_pb11mp_map_io,
319 .init_irq = gic_init_irq,
320 .timer = &realview_pb11mp_timer,
321 .init_machine = realview_pb11mp_init,
322MACHINE_END
kernel source for telekom puls (alcatel/mediatek)