[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-orion5x / rd88f5181l-ge-setup.c

/*
 * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
 *
 * Marvell Orion-VoIP GE Reference Design Setup
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/i2c.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/leds.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"

/*****************************************************************************
 * RD-88F5181L GE Info
 ****************************************************************************/
/*
 * 16M NOR flash Device bus boot chip select
 */
#define RD88F5181L_GE_NOR_BOOT_BASE		0xff000000
#define RD88F5181L_GE_NOR_BOOT_SIZE		SZ_16M


/*****************************************************************************
 * 16M NOR Flash on Device bus Boot chip select
 ****************************************************************************/
static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
	.width		= 1,
};

static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
	.flags		= IORESOURCE_MEM,
	.start		= RD88F5181L_GE_NOR_BOOT_BASE,
	.end		= RD88F5181L_GE_NOR_BOOT_BASE +
			  RD88F5181L_GE_NOR_BOOT_SIZE - 1,
};

static struct platform_device rd88f5181l_ge_nor_boot_flash = {
	.name			= "physmap-flash",
	.id			= 0,
	.dev		= {
		.platform_data	= &rd88f5181l_ge_nor_boot_flash_data,
	},
	.num_resources		= 1,
	.resource		= &rd88f5181l_ge_nor_boot_flash_resource,
};


/*****************************************************************************
 * General Setup
 ****************************************************************************/
static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
	MPP0_GPIO,		/* LED1 */
	MPP1_GPIO,		/* LED5 */
	MPP2_GPIO,		/* LED4 */
	MPP3_GPIO,		/* LED3 */
	MPP4_GPIO,		/* PCI_intA */
	MPP5_GPIO,		/* RTC interrupt */
	MPP6_PCI_CLK,		/* CPU PCI refclk */
	MPP7_PCI_CLK,		/* PCI/PCIe refclk */
	MPP8_GPIO,		/* 88e6131 interrupt */
	MPP9_GPIO,		/* GE_RXERR */
	MPP10_GPIO,		/* PCI_intB */
	MPP11_GPIO,		/* LED2 */
	MPP12_GIGE,		/* GE_TXD[4] */
	MPP13_GIGE,		/* GE_TXD[5] */
	MPP14_GIGE,		/* GE_TXD[6] */
	MPP15_GIGE,		/* GE_TXD[7] */
	MPP16_GIGE,		/* GE_RXD[4] */
	MPP17_GIGE,		/* GE_RXD[5] */
	MPP18_GIGE,		/* GE_RXD[6] */
	MPP19_GIGE,		/* GE_RXD[7] */
	0,
};

static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
	.phy_addr	= MV643XX_ETH_PHY_NONE,
	.speed		= SPEED_1000,
	.duplex		= DUPLEX_FULL,
};

static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
	.port_names[0]	= "lan2",
	.port_names[1]	= "lan1",
	.port_names[2]	= "wan",
	.port_names[3]	= "cpu",
	.port_names[5]	= "lan4",
	.port_names[7]	= "lan3",
};

static struct dsa_platform_data rd88f5181l_ge_switch_plat_data = {
	.nr_chips	= 1,
	.chip		= &rd88f5181l_ge_switch_chip_data,
};

static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
	I2C_BOARD_INFO("ds1338", 0x68),
};

static void __init rd88f5181l_ge_init(void)
{
	/*
	 * Setup basic Orion functions. Need to be called early.
	 */
	orion5x_init();

	orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);

	/*
	 * Configure peripherals.
	 */
	orion5x_ehci0_init();
	orion5x_eth_init(&rd88f5181l_ge_eth_data);
	orion5x_eth_switch_init(&rd88f5181l_ge_switch_plat_data,
				gpio_to_irq(8));
	orion5x_i2c_init();
	orion5x_uart0_init();

	orion5x_setup_dev_boot_win(RD88F5181L_GE_NOR_BOOT_BASE,
				   RD88F5181L_GE_NOR_BOOT_SIZE);
	platform_device_register(&rd88f5181l_ge_nor_boot_flash);

	i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
}

static int __init
rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
	int irq;

	/*
	 * Check for devices with hard-wired IRQs.
	 */
	irq = orion5x_pci_map_irq(dev, slot, pin);
	if (irq != -1)
		return irq;

	/*
	 * Cardbus slot.
	 */
	if (pin == 1)
		return gpio_to_irq(4);
	else
		return gpio_to_irq(10);
}

static struct hw_pci rd88f5181l_ge_pci __initdata = {
	.nr_controllers	= 2,
	.swizzle	= pci_std_swizzle,
	.setup		= orion5x_pci_sys_setup,
	.scan		= orion5x_pci_sys_scan_bus,
	.map_irq	= rd88f5181l_ge_pci_map_irq,
};

static int __init rd88f5181l_ge_pci_init(void)
{
	if (machine_is_rd88f5181l_ge()) {
		orion5x_pci_set_cardbus_mode();
		pci_common_init(&rd88f5181l_ge_pci);
	}

	return 0;
}
subsys_initcall(rd88f5181l_ge_pci_init);

MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
	.atag_offset	= 0x100,
	.init_machine	= rd88f5181l_ge_init,
	.map_io		= orion5x_map_io,
	.init_early	= orion5x_init_early,
	.init_irq	= orion5x_init_irq,
	.timer		= &orion5x_timer,
	.fixup		= tag_fixup_mem32,
	.restart	= orion5x_restart,
MACHINE_END
Commit	Line	Data
70129132 LB	1	/*
	2	* arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
	3	*
	4	* Marvell Orion-VoIP GE Reference Design Setup
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*/
2f8163ba	10	#include <linux/gpio.h>
70129132 LB	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/pci.h>
	15	#include <linux/irq.h>
	16	#include <linux/mtd/physmap.h>
	17	#include <linux/mv643xx_eth.h>
81600eea	18	#include <linux/ethtool.h>
70129132	19	#include <linux/i2c.h>
dcf1cece	20	#include <net/dsa.h>
70129132	21	#include <asm/mach-types.h>
70129132 LB	22	#include <asm/leds.h>
	23	#include <asm/mach/arch.h>
	24	#include <asm/mach/pci.h>
a09e64fb	25	#include <mach/orion5x.h>
70129132 LB	26	#include "common.h"
	27	#include "mpp.h"
	28
	29	/*****************************************************************************
	30	* RD-88F5181L GE Info
	31	****************************************************************************/
	32	/*
	33	* 16M NOR flash Device bus boot chip select
	34	*/
	35	#define RD88F5181L_GE_NOR_BOOT_BASE 0xff000000
	36	#define RD88F5181L_GE_NOR_BOOT_SIZE SZ_16M
	37
	38
	39	/*****************************************************************************
	40	* 16M NOR Flash on Device bus Boot chip select
	41	****************************************************************************/
	42	static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
	43	.width = 1,
	44	};
	45
	46	static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
	47	.flags = IORESOURCE_MEM,
	48	.start = RD88F5181L_GE_NOR_BOOT_BASE,
	49	.end = RD88F5181L_GE_NOR_BOOT_BASE +
	50	RD88F5181L_GE_NOR_BOOT_SIZE - 1,
	51	};
	52
	53	static struct platform_device rd88f5181l_ge_nor_boot_flash = {
	54	.name = "physmap-flash",
	55	.id = 0,
	56	.dev = {
	57	.platform_data = &rd88f5181l_ge_nor_boot_flash_data,
	58	},
	59	.num_resources = 1,
	60	.resource = &rd88f5181l_ge_nor_boot_flash_resource,
	61	};
	62
	63
	64	/*****************************************************************************
	65	* General Setup
	66	****************************************************************************/
554cdaef AL	67	static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
	68	MPP0_GPIO, /* LED1 */
	69	MPP1_GPIO, /* LED5 */
	70	MPP2_GPIO, /* LED4 */
	71	MPP3_GPIO, /* LED3 */
	72	MPP4_GPIO, /* PCI_intA */
	73	MPP5_GPIO, /* RTC interrupt */
	74	MPP6_PCI_CLK, /* CPU PCI refclk */
	75	MPP7_PCI_CLK, /* PCI/PCIe refclk */
	76	MPP8_GPIO, /* 88e6131 interrupt */
	77	MPP9_GPIO, /* GE_RXERR */
	78	MPP10_GPIO, /* PCI_intB */
	79	MPP11_GPIO, /* LED2 */
	80	MPP12_GIGE, /* GE_TXD[4] */
	81	MPP13_GIGE, /* GE_TXD[5] */
	82	MPP14_GIGE, /* GE_TXD[6] */
	83	MPP15_GIGE, /* GE_TXD[7] */
	84	MPP16_GIGE, /* GE_RXD[4] */
	85	MPP17_GIGE, /* GE_RXD[5] */
	86	MPP18_GIGE, /* GE_RXD[6] */
	87	MPP19_GIGE, /* GE_RXD[7] */
	88	0,
70129132 LB	89	};
	90
	91	static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
ac840605	92	.phy_addr = MV643XX_ETH_PHY_NONE,
81600eea LB	93	.speed = SPEED_1000,
81600eea LB	94	.duplex = DUPLEX_FULL,
70129132 LB	95	};
70129132 LB	96
e84665c9	97	static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
dcf1cece LB	98	.port_names[0] = "lan2",
	99	.port_names[1] = "lan1",
	100	.port_names[2] = "wan",
	101	.port_names[3] = "cpu",
	102	.port_names[5] = "lan4",
	103	.port_names[7] = "lan3",
	104	};
	105
e84665c9 LB	106	static struct dsa_platform_data rd88f5181l_ge_switch_plat_data = {
	107	.nr_chips = 1,
	108	.chip = &rd88f5181l_ge_switch_chip_data,
	109	};
	110
70129132 LB	111	static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
	112	I2C_BOARD_INFO("ds1338", 0x68),
	113	};
	114
	115	static void __init rd88f5181l_ge_init(void)
	116	{
	117	/*
	118	* Setup basic Orion functions. Need to be called early.
	119	*/
	120	orion5x_init();
	121
	122	orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);
	123
	124	/*
	125	* Configure peripherals.
	126	*/
	127	orion5x_ehci0_init();
	128	orion5x_eth_init(&rd88f5181l_ge_eth_data);
e84665c9 LB	129	orion5x_eth_switch_init(&rd88f5181l_ge_switch_plat_data,
e84665c9 LB	130	gpio_to_irq(8));
70129132 LB	131	orion5x_i2c_init();
	132	orion5x_uart0_init();
	133
	134	orion5x_setup_dev_boot_win(RD88F5181L_GE_NOR_BOOT_BASE,
	135	RD88F5181L_GE_NOR_BOOT_SIZE);
	136	platform_device_register(&rd88f5181l_ge_nor_boot_flash);
	137
	138	i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
	139	}
	140
	141	static int __init
d5341942	142	rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
70129132 LB	143	{
	144	int irq;
	145
	146	/*
	147	* Check for devices with hard-wired IRQs.
	148	*/
	149	irq = orion5x_pci_map_irq(dev, slot, pin);
	150	if (irq != -1)
	151	return irq;
	152
	153	/*
	154	* Cardbus slot.
	155	*/
	156	if (pin == 1)
	157	return gpio_to_irq(4);
	158	else
	159	return gpio_to_irq(10);
	160	}
	161
	162	static struct hw_pci rd88f5181l_ge_pci __initdata = {
	163	.nr_controllers = 2,
	164	.swizzle = pci_std_swizzle,
	165	.setup = orion5x_pci_sys_setup,
	166	.scan = orion5x_pci_sys_scan_bus,
	167	.map_irq = rd88f5181l_ge_pci_map_irq,
	168	};
	169
	170	static int __init rd88f5181l_ge_pci_init(void)
	171	{
	172	if (machine_is_rd88f5181l_ge()) {
	173	orion5x_pci_set_cardbus_mode();
	174	pci_common_init(&rd88f5181l_ge_pci);
	175	}
	176
	177	return 0;
	178	}
	179	subsys_initcall(rd88f5181l_ge_pci_init);
	180
	181	MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
	182	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
65aa1b1e	183	.atag_offset = 0x100,
70129132 LB	184	.init_machine = rd88f5181l_ge_init,
70129132 LB	185	.map_io = orion5x_map_io,
4ee1f6b5	186	.init_early = orion5x_init_early,
70129132 LB	187	.init_irq = orion5x_init_irq,
	188	.timer = &orion5x_timer,
	189	.fixup = tag_fixup_mem32,
764cbcc2	190	.restart = orion5x_restart,
70129132	191	MACHINE_END