[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-orion5x / gpio.c

/*
 * arch/arm/mach-orion5x/gpio.c
 *
 * GPIO functions for Marvell Orion System On Chip
 *
 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/bitops.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/orion5x.h>
#include "common.h"

static DEFINE_SPINLOCK(gpio_lock);
static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)];
static const char *gpio_label[GPIO_MAX];  /* non null for allocated GPIOs */

void __init orion5x_gpio_set_valid_pins(u32 pins)
{
	gpio_valid[0] = pins;
}

/*
 * GENERIC_GPIO primitives
 */
int gpio_direction_input(unsigned pin)
{
	unsigned long flags;

	if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
		pr_debug("%s: invalid GPIO %d\n", __func__, pin);
		return -EINVAL;
	}

	spin_lock_irqsave(&gpio_lock, flags);

	/*
	 * Some callers might have not used the gpio_request(),
	 * so flag this pin as requested now.
	 */
	if (!gpio_label[pin])
		gpio_label[pin] = "?";

	orion5x_setbits(GPIO_IO_CONF, 1 << pin);

	spin_unlock_irqrestore(&gpio_lock, flags);
	return 0;
}
EXPORT_SYMBOL(gpio_direction_input);

int gpio_direction_output(unsigned pin, int value)
{
	unsigned long flags;
	int mask;

	if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
		pr_debug("%s: invalid GPIO %d\n", __func__, pin);
		return -EINVAL;
	}

	spin_lock_irqsave(&gpio_lock, flags);

	/*
	 * Some callers might have not used the gpio_request(),
	 * so flag this pin as requested now.
	 */
	if (!gpio_label[pin])
		gpio_label[pin] = "?";

	mask = 1 << pin;
	orion5x_clrbits(GPIO_BLINK_EN, mask);
	if (value)
		orion5x_setbits(GPIO_OUT, mask);
	else
		orion5x_clrbits(GPIO_OUT, mask);
	orion5x_clrbits(GPIO_IO_CONF, mask);

	spin_unlock_irqrestore(&gpio_lock, flags);
	return 0;
}
EXPORT_SYMBOL(gpio_direction_output);

int gpio_get_value(unsigned pin)
{
	int val, mask = 1 << pin;

	if (orion5x_read(GPIO_IO_CONF) & mask)
		val = orion5x_read(GPIO_DATA_IN) ^ orion5x_read(GPIO_IN_POL);
	else
		val = orion5x_read(GPIO_OUT);

	return val & mask;
}
EXPORT_SYMBOL(gpio_get_value);

void gpio_set_value(unsigned pin, int value)
{
	unsigned long flags;
	int mask = 1 << pin;

	spin_lock_irqsave(&gpio_lock, flags);

	orion5x_clrbits(GPIO_BLINK_EN, mask);
	if (value)
		orion5x_setbits(GPIO_OUT, mask);
	else
		orion5x_clrbits(GPIO_OUT, mask);

	spin_unlock_irqrestore(&gpio_lock, flags);
}
EXPORT_SYMBOL(gpio_set_value);

void orion5x_gpio_set_blink(unsigned pin, int blink)
{
	unsigned long flags;
	int mask = 1 << pin;

	spin_lock_irqsave(&gpio_lock, flags);

	orion5x_clrbits(GPIO_OUT, mask);
	if (blink)
		orion5x_setbits(GPIO_BLINK_EN, mask);
	else
		orion5x_clrbits(GPIO_BLINK_EN, mask);

	spin_unlock_irqrestore(&gpio_lock, flags);
}
EXPORT_SYMBOL(orion5x_gpio_set_blink);

int gpio_request(unsigned pin, const char *label)
{
	int ret = 0;
	unsigned long flags;

	if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
		pr_debug("%s: invalid GPIO %d\n", __func__, pin);
		return -EINVAL;
	}

	spin_lock_irqsave(&gpio_lock, flags);

	if (gpio_label[pin]) {
		pr_debug("%s: GPIO %d already used as %s\n",
			 __func__, pin, gpio_label[pin]);
		ret = -EBUSY;
	} else
		gpio_label[pin] = label ? label : "?";

	spin_unlock_irqrestore(&gpio_lock, flags);
	return ret;
}
EXPORT_SYMBOL(gpio_request);

void gpio_free(unsigned pin)
{
	if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
		pr_debug("%s: invalid GPIO %d\n", __func__, pin);
		return;
	}

	if (!gpio_label[pin])
		pr_warning("%s: GPIO %d already freed\n", __func__, pin);
	else
		gpio_label[pin] = NULL;
}
EXPORT_SYMBOL(gpio_free);

/* Debug helper */
void gpio_display(void)
{
	int i;

	for (i = 0; i < GPIO_MAX; i++) {
		printk(KERN_DEBUG "Pin-%d: ", i);

		if (!test_bit(i, gpio_valid)) {
			printk("non-GPIO\n");
		} else if (!gpio_label[i]) {
			printk("GPIO, free\n");
		} else {
			printk("GPIO, used by %s, ", gpio_label[i]);
			if (orion5x_read(GPIO_IO_CONF) & (1 << i)) {
				printk("input, active %s, level %s, edge %s\n",
				((orion5x_read(GPIO_IN_POL) >> i) & 1) ? "low" : "high",
				((orion5x_read(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked",
				((orion5x_read(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked");
			} else {
				printk("output, val=%d\n", (orion5x_read(GPIO_OUT) >> i) & 1);
			}
		}
	}

	printk(KERN_DEBUG "MPP_0_7_CTRL (0x%08x) = 0x%08x\n",
				MPP_0_7_CTRL, orion5x_read(MPP_0_7_CTRL));
	printk(KERN_DEBUG "MPP_8_15_CTRL (0x%08x) = 0x%08x\n",
				MPP_8_15_CTRL, orion5x_read(MPP_8_15_CTRL));
	printk(KERN_DEBUG "MPP_16_19_CTRL (0x%08x) = 0x%08x\n",
				MPP_16_19_CTRL, orion5x_read(MPP_16_19_CTRL));
	printk(KERN_DEBUG "MPP_DEV_CTRL (0x%08x) = 0x%08x\n",
				MPP_DEV_CTRL, orion5x_read(MPP_DEV_CTRL));
	printk(KERN_DEBUG "GPIO_OUT (0x%08x) = 0x%08x\n",
				GPIO_OUT, orion5x_read(GPIO_OUT));
	printk(KERN_DEBUG "GPIO_IO_CONF (0x%08x) = 0x%08x\n",
				GPIO_IO_CONF, orion5x_read(GPIO_IO_CONF));
	printk(KERN_DEBUG "GPIO_BLINK_EN (0x%08x) = 0x%08x\n",
				GPIO_BLINK_EN, orion5x_read(GPIO_BLINK_EN));
	printk(KERN_DEBUG "GPIO_IN_POL (0x%08x) = 0x%08x\n",
				GPIO_IN_POL, orion5x_read(GPIO_IN_POL));
	printk(KERN_DEBUG "GPIO_DATA_IN (0x%08x) = 0x%08x\n",
				GPIO_DATA_IN, orion5x_read(GPIO_DATA_IN));
	printk(KERN_DEBUG "GPIO_LEVEL_MASK (0x%08x) = 0x%08x\n",
				GPIO_LEVEL_MASK, orion5x_read(GPIO_LEVEL_MASK));
	printk(KERN_DEBUG "GPIO_EDGE_CAUSE (0x%08x) = 0x%08x\n",
				GPIO_EDGE_CAUSE, orion5x_read(GPIO_EDGE_CAUSE));
	printk(KERN_DEBUG "GPIO_EDGE_MASK (0x%08x) = 0x%08x\n",
				GPIO_EDGE_MASK, orion5x_read(GPIO_EDGE_MASK));
}
Commit	Line	Data
01af72e4	1	/*
9dd0b194	2	* arch/arm/mach-orion5x/gpio.c
01af72e4 TP	3	*
	4	* GPIO functions for Marvell Orion System On Chip
	5	*
	6	* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
	7	*
159ffb3a LB	8	* This file is licensed under the terms of the GNU General Public
159ffb3a LB	9	* License version 2. This program is licensed "as is" without any
01af72e4 TP	10	* warranty of any kind, whether express or implied.
	11	*/
	12
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/module.h>
	16	#include <linux/spinlock.h>
	17	#include <linux/bitops.h>
	18	#include <asm/gpio.h>
b590bc5c	19	#include <asm/io.h>
9dd0b194	20	#include <asm/arch/orion5x.h>
01af72e4 TP	21	#include "common.h"
	22
	23	static DEFINE_SPINLOCK(gpio_lock);
	24	static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)];
	25	static const char gpio_label[GPIO_MAX]; / non null for allocated GPIOs */
	26
9dd0b194	27	void __init orion5x_gpio_set_valid_pins(u32 pins)
01af72e4 TP	28	{
	29	gpio_valid[0] = pins;
	30	}
	31
	32	/*
	33	* GENERIC_GPIO primitives
	34	*/
	35	int gpio_direction_input(unsigned pin)
	36	{
	37	unsigned long flags;
	38
	39	if (pin >= GPIO_MAX \|\| !test_bit(pin, gpio_valid)) {
8e86f427	40	pr_debug("%s: invalid GPIO %d\n", __func__, pin);
01af72e4 TP	41	return -EINVAL;
	42	}
	43
	44	spin_lock_irqsave(&gpio_lock, flags);
	45
	46	/*
	47	* Some callers might have not used the gpio_request(),
	48	* so flag this pin as requested now.
	49	*/
	50	if (!gpio_label[pin])
	51	gpio_label[pin] = "?";
	52
9dd0b194	53	orion5x_setbits(GPIO_IO_CONF, 1 << pin);
01af72e4 TP	54
	55	spin_unlock_irqrestore(&gpio_lock, flags);
	56	return 0;
	57	}
	58	EXPORT_SYMBOL(gpio_direction_input);
	59
	60	int gpio_direction_output(unsigned pin, int value)
	61	{
	62	unsigned long flags;
	63	int mask;
	64
	65	if (pin >= GPIO_MAX \|\| !test_bit(pin, gpio_valid)) {
8e86f427	66	pr_debug("%s: invalid GPIO %d\n", __func__, pin);
01af72e4 TP	67	return -EINVAL;
	68	}
	69
	70	spin_lock_irqsave(&gpio_lock, flags);
	71
	72	/*
	73	* Some callers might have not used the gpio_request(),
	74	* so flag this pin as requested now.
	75	*/
	76	if (!gpio_label[pin])
	77	gpio_label[pin] = "?";
	78
	79	mask = 1 << pin;
9dd0b194	80	orion5x_clrbits(GPIO_BLINK_EN, mask);
01af72e4	81	if (value)
9dd0b194	82	orion5x_setbits(GPIO_OUT, mask);
01af72e4	83	else
9dd0b194 LB	84	orion5x_clrbits(GPIO_OUT, mask);
9dd0b194 LB	85	orion5x_clrbits(GPIO_IO_CONF, mask);
01af72e4 TP	86
	87	spin_unlock_irqrestore(&gpio_lock, flags);
	88	return 0;
	89	}
	90	EXPORT_SYMBOL(gpio_direction_output);
	91
	92	int gpio_get_value(unsigned pin)
	93	{
	94	int val, mask = 1 << pin;
	95
9dd0b194 LB	96	if (orion5x_read(GPIO_IO_CONF) & mask)
9dd0b194 LB	97	val = orion5x_read(GPIO_DATA_IN) ^ orion5x_read(GPIO_IN_POL);
01af72e4	98	else
9dd0b194	99	val = orion5x_read(GPIO_OUT);
01af72e4 TP	100
	101	return val & mask;
	102	}
	103	EXPORT_SYMBOL(gpio_get_value);
	104
	105	void gpio_set_value(unsigned pin, int value)
	106	{
	107	unsigned long flags;
	108	int mask = 1 << pin;
	109
	110	spin_lock_irqsave(&gpio_lock, flags);
	111
9dd0b194	112	orion5x_clrbits(GPIO_BLINK_EN, mask);
01af72e4	113	if (value)
9dd0b194	114	orion5x_setbits(GPIO_OUT, mask);
01af72e4	115	else
9dd0b194	116	orion5x_clrbits(GPIO_OUT, mask);
01af72e4 TP	117
	118	spin_unlock_irqrestore(&gpio_lock, flags);
	119	}
	120	EXPORT_SYMBOL(gpio_set_value);
	121
9dd0b194	122	void orion5x_gpio_set_blink(unsigned pin, int blink)
b11e9e02 HVR	123	{
	124	unsigned long flags;
	125	int mask = 1 << pin;
	126
	127	spin_lock_irqsave(&gpio_lock, flags);
	128
9dd0b194	129	orion5x_clrbits(GPIO_OUT, mask);
b11e9e02	130	if (blink)
9dd0b194	131	orion5x_setbits(GPIO_BLINK_EN, mask);
b11e9e02	132	else
9dd0b194	133	orion5x_clrbits(GPIO_BLINK_EN, mask);
b11e9e02 HVR	134
	135	spin_unlock_irqrestore(&gpio_lock, flags);
	136	}
9dd0b194	137	EXPORT_SYMBOL(orion5x_gpio_set_blink);
b11e9e02	138
01af72e4 TP	139	int gpio_request(unsigned pin, const char *label)
	140	{
	141	int ret = 0;
	142	unsigned long flags;
	143
	144	if (pin >= GPIO_MAX \|\| !test_bit(pin, gpio_valid)) {
8e86f427	145	pr_debug("%s: invalid GPIO %d\n", __func__, pin);
01af72e4 TP	146	return -EINVAL;
	147	}
	148
	149	spin_lock_irqsave(&gpio_lock, flags);
	150
	151	if (gpio_label[pin]) {
	152	pr_debug("%s: GPIO %d already used as %s\n",
8e86f427	153	__func__, pin, gpio_label[pin]);
01af72e4 TP	154	ret = -EBUSY;
	155	} else
	156	gpio_label[pin] = label ? label : "?";
	157
	158	spin_unlock_irqrestore(&gpio_lock, flags);
	159	return ret;
	160	}
	161	EXPORT_SYMBOL(gpio_request);
	162
	163	void gpio_free(unsigned pin)
	164	{
	165	if (pin >= GPIO_MAX \|\| !test_bit(pin, gpio_valid)) {
8e86f427	166	pr_debug("%s: invalid GPIO %d\n", __func__, pin);
01af72e4 TP	167	return;
	168	}
	169
	170	if (!gpio_label[pin])
8e86f427	171	pr_warning("%s: GPIO %d already freed\n", __func__, pin);
01af72e4 TP	172	else
	173	gpio_label[pin] = NULL;
	174	}
	175	EXPORT_SYMBOL(gpio_free);
	176
	177	/* Debug helper */
	178	void gpio_display(void)
	179	{
	180	int i;
	181
	182	for (i = 0; i < GPIO_MAX; i++) {
	183	printk(KERN_DEBUG "Pin-%d: ", i);
	184
	185	if (!test_bit(i, gpio_valid)) {
	186	printk("non-GPIO\n");
	187	} else if (!gpio_label[i]) {
	188	printk("GPIO, free\n");
	189	} else {
	190	printk("GPIO, used by %s, ", gpio_label[i]);
9dd0b194	191	if (orion5x_read(GPIO_IO_CONF) & (1 << i)) {
01af72e4	192	printk("input, active %s, level %s, edge %s\n",
9dd0b194 LB	193	((orion5x_read(GPIO_IN_POL) >> i) & 1) ? "low" : "high",
	194	((orion5x_read(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked",
	195	((orion5x_read(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked");
01af72e4	196	} else {
9dd0b194	197	printk("output, val=%d\n", (orion5x_read(GPIO_OUT) >> i) & 1);
01af72e4 TP	198	}
	199	}
	200	}
	201
	202	printk(KERN_DEBUG "MPP_0_7_CTRL (0x%08x) = 0x%08x\n",
9dd0b194	203	MPP_0_7_CTRL, orion5x_read(MPP_0_7_CTRL));
01af72e4	204	printk(KERN_DEBUG "MPP_8_15_CTRL (0x%08x) = 0x%08x\n",
9dd0b194	205	MPP_8_15_CTRL, orion5x_read(MPP_8_15_CTRL));
01af72e4	206	printk(KERN_DEBUG "MPP_16_19_CTRL (0x%08x) = 0x%08x\n",
9dd0b194	207	MPP_16_19_CTRL, orion5x_read(MPP_16_19_CTRL));
01af72e4	208	printk(KERN_DEBUG "MPP_DEV_CTRL (0x%08x) = 0x%08x\n",
9dd0b194	209	MPP_DEV_CTRL, orion5x_read(MPP_DEV_CTRL));
01af72e4	210	printk(KERN_DEBUG "GPIO_OUT (0x%08x) = 0x%08x\n",
9dd0b194	211	GPIO_OUT, orion5x_read(GPIO_OUT));
01af72e4	212	printk(KERN_DEBUG "GPIO_IO_CONF (0x%08x) = 0x%08x\n",
9dd0b194	213	GPIO_IO_CONF, orion5x_read(GPIO_IO_CONF));
01af72e4	214	printk(KERN_DEBUG "GPIO_BLINK_EN (0x%08x) = 0x%08x\n",
9dd0b194	215	GPIO_BLINK_EN, orion5x_read(GPIO_BLINK_EN));
01af72e4	216	printk(KERN_DEBUG "GPIO_IN_POL (0x%08x) = 0x%08x\n",
9dd0b194	217	GPIO_IN_POL, orion5x_read(GPIO_IN_POL));
01af72e4	218	printk(KERN_DEBUG "GPIO_DATA_IN (0x%08x) = 0x%08x\n",
9dd0b194	219	GPIO_DATA_IN, orion5x_read(GPIO_DATA_IN));
01af72e4	220	printk(KERN_DEBUG "GPIO_LEVEL_MASK (0x%08x) = 0x%08x\n",
9dd0b194	221	GPIO_LEVEL_MASK, orion5x_read(GPIO_LEVEL_MASK));
01af72e4	222	printk(KERN_DEBUG "GPIO_EDGE_CAUSE (0x%08x) = 0x%08x\n",
9dd0b194	223	GPIO_EDGE_CAUSE, orion5x_read(GPIO_EDGE_CAUSE));
01af72e4	224	printk(KERN_DEBUG "GPIO_EDGE_MASK (0x%08x) = 0x%08x\n",
9dd0b194	225	GPIO_EDGE_MASK, orion5x_read(GPIO_EDGE_MASK));
01af72e4	226	}