ARM: OMAP3: hwmod data: Correct clock domains for USB modules
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / vp.h
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1/*
2 * OMAP3/4 Voltage Processor (VP) structure and macro definitions
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008, 2011 Nokia Corporation
10 * Kalle Jokiniemi
11 * Paul Walmsley
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License version
15 * 2 as published by the Free Software Foundation.
16 */
17#ifndef __ARCH_ARM_MACH_OMAP2_VP_H
18#define __ARCH_ARM_MACH_OMAP2_VP_H
19
20#include <linux/kernel.h>
21
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22struct voltagedomain;
23
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24/*
25 * Voltage Processor (VP) identifiers
26 */
27#define OMAP3_VP_VDD_MPU_ID 0
28#define OMAP3_VP_VDD_CORE_ID 1
29#define OMAP4_VP_VDD_CORE_ID 0
30#define OMAP4_VP_VDD_IVA_ID 1
31#define OMAP4_VP_VDD_MPU_ID 2
32
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33/* XXX document */
34#define VP_IDLE_TIMEOUT 200
35#define VP_TRANXDONE_TIMEOUT 300
36
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37/**
38 * struct omap_vp_ops - per-VP operations
39 * @check_txdone: check for VP transaction done
40 * @clear_txdone: clear VP transaction done status
41 */
42struct omap_vp_ops {
43 u32 (*check_txdone)(u8 vp_id);
44 void (*clear_txdone)(u8 vp_id);
45};
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46
47/**
b7ea803e 48 * struct omap_vp_common - register data common to all VDDs
0ec3041e 49 * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg
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50 * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
51 * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
0ec3041e 52 * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
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53 * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
54 * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
55 * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
56 * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
57 * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
58 * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
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59 * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
60 * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
61 * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
62 * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
63 * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
64 * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
65 * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
bea30ed6 66 * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg
c0718df4 67 */
b7ea803e 68struct omap_vp_common {
0ec3041e 69 u32 vpconfig_erroroffset_mask;
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70 u32 vpconfig_errorgain_mask;
71 u32 vpconfig_initvoltage_mask;
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72 u8 vpconfig_timeouten;
73 u8 vpconfig_initvdd;
74 u8 vpconfig_forceupdate;
75 u8 vpconfig_vpenable;
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76 u8 vstepmin_stepmin_shift;
77 u8 vstepmin_smpswaittimemin_shift;
78 u8 vstepmax_stepmax_shift;
79 u8 vstepmax_smpswaittimemax_shift;
80 u8 vlimitto_vddmin_shift;
81 u8 vlimitto_vddmax_shift;
82 u8 vlimitto_timeout_shift;
bea30ed6 83 u8 vpvoltage_mask;
c0718df4 84
58aaa599 85 const struct omap_vp_ops *ops;
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86};
87
88/**
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89 * struct omap_vp_instance - VP register offsets (per-VDD)
90 * @common: pointer to struct omap_vp_common * for this SoC
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91 * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
92 * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
93 * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
94 * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
95 * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
58aaa599 96 * @id: Unique identifier for VP instance.
b7ea803e 97 * @enabled: flag to keep track of whether vp is enabled or not
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98 *
99 * XXX vp_common is probably not needed since it is per-SoC
100 */
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101struct omap_vp_instance {
102 const struct omap_vp_common *common;
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103 u8 vpconfig;
104 u8 vstepmin;
105 u8 vstepmax;
106 u8 vlimitto;
107 u8 vstatus;
108 u8 voltage;
58aaa599 109 u8 id;
b7ea803e 110 bool enabled;
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111};
112
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113extern struct omap_vp_instance omap3_vp_mpu;
114extern struct omap_vp_instance omap3_vp_core;
c0718df4 115
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116extern struct omap_vp_instance omap4_vp_mpu;
117extern struct omap_vp_instance omap4_vp_iva;
118extern struct omap_vp_instance omap4_vp_core;
c0718df4 119
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120extern struct omap_vp_param omap3_mpu_vp_data;
121extern struct omap_vp_param omap3_core_vp_data;
122
123extern struct omap_vp_param omap4_mpu_vp_data;
124extern struct omap_vp_param omap4_iva_vp_data;
125extern struct omap_vp_param omap4_core_vp_data;
126
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127void omap_vp_init(struct voltagedomain *voltdm);
128void omap_vp_enable(struct voltagedomain *voltdm);
129void omap_vp_disable(struct voltagedomain *voltdm);
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130int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
131 unsigned long target_volt);
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132int omap_vp_update_errorgain(struct voltagedomain *voltdm,
133 unsigned long target_volt);
01f48d30 134
c0718df4 135#endif