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ARM: OMAP3: hwmod data: Correct clock domains for USB modules
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / twl-common.c
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a53b8e3b
PU		 1/*
2 * twl-common.c
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc..
5 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/i2c.h>
24#include <linux/i2c/twl.h>
25#include <linux/gpio.h>
c8d4bafe 26#include <linux/string.h>
b22f954b
PU		 27#include <linux/regulator/machine.h>
28#include <linux/regulator/fixed.h>
a53b8e3b 29
dbc04161 30#include "soc.h"
a53b8e3b 31#include "twl-common.h"
46232a36 32#include "pm.h"
49c008ec 33#include "voltage.h"
5941b814 34#include "mux.h"
a53b8e3b
PU		 35
36static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .addr = 0x48,
38 .flags = I2C_CLIENT_WAKE,
39};
40
da0085ff 41#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
49c008ec
TK		 42static int twl_set_voltage(void *data, int target_uV)
43{
44 struct voltagedomain *voltdm = (struct voltagedomain *)data;
45 return voltdm_scale(voltdm, target_uV);
46}
47
48static int twl_get_voltage(void *data)
49{
50 struct voltagedomain *voltdm = (struct voltagedomain *)data;
51 return voltdm_get_voltage(voltdm);
52}
da0085ff 53#endif
49c008ec 54
a53b8e3b
PU		 55void __init omap_pmic_init(int bus, u32 clkrate,
56 const char *pmic_type, int pmic_irq,
57 struct twl4030_platform_data *pmic_data)
58{
265a2bc8 59 omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
c8d4bafe 60 strlcpy(pmic_i2c_board_info.type, pmic_type,
a53b8e3b
PU		 61 sizeof(pmic_i2c_board_info.type));
62 pmic_i2c_board_info.irq = pmic_irq;
63 pmic_i2c_board_info.platform_data = pmic_data;
64
65 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
66}
b22f954b 67
8eaeb939
PU		 68void __init omap4_pmic_init(const char *pmic_type,
69 struct twl4030_platform_data *pmic_data,
9495d1e2 70 struct i2c_board_info *devices, int nr_devices)
8eaeb939
PU		 71{
72 /* PMIC part*/
5941b814 73 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
1ef43369 74 omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
9495d1e2 75 omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
8eaeb939 76
9495d1e2
PU		 77 /* Register additional devices on i2c1 bus if needed */
78 if (devices)
79 i2c_register_board_info(1, devices, nr_devices);
8eaeb939
PU		 80}
81
46232a36
KH		 82void __init omap_pmic_late_init(void)
83{
9495d1e2
PU		 84 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
85 if (!pmic_i2c_board_info.irq)
86 return;
87
88 omap3_twl_init();
89 omap4_twl_init();
46232a36
KH		 90}
91
d12d1fca 92#if defined(CONFIG_ARCH_OMAP3)
827ed9ae
PU		 93static struct twl4030_usb_data omap3_usb_pdata = {
94 .usb_mode = T2_USB_MODE_ULPI,
95};
96
97static int omap3_batt_table[] = {
98/* 0 C */
9930800, 29500, 28300, 27100,
10026000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
10117200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
10211600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
1038020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
1045640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
1054040, 3910, 3790, 3670, 3550
106};
107
108static struct twl4030_bci_platform_data omap3_bci_pdata = {
109 .battery_tmp_tbl = omap3_batt_table,
110 .tblsize = ARRAY_SIZE(omap3_batt_table),
111};
112
113static struct twl4030_madc_platform_data omap3_madc_pdata = {
114 .irq_line = 1,
115};
116
4ae6df5e 117static struct twl4030_codec_data omap3_codec;
827ed9ae 118
4ae6df5e 119static struct twl4030_audio_data omap3_audio_pdata = {
827ed9ae 120 .audio_mclk = 26000000,
4ae6df5e 121 .codec = &omap3_codec,
827ed9ae
PU		 122};
123
b252b0ef
PU		 124static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
125 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
126};
127
128static struct regulator_init_data omap3_vdac_idata = {
129 .constraints = {
130 .min_uV = 1800000,
131 .max_uV = 1800000,
132 .valid_modes_mask = REGULATOR_MODE_NORMAL
133 | REGULATOR_MODE_STANDBY,
134 .valid_ops_mask = REGULATOR_CHANGE_MODE
135 | REGULATOR_CHANGE_STATUS,
136 },
137 .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
138 .consumer_supplies = omap3_vdda_dac_supplies,
139};
140
141static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
142 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
7c68dd96 143 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
b252b0ef
PU		 144};
145
146static struct regulator_init_data omap3_vpll2_idata = {
147 .constraints = {
148 .min_uV = 1800000,
149 .max_uV = 1800000,
150 .valid_modes_mask = REGULATOR_MODE_NORMAL
151 | REGULATOR_MODE_STANDBY,
152 .valid_ops_mask = REGULATOR_CHANGE_MODE
153 | REGULATOR_CHANGE_STATUS,
154 },
155 .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
156 .consumer_supplies = omap3_vpll2_supplies,
157};
158
23e22a5e 159static struct regulator_consumer_supply omap3_vdd1_supply[] = {
24d7b40a 160 REGULATOR_SUPPLY("vcc", "cpu0"),
23e22a5e
TK		 161};
162
163static struct regulator_consumer_supply omap3_vdd2_supply[] = {
164 REGULATOR_SUPPLY("vcc", "l3_main.0"),
165};
166
167static struct regulator_init_data omap3_vdd1 = {
168 .constraints = {
169 .name = "vdd_mpu_iva",
170 .min_uV = 600000,
171 .max_uV = 1450000,
172 .valid_modes_mask = REGULATOR_MODE_NORMAL,
173 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
174 },
175 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply),
176 .consumer_supplies = omap3_vdd1_supply,
177};
178
179static struct regulator_init_data omap3_vdd2 = {
180 .constraints = {
181 .name = "vdd_core",
182 .min_uV = 600000,
183 .max_uV = 1450000,
184 .valid_modes_mask = REGULATOR_MODE_NORMAL,
185 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
186 },
187 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply),
188 .consumer_supplies = omap3_vdd2_supply,
189};
190
49c008ec
TK		 191static struct twl_regulator_driver_data omap3_vdd1_drvdata = {
192 .get_voltage = twl_get_voltage,
193 .set_voltage = twl_set_voltage,
194};
195
196static struct twl_regulator_driver_data omap3_vdd2_drvdata = {
197 .get_voltage = twl_get_voltage,
198 .set_voltage = twl_set_voltage,
199};
200
d12d1fca
PU		 201void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
202 u32 pdata_flags, u32 regulators_flags)
203{
49c008ec
TK		 204 if (!pmic_data->vdd1) {
205 omap3_vdd1.driver_data = &omap3_vdd1_drvdata;
206 omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");
23e22a5e 207 pmic_data->vdd1 = &omap3_vdd1;
49c008ec
TK		 208 }
209 if (!pmic_data->vdd2) {
210 omap3_vdd2.driver_data = &omap3_vdd2_drvdata;
211 omap3_vdd2_drvdata.data = voltdm_lookup("core");
23e22a5e 212 pmic_data->vdd2 = &omap3_vdd2;
49c008ec 213 }
d12d1fca
PU		 214
215 /* Common platform data configurations */
216 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
217 pmic_data->usb = &omap3_usb_pdata;
218
219 if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
220 pmic_data->bci = &omap3_bci_pdata;
221
222 if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
223 pmic_data->madc = &omap3_madc_pdata;
224
225 if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
226 pmic_data->audio = &omap3_audio_pdata;
227
228 /* Common regulator configurations */
229 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
230 pmic_data->vdac = &omap3_vdac_idata;
231
232 if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
233 pmic_data->vpll2 = &omap3_vpll2_idata;
234}
235#endif /* CONFIG_ARCH_OMAP3 */
236
237#if defined(CONFIG_ARCH_OMAP4)
238static struct twl4030_usb_data omap4_usb_pdata = {
d12d1fca
PU		 239};
240
8a3d895b
TV		 241static struct regulator_consumer_supply omap4_vdda_hdmi_dac_supplies[] = {
242 REGULATOR_SUPPLY("vdda_hdmi_dac", "omapdss_hdmi"),
243};
244
b22f954b
PU		 245static struct regulator_init_data omap4_vdac_idata = {
246 .constraints = {
247 .min_uV = 1800000,
248 .max_uV = 1800000,
249 .valid_modes_mask = REGULATOR_MODE_NORMAL
250 | REGULATOR_MODE_STANDBY,
251 .valid_ops_mask = REGULATOR_CHANGE_MODE
252 | REGULATOR_CHANGE_STATUS,
253 },
8a3d895b
TV		 254 .num_consumer_supplies = ARRAY_SIZE(omap4_vdda_hdmi_dac_supplies),
255 .consumer_supplies = omap4_vdda_hdmi_dac_supplies,
fde0190d 256 .supply_regulator = "V2V1",
b22f954b
PU		 257};
258
259static struct regulator_init_data omap4_vaux2_idata = {
260 .constraints = {
261 .min_uV = 1200000,
262 .max_uV = 2800000,
263 .apply_uV = true,
264 .valid_modes_mask = REGULATOR_MODE_NORMAL
265 | REGULATOR_MODE_STANDBY,
266 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
267 | REGULATOR_CHANGE_MODE
268 | REGULATOR_CHANGE_STATUS,
269 },
270};
271
272static struct regulator_init_data omap4_vaux3_idata = {
273 .constraints = {
274 .min_uV = 1000000,
275 .max_uV = 3000000,
276 .apply_uV = true,
277 .valid_modes_mask = REGULATOR_MODE_NORMAL
278 | REGULATOR_MODE_STANDBY,
279 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
280 | REGULATOR_CHANGE_MODE
281 | REGULATOR_CHANGE_STATUS,
282 },
283};
284
285static struct regulator_consumer_supply omap4_vmmc_supply[] = {
286 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
287};
288
289/* VMMC1 for MMC1 card */
290static struct regulator_init_data omap4_vmmc_idata = {
291 .constraints = {
292 .min_uV = 1200000,
293 .max_uV = 3000000,
294 .apply_uV = true,
295 .valid_modes_mask = REGULATOR_MODE_NORMAL
296 | REGULATOR_MODE_STANDBY,
297 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
298 | REGULATOR_CHANGE_MODE
299 | REGULATOR_CHANGE_STATUS,
300 },
301 .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
302 .consumer_supplies = omap4_vmmc_supply,
303};
304
305static struct regulator_init_data omap4_vpp_idata = {
306 .constraints = {
307 .min_uV = 1800000,
308 .max_uV = 2500000,
309 .apply_uV = true,
310 .valid_modes_mask = REGULATOR_MODE_NORMAL
311 | REGULATOR_MODE_STANDBY,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
313 | REGULATOR_CHANGE_MODE
314 | REGULATOR_CHANGE_STATUS,
315 },
316};
317
318static struct regulator_init_data omap4_vana_idata = {
319 .constraints = {
320 .min_uV = 2100000,
321 .max_uV = 2100000,
322 .valid_modes_mask = REGULATOR_MODE_NORMAL
323 | REGULATOR_MODE_STANDBY,
324 .valid_ops_mask = REGULATOR_CHANGE_MODE
325 | REGULATOR_CHANGE_STATUS,
326 },
327};
328
4e6a0ab0
TV		 329static struct regulator_consumer_supply omap4_vcxio_supply[] = {
330 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"),
331 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
332 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"),
333};
334
b22f954b
PU		 335static struct regulator_init_data omap4_vcxio_idata = {
336 .constraints = {
337 .min_uV = 1800000,
338 .max_uV = 1800000,
339 .valid_modes_mask = REGULATOR_MODE_NORMAL
340 | REGULATOR_MODE_STANDBY,
341 .valid_ops_mask = REGULATOR_CHANGE_MODE
342 | REGULATOR_CHANGE_STATUS,
4e6a0ab0 343 .always_on = true,
b22f954b 344 },
4e6a0ab0
TV		 345 .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply),
346 .consumer_supplies = omap4_vcxio_supply,
fde0190d 347 .supply_regulator = "V2V1",
b22f954b
PU		 348};
349
350static struct regulator_init_data omap4_vusb_idata = {
351 .constraints = {
352 .min_uV = 3300000,
353 .max_uV = 3300000,
b22f954b
PU		 354 .valid_modes_mask = REGULATOR_MODE_NORMAL
355 | REGULATOR_MODE_STANDBY,
356 .valid_ops_mask = REGULATOR_CHANGE_MODE
357 | REGULATOR_CHANGE_STATUS,
358 },
359};
360
361static struct regulator_init_data omap4_clk32kg_idata = {
362 .constraints = {
363 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
364 },
365};
366
e160dda0 367static struct regulator_consumer_supply omap4_vdd1_supply[] = {
73c503cb 368 REGULATOR_SUPPLY("vcc", "cpu0"),
e160dda0
TK		 369};
370
371static struct regulator_consumer_supply omap4_vdd2_supply[] = {
372 REGULATOR_SUPPLY("vcc", "iva.0"),
373};
374
375static struct regulator_consumer_supply omap4_vdd3_supply[] = {
376 REGULATOR_SUPPLY("vcc", "l3_main.0"),
377};
378
379static struct regulator_init_data omap4_vdd1 = {
380 .constraints = {
381 .name = "vdd_mpu",
382 .min_uV = 500000,
383 .max_uV = 1500000,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL,
385 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
386 },
387 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply),
388 .consumer_supplies = omap4_vdd1_supply,
389};
390
391static struct regulator_init_data omap4_vdd2 = {
392 .constraints = {
393 .name = "vdd_iva",
394 .min_uV = 500000,
395 .max_uV = 1500000,
396 .valid_modes_mask = REGULATOR_MODE_NORMAL,
397 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
398 },
399 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply),
400 .consumer_supplies = omap4_vdd2_supply,
401};
402
403static struct regulator_init_data omap4_vdd3 = {
404 .constraints = {
405 .name = "vdd_core",
406 .min_uV = 500000,
407 .max_uV = 1500000,
408 .valid_modes_mask = REGULATOR_MODE_NORMAL,
409 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
410 },
411 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply),
412 .consumer_supplies = omap4_vdd3_supply,
413};
414
415
416static struct twl_regulator_driver_data omap4_vdd1_drvdata = {
417 .get_voltage = twl_get_voltage,
418 .set_voltage = twl_set_voltage,
419};
420
421static struct twl_regulator_driver_data omap4_vdd2_drvdata = {
422 .get_voltage = twl_get_voltage,
423 .set_voltage = twl_set_voltage,
424};
425
426static struct twl_regulator_driver_data omap4_vdd3_drvdata = {
427 .get_voltage = twl_get_voltage,
428 .set_voltage = twl_set_voltage,
429};
430
fde0190d
PU		 431static struct regulator_consumer_supply omap4_v1v8_supply[] = {
432 REGULATOR_SUPPLY("vio", "1-004b"),
433};
434
435static struct regulator_init_data omap4_v1v8_idata = {
436 .constraints = {
437 .min_uV = 1800000,
438 .max_uV = 1800000,
439 .valid_modes_mask = REGULATOR_MODE_NORMAL
440 | REGULATOR_MODE_STANDBY,
441 .valid_ops_mask = REGULATOR_CHANGE_MODE
442 | REGULATOR_CHANGE_STATUS,
443 .always_on = true,
444 },
445 .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply),
446 .consumer_supplies = omap4_v1v8_supply,
447};
448
449static struct regulator_consumer_supply omap4_v2v1_supply[] = {
450 REGULATOR_SUPPLY("v2v1", "1-004b"),
451};
452
453static struct regulator_init_data omap4_v2v1_idata = {
454 .constraints = {
455 .min_uV = 2100000,
456 .max_uV = 2100000,
457 .valid_modes_mask = REGULATOR_MODE_NORMAL
458 | REGULATOR_MODE_STANDBY,
459 .valid_ops_mask = REGULATOR_CHANGE_MODE
460 | REGULATOR_CHANGE_STATUS,
461 },
462 .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply),
463 .consumer_supplies = omap4_v2v1_supply,
464};
465
b22f954b
PU		 466void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
467 u32 pdata_flags, u32 regulators_flags)
468{
e160dda0
TK		 469 if (!pmic_data->vdd1) {
470 omap4_vdd1.driver_data = &omap4_vdd1_drvdata;
471 omap4_vdd1_drvdata.data = voltdm_lookup("mpu");
472 pmic_data->vdd1 = &omap4_vdd1;
473 }
474
475 if (!pmic_data->vdd2) {
476 omap4_vdd2.driver_data = &omap4_vdd2_drvdata;
477 omap4_vdd2_drvdata.data = voltdm_lookup("iva");
478 pmic_data->vdd2 = &omap4_vdd2;
479 }
480
481 if (!pmic_data->vdd3) {
482 omap4_vdd3.driver_data = &omap4_vdd3_drvdata;
483 omap4_vdd3_drvdata.data = voltdm_lookup("core");
484 pmic_data->vdd3 = &omap4_vdd3;
485 }
486
b22f954b
PU		 487 /* Common platform data configurations */
488 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
489 pmic_data->usb = &omap4_usb_pdata;
490
491 /* Common regulator configurations */
492 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
493 pmic_data->vdac = &omap4_vdac_idata;
494
495 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
496 pmic_data->vaux2 = &omap4_vaux2_idata;
497
498 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
499 pmic_data->vaux3 = &omap4_vaux3_idata;
500
501 if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
502 pmic_data->vmmc = &omap4_vmmc_idata;
503
504 if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
505 pmic_data->vpp = &omap4_vpp_idata;
506
507 if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
508 pmic_data->vana = &omap4_vana_idata;
509
510 if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
511 pmic_data->vcxio = &omap4_vcxio_idata;
512
513 if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
514 pmic_data->vusb = &omap4_vusb_idata;
515
516 if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
517 !pmic_data->clk32kg)
518 pmic_data->clk32kg = &omap4_clk32kg_idata;
fde0190d
PU		 519
520 if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8)
521 pmic_data->v1v8 = &omap4_v1v8_idata;
522
523 if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1)
524 pmic_data->v2v1 = &omap4_v2v1_idata;
b22f954b 525}
d12d1fca 526#endif /* CONFIG_ARCH_OMAP4 */
552d9dc3
PU		 527
528#if defined(CONFIG_SND_OMAP_SOC_OMAP_TWL4030) || \
529 defined(CONFIG_SND_OMAP_SOC_OMAP_TWL4030_MODULE)
530#include <linux/platform_data/omap-twl4030.h>
531
02553f5a 532/* Commonly used configuration */
552d9dc3
PU		 533static struct omap_tw4030_pdata omap_twl4030_audio_data;
534
535static struct platform_device audio_device = {
536 .name = "omap-twl4030",
537 .id = -1,
552d9dc3
PU		 538};
539
6689c875 540void omap_twl4030_audio_init(char *card_name,
40234bf7 541 struct omap_tw4030_pdata *pdata)
552d9dc3 542{
40234bf7
PU		 543 if (!pdata)
544 pdata = &omap_twl4030_audio_data;
545
546 pdata->card_name = card_name;
547
548 audio_device.dev.platform_data = pdata;
552d9dc3
PU		 549 platform_device_register(&audio_device);
550}
551
552#else /* SOC_OMAP_TWL4030 */
6689c875 553void omap_twl4030_audio_init(char *card_name,
40234bf7 554 struct omap_tw4030_pdata *pdata)
552d9dc3
PU		 555{
556 return;
557}
558#endif /* SOC_OMAP_TWL4030 */
kernel source for telekom puls (alcatel/mediatek)