Merge tag 'v3.9-rc3' into drm-intel-next-queued
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / sr_device.c
CommitLineData
0c0a5d61
TG
1/*
2 * OMAP3/OMAP4 smartreflex device file
3 *
4 * Author: Thara Gopinath <thara@ti.com>
5 *
6 * Based originally on code from smartreflex.c
7 * Copyright (C) 2010 Texas Instruments, Inc.
8 * Thara Gopinath <thara@ti.com>
9 *
10 * Copyright (C) 2008 Nokia Corporation
11 * Kalle Jokiniemi
12 *
13 * Copyright (C) 2007 Texas Instruments, Inc.
14 * Lesly A M <x0080970@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
b86aeafc 20#include <linux/power/smartreflex.h>
0c0a5d61
TG
21
22#include <linux/err.h>
23#include <linux/slab.h>
b35cecf9 24#include <linux/io.h>
0c0a5d61 25
e4c060db 26#include "soc.h"
25c7d49e 27#include "omap_device.h"
e1d6f472 28#include "voltage.h"
0c0a5d61 29#include "control.h"
d0eadf6d 30#include "pm.h"
0c0a5d61
TG
31
32static bool sr_enable_on_init;
33
0c0a5d61
TG
34/* Read EFUSE values from control registers for OMAP3430 */
35static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
36 struct omap_sr_data *sr_data)
37{
38 struct omap_sr_nvalue_table *nvalue_table;
5e7f2e12
JP
39 int i, j, count = 0;
40
41 sr_data->nvalue_count = 0;
42 sr_data->nvalue_table = NULL;
0c0a5d61
TG
43
44 while (volt_data[count].volt_nominal)
45 count++;
46
47 nvalue_table = kzalloc(sizeof(struct omap_sr_nvalue_table)*count,
48 GFP_KERNEL);
49
5e7f2e12
JP
50 if (!nvalue_table) {
51 pr_err("OMAP: SmartReflex: cannot allocate memory for n-value table\n");
52 return;
53 }
54
55 for (i = 0, j = 0; i < count; i++) {
b35cecf9 56 u32 v;
5e7f2e12 57
b35cecf9
TG
58 /*
59 * In OMAP4 the efuse registers are 24 bit aligned.
60 * A __raw_readl will fail for non-32 bit aligned address
61 * and hence the 8-bit read and shift.
62 */
63 if (cpu_is_omap44xx()) {
64 u16 offset = volt_data[i].sr_efuse_offs;
65
66 v = omap_ctrl_readb(offset) |
67 omap_ctrl_readb(offset + 1) << 8 |
68 omap_ctrl_readb(offset + 2) << 16;
69 } else {
5e7f2e12 70 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
b35cecf9 71 }
0c0a5d61 72
5e7f2e12
JP
73 /*
74 * Many OMAP SoCs don't have the eFuse values set.
75 * For example, pretty much all OMAP3xxx before
76 * ES3.something.
77 *
78 * XXX There needs to be some way for board files or
79 * userspace to add these in.
80 */
81 if (v == 0)
82 continue;
83
84 nvalue_table[j].nvalue = v;
85 nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs;
86 nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit;
87 nvalue_table[j].volt_nominal = volt_data[i].volt_nominal;
88
89 j++;
0c0a5d61
TG
90 }
91
92 sr_data->nvalue_table = nvalue_table;
5e7f2e12 93 sr_data->nvalue_count = j;
0c0a5d61
TG
94}
95
9cf793f9 96static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
0c0a5d61
TG
97{
98 struct omap_sr_data *sr_data;
3528c58e 99 struct platform_device *pdev;
0c0a5d61 100 struct omap_volt_data *volt_data;
cea6b942 101 struct omap_smartreflex_dev_attr *sr_dev_attr;
0c0a5d61
TG
102 char *name = "smartreflex";
103 static int i;
104
105 sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
106 if (!sr_data) {
7852ec05
PW
107 pr_err("%s: Unable to allocate memory for %s sr_data\n",
108 __func__, oh->name);
0c0a5d61
TG
109 return -ENOMEM;
110 }
111
cea6b942
SG
112 sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
113 if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
7852ec05
PW
114 pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
115 __func__, oh->name);
0c0a5d61
TG
116 goto exit;
117 }
118
8b765d72 119 sr_data->name = oh->name;
0c0a5d61
TG
120 sr_data->ip_type = oh->class->rev;
121 sr_data->senn_mod = 0x1;
122 sr_data->senp_mod = 0x1;
123
98aed08e
JP
124 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
125 sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
126 sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
127 sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
128 if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
129 sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
130 sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
131 } else {
132 sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
133 sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
134 }
135 }
136
cea6b942 137 sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
07684c1b 138 if (!sr_data->voltdm) {
0c0a5d61 139 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
cea6b942 140 __func__, sr_dev_attr->sensor_voltdm_name);
0c0a5d61
TG
141 goto exit;
142 }
143
144 omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
145 if (!volt_data) {
7852ec05
PW
146 pr_err("%s: No Voltage table registered for VDD%d\n",
147 __func__, i + 1);
0c0a5d61
TG
148 goto exit;
149 }
150
151 sr_set_nvalues(volt_data, sr_data);
152
153 sr_data->enable_on_init = sr_enable_on_init;
154
6efc3fe0 155 pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data));
3528c58e 156 if (IS_ERR(pdev))
0c0a5d61
TG
157 pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
158 __func__, name, oh->name);
159exit:
160 i++;
161 kfree(sr_data);
162 return 0;
163}
164
165/*
166 * API to be called from board files to enable smartreflex
167 * autocompensation at init.
168 */
169void __init omap_enable_smartreflex_on_init(void)
170{
171 sr_enable_on_init = true;
172}
173
174int __init omap_devinit_smartreflex(void)
175{
176 return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
177}