[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / prcm.c

/*
 * linux/arch/arm/mach-omap2/prcm.c
 *
 * OMAP 24xx Power Reset and Clock Management (PRCM) functions
 *
 * Copyright (C) 2005 Nokia Corporation
 *
 * Written by Tony Lindgren <tony.lindgren@nokia.com>
 *
 * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/io.h>

#include <asm/arch/common.h>
#include <asm/arch/prcm.h>

#include "clock.h"
#include "prm.h"
#include "prm-regbits-24xx.h"

static void __iomem *prm_base;
static void __iomem *cm_base;

extern void omap2_clk_prepare_for_reboot(void);

u32 omap_prcm_get_reset_sources(void)
{
	return prm_read_mod_reg(WKUP_MOD, RM_RSTST) & 0x7f;
}
EXPORT_SYMBOL(omap_prcm_get_reset_sources);

/* Resets clock rates and reboots the system. Only called from system.h */
void omap_prcm_arch_reset(char mode)
{
	u32 wkup;
	omap2_clk_prepare_for_reboot();

	if (cpu_is_omap24xx()) {
		wkup = prm_read_mod_reg(WKUP_MOD, RM_RSTCTRL) | OMAP_RST_DPLL3;
		prm_write_mod_reg(wkup, WKUP_MOD, RM_RSTCTRL);
	}
}

static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg)
{
	BUG_ON(!base);
	return __raw_readl(base + module + reg);
}

static inline void __omap_prcm_write(u32 value, void __iomem *base,
						s16 module, u16 reg)
{
	BUG_ON(!base);
	__raw_writel(value, base + module + reg);
}

/* Read a register in a PRM module */
u32 prm_read_mod_reg(s16 module, u16 idx)
{
	return __omap_prcm_read(prm_base, module, idx);
}
EXPORT_SYMBOL(prm_read_mod_reg);

/* Write into a register in a PRM module */
void prm_write_mod_reg(u32 val, s16 module, u16 idx)
{
	__omap_prcm_write(val, prm_base, module, idx);
}
EXPORT_SYMBOL(prm_write_mod_reg);

/* Read a register in a CM module */
u32 cm_read_mod_reg(s16 module, u16 idx)
{
	return __omap_prcm_read(cm_base, module, idx);
}
EXPORT_SYMBOL(cm_read_mod_reg);

/* Write into a register in a CM module */
void cm_write_mod_reg(u32 val, s16 module, u16 idx)
{
	__omap_prcm_write(val, cm_base, module, idx);
}
EXPORT_SYMBOL(cm_write_mod_reg);

void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
{
	prm_base = omap2_globals->prm;
	cm_base = omap2_globals->cm;
}
Commit	Line	Data
b824efae TL	1	/*
	2	* linux/arch/arm/mach-omap2/prcm.c
	3	*
	4	* OMAP 24xx Power Reset and Clock Management (PRCM) functions
	5	*
	6	* Copyright (C) 2005 Nokia Corporation
	7	*
	8	* Written by Tony Lindgren <tony.lindgren@nokia.com>
	9	*
	10	* Some pieces of code Copyright (C) 2005 Texas Instruments, Inc.
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
b824efae TL	16	#include <linux/module.h>
	17	#include <linux/init.h>
	18	#include <linux/clk.h>
a58caad1	19	#include <linux/io.h>
b824efae	20
a58caad1 TL	21	#include <asm/arch/common.h>
a58caad1 TL	22	#include <asm/arch/prcm.h>
44595982	23
a58caad1	24	#include "clock.h"
44595982 PW	25	#include "prm.h"
44595982 PW	26	#include "prm-regbits-24xx.h"
b824efae	27
a58caad1 TL	28	static void __iomem *prm_base;
	29	static void __iomem *cm_base;
	30
ae78dcf7 TL	31	extern void omap2_clk_prepare_for_reboot(void);
ae78dcf7 TL	32
b824efae TL	33	u32 omap_prcm_get_reset_sources(void)
b824efae TL	34	{
44595982	35	return prm_read_mod_reg(WKUP_MOD, RM_RSTST) & 0x7f;
b824efae TL	36	}
	37	EXPORT_SYMBOL(omap_prcm_get_reset_sources);
	38
	39	/* Resets clock rates and reboots the system. Only called from system.h */
	40	void omap_prcm_arch_reset(char mode)
	41	{
44595982	42	u32 wkup;
ae78dcf7	43	omap2_clk_prepare_for_reboot();
44595982 PW	44
	45	if (cpu_is_omap24xx()) {
	46	wkup = prm_read_mod_reg(WKUP_MOD, RM_RSTCTRL) \| OMAP_RST_DPLL3;
	47	prm_write_mod_reg(wkup, WKUP_MOD, RM_RSTCTRL);
	48	}
b824efae	49	}
a58caad1 TL	50
	51	static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg)
	52	{
	53	BUG_ON(!base);
	54	return __raw_readl(base + module + reg);
	55	}
	56
	57	static inline void __omap_prcm_write(u32 value, void __iomem *base,
	58	s16 module, u16 reg)
	59	{
	60	BUG_ON(!base);
	61	__raw_writel(value, base + module + reg);
	62	}
	63
	64	/* Read a register in a PRM module */
	65	u32 prm_read_mod_reg(s16 module, u16 idx)
	66	{
	67	return __omap_prcm_read(prm_base, module, idx);
	68	}
	69	EXPORT_SYMBOL(prm_read_mod_reg);
	70
	71	/* Write into a register in a PRM module */
	72	void prm_write_mod_reg(u32 val, s16 module, u16 idx)
	73	{
	74	__omap_prcm_write(val, prm_base, module, idx);
	75	}
	76	EXPORT_SYMBOL(prm_write_mod_reg);
	77
	78	/* Read a register in a CM module */
	79	u32 cm_read_mod_reg(s16 module, u16 idx)
	80	{
	81	return __omap_prcm_read(cm_base, module, idx);
	82	}
	83	EXPORT_SYMBOL(cm_read_mod_reg);
	84
	85	/* Write into a register in a CM module */
	86	void cm_write_mod_reg(u32 val, s16 module, u16 idx)
	87	{
	88	__omap_prcm_write(val, cm_base, module, idx);
	89	}
	90	EXPORT_SYMBOL(cm_write_mod_reg);
	91
	92	void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
	93	{
	94	prm_base = omap2_globals->prm;
	95	cm_base = omap2_globals->cm;
	96	}