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ARM: OMAP2: Use omap_globals for CPU detection for multi-omap
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / mux.c
CommitLineData
1dbae815
TL		 1/*
2 * linux/arch/arm/mach-omap2/mux.c
3 *
9330899e 4 * OMAP2 pin multiplexing configurations
1dbae815 5 *
9330899e
TL		 6 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation
1dbae815 8 *
9330899e 9 * Written by Tony Lindgren
1dbae815
TL		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
1dbae815
TL		 26#include <linux/module.h>
27#include <linux/init.h>
28#include <asm/system.h>
29#include <asm/io.h>
30#include <linux/spinlock.h>
31
a09e64fb
RK		 32#include <mach/control.h>
33#include <mach/mux.h>
1dbae815
TL		 34
35#ifdef CONFIG_OMAP_MUX
36
7d7f665d
TL		 37static struct omap_mux_cfg arch_mux_cfg;
38
1dbae815
TL		 39/* NOTE: See mux.h for the enumeration */
40
9330899e
TL		 41#ifdef CONFIG_ARCH_OMAP24XX
42static struct pin_config __initdata_or_module omap24xx_pins[] = {
1dbae815
TL		 43/*
44 * description mux mux pull pull debug
45 * offset mode ena type
46 */
47
48/* 24xx I2C */
49MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
50MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
7bbb3cc5 51MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1)
1dbae815
TL		 52MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
53
54/* Menelaus interrupt */
55MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
56
8d7f9f50
TL		 57/* 24xx clocks */
58MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
59
7bbb3cc5 60/* 24xx GPMC chipselects, wait pin monitoring */
7d34f3b3
TL		 61MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1)
62MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1)
3cbc9605
TL		 63MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
64MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
65MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
66MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1)
67
8d7f9f50
TL		 68/* 24xx McBSP */
69MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
70MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
71MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
72MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
73
1dbae815 74/* 24xx GPIO */
7d34f3b3
TL		 75MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
76MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1)
77MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
78MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
79MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
80MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
81MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
82MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
1dbae815 83MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
7d34f3b3 84MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
f7337a19 85MUX_CFG_24XX("N15_24XX_GPIO85", 0x103, 3, 0, 0, 1)
1dbae815 86MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
f7337a19
TL		 87MUX_CFG_24XX("P20_24XX_GPIO93", 0x10b, 3, 0, 0, 1)
88MUX_CFG_24XX("P18_24XX_GPIO95", 0x10d, 3, 0, 0, 1)
89MUX_CFG_24XX("M18_24XX_GPIO96", 0x10e, 3, 0, 0, 1)
90MUX_CFG_24XX("L14_24XX_GPIO97", 0x10f, 3, 0, 0, 1)
7d34f3b3 91MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1)
8d7f9f50 92MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
7bbb3cc5 93MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1)
8d7f9f50 94
5ac42153
TL		 95/* 242x DBG GPIO */
96MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
97MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1)
98MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1)
99MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1)
100MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1)
101MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1)
102MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1)
103MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1)
104MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
105MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
106
107/* 24xx external DMA requests */
7d34f3b3
TL		 108MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
109MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
110MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
111MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
112MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
113MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
5ac42153 114
7d34f3b3 115/* UART3 */
8d7f9f50
TL		 116MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
117MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
118
abc45e1d
KP		 119/* MMC/SDIO */
120MUX_CFG_24XX("G19_24XX_MMC_CLKO", 0x0f3, 0, 0, 0, 1)
121MUX_CFG_24XX("H18_24XX_MMC_CMD", 0x0f4, 0, 0, 0, 1)
122MUX_CFG_24XX("F20_24XX_MMC_DAT0", 0x0f5, 0, 0, 0, 1)
123MUX_CFG_24XX("H14_24XX_MMC_DAT1", 0x0f6, 0, 0, 0, 1)
124MUX_CFG_24XX("E19_24XX_MMC_DAT2", 0x0f7, 0, 0, 0, 1)
125MUX_CFG_24XX("D19_24XX_MMC_DAT3", 0x0f8, 0, 0, 0, 1)
126MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0", 0x0f9, 0, 0, 0, 1)
127MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1", 0x0fa, 0, 0, 0, 1)
128MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2", 0x0fb, 0, 0, 0, 1)
129MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1)
130MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
131MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
132
7bbb3cc5
KP		 133/* Full speed USB */
134MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1)
135MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1)
136MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1)
137MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1)
138MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1)
139MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1)
140MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1)
141
142MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1)
143MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1)
144MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1)
145MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1)
146MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1)
147MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1)
148MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1)
149MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1)
150
151MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1)
152MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1)
153MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1)
154MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1)
155MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1)
156
8d7f9f50
TL		 157/* Keypad GPIO*/
158MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
159MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
160MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1)
161MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1)
162MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1)
163MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1)
164MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1)
165MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1)
166MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1)
167MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1)
168MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1)
169MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1)
170MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1)
171
172/* 24xx Menelaus Keypad GPIO */
173MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1)
174MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1)
175MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1)
1dbae815 176
f7337a19
TL		 177/* 2430 USB */
178MUX_CFG_24XX("AD9_2430_USB0_PUEN", 0x133, 4, 0, 0, 1)
179MUX_CFG_24XX("Y11_2430_USB0_VP", 0x134, 4, 0, 0, 1)
180MUX_CFG_24XX("AD7_2430_USB0_VM", 0x135, 4, 0, 0, 1)
181MUX_CFG_24XX("AE7_2430_USB0_RCV", 0x136, 4, 0, 0, 1)
182MUX_CFG_24XX("AD4_2430_USB0_TXEN", 0x137, 4, 0, 0, 1)
183MUX_CFG_24XX("AF9_2430_USB0_SE0", 0x138, 4, 0, 0, 1)
184MUX_CFG_24XX("AE6_2430_USB0_DAT", 0x139, 4, 0, 0, 1)
185MUX_CFG_24XX("AD24_2430_USB1_SE0", 0x107, 2, 0, 0, 1)
186MUX_CFG_24XX("AB24_2430_USB1_RCV", 0x108, 2, 0, 0, 1)
187MUX_CFG_24XX("Y25_2430_USB1_TXEN", 0x109, 2, 0, 0, 1)
188MUX_CFG_24XX("AA26_2430_USB1_DAT", 0x10A, 2, 0, 0, 1)
189
190/* 2430 HS-USB */
191MUX_CFG_24XX("AD9_2430_USB0HS_DATA3", 0x133, 0, 0, 0, 1)
192MUX_CFG_24XX("Y11_2430_USB0HS_DATA4", 0x134, 0, 0, 0, 1)
193MUX_CFG_24XX("AD7_2430_USB0HS_DATA5", 0x135, 0, 0, 0, 1)
194MUX_CFG_24XX("AE7_2430_USB0HS_DATA6", 0x136, 0, 0, 0, 1)
195MUX_CFG_24XX("AD4_2430_USB0HS_DATA2", 0x137, 0, 0, 0, 1)
196MUX_CFG_24XX("AF9_2430_USB0HS_DATA0", 0x138, 0, 0, 0, 1)
197MUX_CFG_24XX("AE6_2430_USB0HS_DATA1", 0x139, 0, 0, 0, 1)
198MUX_CFG_24XX("AE8_2430_USB0HS_CLK", 0x13A, 0, 0, 0, 1)
199MUX_CFG_24XX("AD8_2430_USB0HS_DIR", 0x13B, 0, 0, 0, 1)
200MUX_CFG_24XX("AE5_2430_USB0HS_STP", 0x13c, 0, 1, 1, 1)
201MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1)
202MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1)
203
204/* 2430 McBSP */
205MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1)
206MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1)
207MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1)
208MUX_CFG_24XX("AD13_2430_MCBSP2_DR", 0x0131, 1, 0, 0, 1)
209MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1)
210MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1)
211MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1)
212MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
1dbae815
TL		 213};
214
9330899e
TL		 215#define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins)
216
217#else
218#define omap24xx_pins NULL
219#define OMAP24XX_PINS_SZ 0
220#endif /* CONFIG_ARCH_OMAP24XX */
225dfda1 221
225dfda1
TL		 222#define OMAP24XX_PULL_ENA (1 << 3)
223#define OMAP24XX_PULL_UP (1 << 4)
224
9330899e
TL		 225#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
226void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg)
227{
228 u16 orig;
229 u8 warn = 0, debug = 0;
230
44595982 231 orig = omap_ctrl_readb(cfg->mux_reg);
9330899e
TL		 232
233#ifdef CONFIG_OMAP_MUX_DEBUG
234 debug = cfg->debug;
235#endif
236 warn = (orig != reg);
237 if (debug || warn)
238 printk(KERN_WARNING
a58caad1 239 "MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n",
44595982
PW		 240 cfg->name, omap_ctrl_base_get() + cfg->mux_reg,
241 orig, reg);
9330899e
TL		 242}
243#else
244#define omap2_cfg_debug(x, y) do {} while (0)
245#endif
246
247#ifdef CONFIG_ARCH_OMAP24XX
7d7f665d 248int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
1dbae815 249{
9330899e
TL		 250 static DEFINE_SPINLOCK(mux_spin_lock);
251 unsigned long flags;
225dfda1 252 u8 reg = 0;
225dfda1 253
9330899e 254 spin_lock_irqsave(&mux_spin_lock, flags);
225dfda1
TL		 255 reg |= cfg->mask & 0x7;
256 if (cfg->pull_val)
257 reg |= OMAP24XX_PULL_ENA;
9330899e 258 if (cfg->pu_pd_val)
225dfda1 259 reg |= OMAP24XX_PULL_UP;
9330899e 260 omap2_cfg_debug(cfg, reg);
44595982 261 omap_ctrl_writeb(reg, cfg->mux_reg);
9330899e 262 spin_unlock_irqrestore(&mux_spin_lock, flags);
225dfda1 263
1dbae815
TL		 264 return 0;
265}
9330899e
TL		 266#else
267#define omap24xx_cfg_reg 0
7d7f665d
TL		 268#endif
269
270int __init omap2_mux_init(void)
271{
7d7f665d
TL		 272 if (cpu_is_omap24xx()) {
273 arch_mux_cfg.pins = omap24xx_pins;
9330899e 274 arch_mux_cfg.size = OMAP24XX_PINS_SZ;
7d7f665d
TL		 275 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
276 }
7d7f665d
TL		 277
278 return omap_mux_register(&arch_mux_cfg);
279}
1dbae815
TL		 280
281#endif
kernel source for telekom puls (alcatel/mediatek)