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1dbae815 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap2/mux.c | |
3 | * | |
2351872c | 4 | * OMAP2 and OMAP3 pin multiplexing configurations |
1dbae815 | 5 | * |
9330899e TL |
6 | * Copyright (C) 2004 - 2008 Texas Instruments Inc. |
7 | * Copyright (C) 2003 - 2008 Nokia Corporation | |
1dbae815 | 8 | * |
9330899e | 9 | * Written by Tony Lindgren |
1dbae815 TL |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
24 | * | |
25 | */ | |
1dbae815 TL |
26 | #include <linux/module.h> |
27 | #include <linux/init.h> | |
fced80c7 | 28 | #include <linux/io.h> |
1dbae815 TL |
29 | #include <linux/spinlock.h> |
30 | ||
fced80c7 RK |
31 | #include <asm/system.h> |
32 | ||
a09e64fb RK |
33 | #include <mach/control.h> |
34 | #include <mach/mux.h> | |
1dbae815 TL |
35 | |
36 | #ifdef CONFIG_OMAP_MUX | |
37 | ||
7d7f665d TL |
38 | static struct omap_mux_cfg arch_mux_cfg; |
39 | ||
1dbae815 TL |
40 | /* NOTE: See mux.h for the enumeration */ |
41 | ||
9330899e TL |
42 | #ifdef CONFIG_ARCH_OMAP24XX |
43 | static struct pin_config __initdata_or_module omap24xx_pins[] = { | |
1dbae815 TL |
44 | /* |
45 | * description mux mux pull pull debug | |
46 | * offset mode ena type | |
47 | */ | |
48 | ||
49 | /* 24xx I2C */ | |
50 | MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1) | |
51 | MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1) | |
7bbb3cc5 | 52 | MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1) |
1dbae815 TL |
53 | MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1) |
54 | ||
55 | /* Menelaus interrupt */ | |
56 | MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) | |
57 | ||
8d7f9f50 TL |
58 | /* 24xx clocks */ |
59 | MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) | |
60 | ||
7bbb3cc5 | 61 | /* 24xx GPMC chipselects, wait pin monitoring */ |
7d34f3b3 TL |
62 | MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) |
63 | MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) | |
3cbc9605 TL |
64 | MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) |
65 | MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) | |
66 | MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) | |
67 | MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1) | |
68 | ||
8d7f9f50 TL |
69 | /* 24xx McBSP */ |
70 | MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1) | |
71 | MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1) | |
72 | MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1) | |
73 | MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) | |
74 | ||
1dbae815 | 75 | /* 24xx GPIO */ |
7d34f3b3 TL |
76 | MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) |
77 | MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) | |
78 | MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) | |
79 | MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) | |
80 | MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) | |
81 | MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) | |
82 | MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) | |
83 | MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) | |
1dbae815 | 84 | MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) |
7d34f3b3 | 85 | MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) |
f7337a19 | 86 | MUX_CFG_24XX("N15_24XX_GPIO85", 0x103, 3, 0, 0, 1) |
1dbae815 | 87 | MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) |
f7337a19 TL |
88 | MUX_CFG_24XX("P20_24XX_GPIO93", 0x10b, 3, 0, 0, 1) |
89 | MUX_CFG_24XX("P18_24XX_GPIO95", 0x10d, 3, 0, 0, 1) | |
90 | MUX_CFG_24XX("M18_24XX_GPIO96", 0x10e, 3, 0, 0, 1) | |
91 | MUX_CFG_24XX("L14_24XX_GPIO97", 0x10f, 3, 0, 0, 1) | |
7d34f3b3 | 92 | MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) |
8d7f9f50 | 93 | MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) |
7bbb3cc5 | 94 | MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1) |
8d7f9f50 | 95 | |
5ac42153 TL |
96 | /* 242x DBG GPIO */ |
97 | MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1) | |
98 | MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1) | |
99 | MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1) | |
100 | MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1) | |
101 | MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1) | |
102 | MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1) | |
103 | MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1) | |
104 | MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1) | |
105 | MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1) | |
106 | MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1) | |
107 | ||
108 | /* 24xx external DMA requests */ | |
7d34f3b3 TL |
109 | MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) |
110 | MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) | |
111 | MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) | |
112 | MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) | |
113 | MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) | |
114 | MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) | |
5ac42153 | 115 | |
7d34f3b3 | 116 | /* UART3 */ |
8d7f9f50 TL |
117 | MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1) |
118 | MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1) | |
119 | ||
abc45e1d KP |
120 | /* MMC/SDIO */ |
121 | MUX_CFG_24XX("G19_24XX_MMC_CLKO", 0x0f3, 0, 0, 0, 1) | |
122 | MUX_CFG_24XX("H18_24XX_MMC_CMD", 0x0f4, 0, 0, 0, 1) | |
123 | MUX_CFG_24XX("F20_24XX_MMC_DAT0", 0x0f5, 0, 0, 0, 1) | |
124 | MUX_CFG_24XX("H14_24XX_MMC_DAT1", 0x0f6, 0, 0, 0, 1) | |
125 | MUX_CFG_24XX("E19_24XX_MMC_DAT2", 0x0f7, 0, 0, 0, 1) | |
126 | MUX_CFG_24XX("D19_24XX_MMC_DAT3", 0x0f8, 0, 0, 0, 1) | |
127 | MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0", 0x0f9, 0, 0, 0, 1) | |
128 | MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1", 0x0fa, 0, 0, 0, 1) | |
129 | MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2", 0x0fb, 0, 0, 0, 1) | |
130 | MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1) | |
131 | MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1) | |
132 | MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1) | |
133 | ||
7bbb3cc5 KP |
134 | /* Full speed USB */ |
135 | MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1) | |
136 | MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1) | |
137 | MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1) | |
138 | MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1) | |
139 | MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1) | |
140 | MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1) | |
141 | MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1) | |
142 | ||
143 | MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1) | |
144 | MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1) | |
145 | MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1) | |
146 | MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1) | |
147 | MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1) | |
148 | MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1) | |
149 | MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1) | |
150 | MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1) | |
151 | ||
152 | MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1) | |
153 | MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1) | |
154 | MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1) | |
155 | MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1) | |
156 | MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1) | |
157 | ||
8d7f9f50 TL |
158 | /* Keypad GPIO*/ |
159 | MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1) | |
160 | MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1) | |
161 | MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1) | |
162 | MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1) | |
163 | MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1) | |
164 | MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1) | |
165 | MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1) | |
166 | MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1) | |
167 | MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1) | |
168 | MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1) | |
169 | MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1) | |
170 | MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1) | |
171 | MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1) | |
172 | ||
173 | /* 24xx Menelaus Keypad GPIO */ | |
174 | MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1) | |
175 | MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1) | |
176 | MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1) | |
1dbae815 | 177 | |
f7337a19 TL |
178 | /* 2430 USB */ |
179 | MUX_CFG_24XX("AD9_2430_USB0_PUEN", 0x133, 4, 0, 0, 1) | |
180 | MUX_CFG_24XX("Y11_2430_USB0_VP", 0x134, 4, 0, 0, 1) | |
181 | MUX_CFG_24XX("AD7_2430_USB0_VM", 0x135, 4, 0, 0, 1) | |
182 | MUX_CFG_24XX("AE7_2430_USB0_RCV", 0x136, 4, 0, 0, 1) | |
183 | MUX_CFG_24XX("AD4_2430_USB0_TXEN", 0x137, 4, 0, 0, 1) | |
184 | MUX_CFG_24XX("AF9_2430_USB0_SE0", 0x138, 4, 0, 0, 1) | |
185 | MUX_CFG_24XX("AE6_2430_USB0_DAT", 0x139, 4, 0, 0, 1) | |
186 | MUX_CFG_24XX("AD24_2430_USB1_SE0", 0x107, 2, 0, 0, 1) | |
187 | MUX_CFG_24XX("AB24_2430_USB1_RCV", 0x108, 2, 0, 0, 1) | |
188 | MUX_CFG_24XX("Y25_2430_USB1_TXEN", 0x109, 2, 0, 0, 1) | |
189 | MUX_CFG_24XX("AA26_2430_USB1_DAT", 0x10A, 2, 0, 0, 1) | |
190 | ||
191 | /* 2430 HS-USB */ | |
192 | MUX_CFG_24XX("AD9_2430_USB0HS_DATA3", 0x133, 0, 0, 0, 1) | |
193 | MUX_CFG_24XX("Y11_2430_USB0HS_DATA4", 0x134, 0, 0, 0, 1) | |
194 | MUX_CFG_24XX("AD7_2430_USB0HS_DATA5", 0x135, 0, 0, 0, 1) | |
195 | MUX_CFG_24XX("AE7_2430_USB0HS_DATA6", 0x136, 0, 0, 0, 1) | |
196 | MUX_CFG_24XX("AD4_2430_USB0HS_DATA2", 0x137, 0, 0, 0, 1) | |
197 | MUX_CFG_24XX("AF9_2430_USB0HS_DATA0", 0x138, 0, 0, 0, 1) | |
198 | MUX_CFG_24XX("AE6_2430_USB0HS_DATA1", 0x139, 0, 0, 0, 1) | |
199 | MUX_CFG_24XX("AE8_2430_USB0HS_CLK", 0x13A, 0, 0, 0, 1) | |
200 | MUX_CFG_24XX("AD8_2430_USB0HS_DIR", 0x13B, 0, 0, 0, 1) | |
201 | MUX_CFG_24XX("AE5_2430_USB0HS_STP", 0x13c, 0, 1, 1, 1) | |
202 | MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1) | |
203 | MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1) | |
204 | ||
205 | /* 2430 McBSP */ | |
2619bc32 AK |
206 | MUX_CFG_24XX("AD6_2430_MCBSP_CLKS", 0x011E, 0, 0, 0, 1) |
207 | ||
208 | MUX_CFG_24XX("AB2_2430_MCBSP1_CLKR", 0x011A, 0, 0, 0, 1) | |
209 | MUX_CFG_24XX("AD5_2430_MCBSP1_FSR", 0x011B, 0, 0, 0, 1) | |
210 | MUX_CFG_24XX("AA1_2430_MCBSP1_DX", 0x011C, 0, 0, 0, 1) | |
211 | MUX_CFG_24XX("AF3_2430_MCBSP1_DR", 0x011D, 0, 0, 0, 1) | |
212 | MUX_CFG_24XX("AB3_2430_MCBSP1_FSX", 0x011F, 0, 0, 0, 1) | |
213 | MUX_CFG_24XX("Y9_2430_MCBSP1_CLKX", 0x0120, 0, 0, 0, 1) | |
214 | ||
f7337a19 TL |
215 | MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1) |
216 | MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1) | |
217 | MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1) | |
218 | MUX_CFG_24XX("AD13_2430_MCBSP2_DR", 0x0131, 1, 0, 0, 1) | |
219 | MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1) | |
220 | MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1) | |
221 | MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1) | |
222 | MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1) | |
2619bc32 AK |
223 | |
224 | MUX_CFG_24XX("AC9_2430_MCBSP3_CLKX", 0x0103, 0, 0, 0, 1) | |
225 | MUX_CFG_24XX("AE4_2430_MCBSP3_FSX", 0x0104, 0, 0, 0, 1) | |
226 | MUX_CFG_24XX("AE2_2430_MCBSP3_DR", 0x0105, 0, 0, 0, 1) | |
227 | MUX_CFG_24XX("AF4_2430_MCBSP3_DX", 0x0106, 0, 0, 0, 1) | |
228 | ||
229 | MUX_CFG_24XX("N3_2430_MCBSP4_CLKX", 0x010B, 1, 0, 0, 1) | |
230 | MUX_CFG_24XX("AD23_2430_MCBSP4_DR", 0x010C, 1, 0, 0, 1) | |
231 | MUX_CFG_24XX("AB25_2430_MCBSP4_DX", 0x010D, 1, 0, 0, 1) | |
232 | MUX_CFG_24XX("AC25_2430_MCBSP4_FSX", 0x010E, 1, 0, 0, 1) | |
233 | ||
234 | MUX_CFG_24XX("AE16_2430_MCBSP5_CLKX", 0x00ED, 1, 0, 0, 1) | |
235 | MUX_CFG_24XX("AF12_2430_MCBSP5_FSX", 0x00ED, 1, 0, 0, 1) | |
236 | MUX_CFG_24XX("K7_2430_MCBSP5_DX", 0x00EF, 1, 0, 0, 1) | |
237 | MUX_CFG_24XX("M1_2430_MCBSP5_DR", 0x00F0, 1, 0, 0, 1) | |
238 | ||
239 | /* 2430 MCSPI1 */ | |
240 | MUX_CFG_24XX("Y18_2430_MCSPI1_CLK", 0x010F, 0, 0, 0, 1) | |
241 | MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO", 0x0110, 0, 0, 0, 1) | |
242 | MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI", 0x0111, 0, 0, 0, 1) | |
243 | MUX_CFG_24XX("U1_2430_MCSPI1_CS0", 0x0112, 0, 0, 0, 1) | |
244 | ||
245 | /* Touchscreen GPIO */ | |
246 | MUX_CFG_24XX("AF19_2430_GPIO_85", 0x0113, 3, 0, 0, 1) | |
247 | ||
1dbae815 TL |
248 | }; |
249 | ||
9330899e TL |
250 | #define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins) |
251 | ||
252 | #else | |
253 | #define omap24xx_pins NULL | |
254 | #define OMAP24XX_PINS_SZ 0 | |
255 | #endif /* CONFIG_ARCH_OMAP24XX */ | |
225dfda1 | 256 | |
2351872c VP |
257 | #ifdef CONFIG_ARCH_OMAP34XX |
258 | static struct pin_config __initdata_or_module omap34xx_pins[] = { | |
259 | /* | |
260 | * Name, reg-offset, | |
261 | * mux-mode | [active-mode | off-mode] | |
262 | */ | |
263 | ||
264 | /* 34xx I2C */ | |
265 | MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba, | |
266 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
267 | MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc, | |
268 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
269 | MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be, | |
270 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
271 | MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0, | |
272 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
273 | MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2, | |
274 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
275 | MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4, | |
276 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
277 | MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00, | |
278 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
279 | MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02, | |
280 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | |
281 | ||
282 | /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/ | |
283 | MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da, | |
284 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) | |
285 | MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8, | |
286 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) | |
287 | MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec, | |
288 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
289 | MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee, | |
290 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
291 | MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc, | |
292 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
293 | MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de, | |
294 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
295 | MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0, | |
296 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
297 | MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea, | |
298 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
299 | MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4, | |
300 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
301 | MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6, | |
302 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
303 | MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8, | |
304 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
305 | MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2, | |
306 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
307 | ||
308 | /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/ | |
309 | MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0, | |
310 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) | |
311 | MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2, | |
312 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) | |
313 | MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4, | |
314 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
315 | MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, | |
316 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
317 | MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8, | |
318 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
319 | MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa, | |
320 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
321 | MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4, | |
322 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
323 | MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de, | |
324 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
325 | MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8, | |
326 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
327 | MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da, | |
328 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
329 | MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc, | |
330 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
331 | MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6, | |
332 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
333 | ||
334 | /* TLL - HSUSB: 12-pin TLL Port 1*/ | |
335 | MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da, | |
2351872c | 336 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) |
cc26b3b0 SMK |
337 | MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8, |
338 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP) | |
2351872c | 339 | MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec, |
cc26b3b0 | 340 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) |
2351872c | 341 | MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee, |
cc26b3b0 | 342 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) |
2351872c VP |
343 | MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc, |
344 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
345 | MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de, | |
346 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
347 | MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0, | |
348 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
349 | MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea, | |
350 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
351 | MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4, | |
352 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
353 | MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6, | |
354 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
355 | MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8, | |
356 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
357 | MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2, | |
358 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
359 | ||
360 | /* TLL - HSUSB: 12-pin TLL Port 2*/ | |
361 | MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0, | |
2351872c | 362 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) |
cc26b3b0 SMK |
363 | MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2, |
364 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP) | |
2351872c | 365 | MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4, |
cc26b3b0 | 366 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) |
2351872c | 367 | MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6, |
cc26b3b0 | 368 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) |
2351872c VP |
369 | MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8, |
370 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
371 | MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa, | |
372 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
373 | MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4, | |
374 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
375 | MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de, | |
376 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
377 | MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8, | |
378 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
379 | MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da, | |
380 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
381 | MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc, | |
382 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
383 | MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6, | |
384 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
385 | ||
386 | /* TLL - HSUSB: 12-pin TLL Port 3*/ | |
387 | MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180, | |
2351872c | 388 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) |
cc26b3b0 SMK |
389 | MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166, |
390 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP) | |
2351872c | 391 | MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168, |
cc26b3b0 | 392 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) |
2351872c | 393 | MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a, |
cc26b3b0 | 394 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) |
2351872c VP |
395 | MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186, |
396 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
397 | MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184, | |
398 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
399 | MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188, | |
400 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
401 | MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a, | |
402 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
403 | MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c, | |
404 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
405 | MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e, | |
406 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
407 | MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170, | |
408 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
409 | MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172, | |
410 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
cc26b3b0 SMK |
411 | |
412 | /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */ | |
413 | MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8, | |
414 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
415 | MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee, | |
416 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
417 | MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc, | |
418 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
419 | MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de, | |
420 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
421 | MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0, | |
422 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
423 | MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea, | |
424 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT) | |
425 | ||
426 | /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */ | |
427 | MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2, | |
428 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
429 | MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6, | |
430 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
431 | MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8, | |
432 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
433 | MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa, | |
434 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
435 | MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4, | |
436 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
437 | MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de, | |
438 | OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT) | |
439 | ||
440 | /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */ | |
441 | MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166, | |
442 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
443 | MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a, | |
444 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
445 | MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186, | |
446 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
447 | MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184, | |
448 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
449 | MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188, | |
450 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) | |
451 | MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a, | |
452 | OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT) | |
453 | ||
2619bc32 AK |
454 | |
455 | /* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix. | |
456 | * No internal pullup/pulldown without "_UP" or "_DOWN" suffix. | |
457 | */ | |
458 | MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa, | |
459 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) | |
460 | MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6, | |
461 | OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) | |
2351872c VP |
462 | }; |
463 | ||
464 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) | |
465 | ||
466 | #else | |
467 | #define omap34xx_pins NULL | |
468 | #define OMAP34XX_PINS_SZ 0 | |
469 | #endif /* CONFIG_ARCH_OMAP34XX */ | |
225dfda1 | 470 | |
9330899e | 471 | #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) |
2351872c | 472 | static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg) |
9330899e TL |
473 | { |
474 | u16 orig; | |
475 | u8 warn = 0, debug = 0; | |
476 | ||
2351872c VP |
477 | if (cpu_is_omap24xx()) |
478 | orig = omap_ctrl_readb(cfg->mux_reg); | |
479 | else | |
480 | orig = omap_ctrl_readw(cfg->mux_reg); | |
9330899e TL |
481 | |
482 | #ifdef CONFIG_OMAP_MUX_DEBUG | |
483 | debug = cfg->debug; | |
484 | #endif | |
485 | warn = (orig != reg); | |
486 | if (debug || warn) | |
487 | printk(KERN_WARNING | |
a58caad1 | 488 | "MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n", |
44595982 PW |
489 | cfg->name, omap_ctrl_base_get() + cfg->mux_reg, |
490 | orig, reg); | |
9330899e TL |
491 | } |
492 | #else | |
493 | #define omap2_cfg_debug(x, y) do {} while (0) | |
494 | #endif | |
495 | ||
496 | #ifdef CONFIG_ARCH_OMAP24XX | |
2619bc32 | 497 | static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) |
1dbae815 | 498 | { |
9330899e TL |
499 | static DEFINE_SPINLOCK(mux_spin_lock); |
500 | unsigned long flags; | |
225dfda1 | 501 | u8 reg = 0; |
225dfda1 | 502 | |
9330899e | 503 | spin_lock_irqsave(&mux_spin_lock, flags); |
225dfda1 TL |
504 | reg |= cfg->mask & 0x7; |
505 | if (cfg->pull_val) | |
2351872c | 506 | reg |= OMAP2_PULL_ENA; |
9330899e | 507 | if (cfg->pu_pd_val) |
2351872c | 508 | reg |= OMAP2_PULL_UP; |
9330899e | 509 | omap2_cfg_debug(cfg, reg); |
44595982 | 510 | omap_ctrl_writeb(reg, cfg->mux_reg); |
9330899e | 511 | spin_unlock_irqrestore(&mux_spin_lock, flags); |
225dfda1 | 512 | |
1dbae815 TL |
513 | return 0; |
514 | } | |
9330899e | 515 | #else |
2351872c VP |
516 | #define omap24xx_cfg_reg NULL |
517 | #endif | |
518 | ||
519 | #ifdef CONFIG_ARCH_OMAP34XX | |
520 | static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg) | |
521 | { | |
522 | static DEFINE_SPINLOCK(mux_spin_lock); | |
523 | unsigned long flags; | |
524 | u16 reg = 0; | |
525 | ||
526 | spin_lock_irqsave(&mux_spin_lock, flags); | |
527 | reg |= cfg->mux_val; | |
528 | omap2_cfg_debug(cfg, reg); | |
529 | omap_ctrl_writew(reg, cfg->mux_reg); | |
530 | spin_unlock_irqrestore(&mux_spin_lock, flags); | |
531 | ||
532 | return 0; | |
533 | } | |
534 | #else | |
535 | #define omap34xx_cfg_reg NULL | |
7d7f665d TL |
536 | #endif |
537 | ||
538 | int __init omap2_mux_init(void) | |
539 | { | |
7d7f665d TL |
540 | if (cpu_is_omap24xx()) { |
541 | arch_mux_cfg.pins = omap24xx_pins; | |
9330899e | 542 | arch_mux_cfg.size = OMAP24XX_PINS_SZ; |
7d7f665d | 543 | arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; |
2351872c VP |
544 | } else if (cpu_is_omap34xx()) { |
545 | arch_mux_cfg.pins = omap34xx_pins; | |
546 | arch_mux_cfg.size = OMAP34XX_PINS_SZ; | |
547 | arch_mux_cfg.cfg_reg = omap34xx_cfg_reg; | |
7d7f665d | 548 | } |
7d7f665d TL |
549 | |
550 | return omap_mux_register(&arch_mux_cfg); | |
551 | } | |
1dbae815 TL |
552 | |
553 | #endif |