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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / common.h
CommitLineData
4e65331c
TL		 1/*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
b2b9762f 27#ifndef __ASSEMBLER__
4e65331c 28
ec2c0825 29#include <linux/irq.h>
4e65331c 30#include <linux/delay.h>
3a8761c0 31#include <linux/i2c.h>
1ee47b0a 32#include <linux/i2c/twl.h>
3a8761c0 33#include <linux/i2c-omap.h>
dbc04161 34
b2b9762f 35#include <asm/proc-fns.h>
4e65331c 36
3a8761c0 37#include "i2c.h"
3d82cbbb 38#include "serial.h"
3a8761c0 39
54db6eee 40#include "usb.h"
dbc04161 41
ec2c0825 42#define OMAP_INTC_START NR_IRQS
7d7e1eba 43
bbd707ac
SG		 44#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
45int omap2_pm_init(void);
46#else
47static inline int omap2_pm_init(void)
48{
49 return 0;
50}
51#endif
52
53#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
54int omap3_pm_init(void);
55#else
56static inline int omap3_pm_init(void)
57{
58 return 0;
59}
60#endif
61
62#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
63int omap4_pm_init(void);
64#else
65static inline int omap4_pm_init(void)
66{
67 return 0;
68}
69#endif
70
71#ifdef CONFIG_OMAP_MUX
72int omap_mux_late_init(void);
73#else
74static inline int omap_mux_late_init(void)
75{
76 return 0;
77}
78#endif
79
4e65331c
TL		 80extern void omap2_init_common_infrastructure(void);
81
6bb27d73
SW		 82extern void omap2_sync32k_timer_init(void);
83extern void omap3_sync32k_timer_init(void);
84extern void omap3_secure_sync32k_timer_init(void);
00ea4d56 85extern void omap3_gptimer_timer_init(void);
6bb27d73
SW		 86extern void omap4_local_timer_init(void);
87extern void omap5_realtime_timer_init(void);
4e65331c
TL		 88
89void omap2420_init_early(void);
90void omap2430_init_early(void);
91void omap3430_init_early(void);
92void omap35xx_init_early(void);
93void omap3630_init_early(void);
94void omap3_init_early(void); /* Do not use this one */
ce3fc89a 95void am33xx_init_early(void);
4e65331c 96void am35xx_init_early(void);
a920360f 97void ti81xx_init_early(void);
08f30989 98void am33xx_init_early(void);
4e65331c 99void omap4430_init_early(void);
05e152c7 100void omap5_init_early(void);
bbd707ac
SG		 101void omap3_init_late(void); /* Do not use this one */
102void omap4430_init_late(void);
103void omap2420_init_late(void);
104void omap2430_init_late(void);
105void omap3430_init_late(void);
106void omap35xx_init_late(void);
107void omap3630_init_late(void);
108void am35xx_init_late(void);
109void ti81xx_init_late(void);
bbd707ac 110int omap2_common_pm_late_init(void);
4e65331c 111
6770b211
RB		 112#ifdef CONFIG_SOC_BUS
113void omap_soc_device_init(void);
114#else
115static inline void omap_soc_device_init(void)
116{
117}
118#endif
119
2f334a38
PW		 120#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
121void omap2xxx_restart(char mode, const char *cmd);
ecc46cfd 122#else
2f334a38
PW		 123static inline void omap2xxx_restart(char mode, const char *cmd)
124{
125}
ecc46cfd 126#endif
2f334a38 127
14e067c1
JSB		 128#ifdef CONFIG_SOC_AM33XX
129void am33xx_restart(char mode, const char *cmd);
130#else
131static inline void am33xx_restart(char mode, const char *cmd)
132{
133}
134#endif
135
2f334a38
PW		 136#ifdef CONFIG_ARCH_OMAP3
137void omap3xxx_restart(char mode, const char *cmd);
138#else
139static inline void omap3xxx_restart(char mode, const char *cmd)
140{
141}
142#endif
143
144#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
145void omap44xx_restart(char mode, const char *cmd);
146#else
147static inline void omap44xx_restart(char mode, const char *cmd)
148{
149}
150#endif
151
b6a4226c
PW		 152/* This gets called from mach-omap2/io.c, do not call this */
153void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
154
155void __init omap242x_map_io(void);
156void __init omap243x_map_io(void);
157void __init omap3_map_io(void);
158void __init am33xx_map_io(void);
159void __init omap4_map_io(void);
160void __init omap5_map_io(void);
161void __init ti81xx_map_io(void);
162
163/* omap_barriers_init() is OMAP4 only */
2ec1fc4e 164void omap_barriers_init(void);
4e65331c
TL		 165
166/**
167 * omap_test_timeout - busy-loop, testing a condition
168 * @cond: condition to test until it evaluates to true
169 * @timeout: maximum number of microseconds in the timeout
170 * @index: loop index (integer)
171 *
172 * Loop waiting for @cond to become true or until at least @timeout
173 * microseconds have passed. To use, define some integer @index in the
174 * calling code. After running, if @index == @timeout, then the loop has
175 * timed out.
176 */
177#define omap_test_timeout(cond, timeout, index) \
178({ \
179 for (index = 0; index < timeout; index++) { \
180 if (cond) \
181 break; \
182 udelay(1); \
183 } \
184})
185
186extern struct device *omap2_get_mpuss_device(void);
187extern struct device *omap2_get_iva_device(void);
188extern struct device *omap2_get_l3_device(void);
189extern struct device *omap4_get_dsp_device(void);
190
191void omap2_init_irq(void);
192void omap3_init_irq(void);
a920360f 193void ti81xx_init_irq(void);
4e65331c
TL		 194extern int omap_irq_pending(void);
195void omap_intc_save_context(void);
196void omap_intc_restore_context(void);
197void omap3_intc_suspend(void);
198void omap3_intc_prepare_idle(void);
199void omap3_intc_resume_idle(void);
f88f4dd8
SS		 200void omap2_intc_handle_irq(struct pt_regs *regs);
201void omap3_intc_handle_irq(struct pt_regs *regs);
c4082d49
S		 202void omap_intc_of_init(void);
203void omap_gic_of_init(void);
4e65331c 204
4e65331c 205#ifdef CONFIG_CACHE_L2X0
02afe8a7 206extern void __iomem *omap4_get_l2cache_base(void);
4e65331c
TL		 207#endif
208
52fa2120
BC		 209struct device_node;
210#ifdef CONFIG_OF
c4082d49 211int __init intc_of_init(struct device_node *node,
52fa2120
BC		 212 struct device_node *parent);
213#else
c4082d49 214int __init intc_of_init(struct device_node *node,
52fa2120
BC		 215 struct device_node *parent)
216{
217 return 0;
218}
219#endif
220
02afe8a7
SS		 221#ifdef CONFIG_SMP
222extern void __iomem *omap4_get_scu_base(void);
223#else
224static inline void __iomem *omap4_get_scu_base(void)
225{
226 return NULL;
227}
4e65331c
TL		 228#endif
229
4e65331c 230extern void __init gic_init_irq(void);
ff999b8a 231extern void gic_dist_disable(void);
cd8ce159
CC		 232extern bool gic_dist_disabled(void);
233extern void gic_timer_retrigger(void);
4e65331c 234extern void omap_smc1(u32 fn, u32 arg);
501f0c75 235extern void __iomem *omap4_get_sar_ram_base(void);
b2b9762f 236extern void omap_do_wfi(void);
4e65331c
TL		 237
238#ifdef CONFIG_SMP
239/* Needed for secondary core boot */
240extern void omap_secondary_startup(void);
ff999b8a 241extern void omap_secondary_startup_4460(void);
4e65331c
TL		 242extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
243extern void omap_auxcoreboot_addr(u32 cpu_addr);
244extern u32 omap_read_auxcoreboot0(void);
06915321
MZ		 245
246extern void omap4_cpu_die(unsigned int cpu);
247
248extern struct smp_operations omap4_smp_ops;
249
283f708c 250extern void omap5_secondary_startup(void);
4e65331c
TL		 251#endif
252
b2b9762f
SS		 253#if defined(CONFIG_SMP) && defined(CONFIG_PM)
254extern int omap4_mpuss_init(void);
255extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
256extern int omap4_finish_suspend(unsigned long cpu_state);
257extern void omap4_cpu_resume(void);
b5b4f288 258extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
b2b9762f
SS		 259#else
260static inline int omap4_enter_lowpower(unsigned int cpu,
261 unsigned int power_state)
262{
263 cpu_do_idle();
264 return 0;
265}
266
b5b4f288
SS		 267static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
268{
269 cpu_do_idle();
270 return 0;
271}
272
b2b9762f
SS		 273static inline int omap4_mpuss_init(void)
274{
275 return 0;
276}
277
278static inline int omap4_finish_suspend(unsigned long cpu_state)
279{
280 return 0;
281}
282
283static inline void omap4_cpu_resume(void)
284{}
3ba2a739 285
b2b9762f 286#endif
258ee922
TL		 287
288struct omap_sdrc_params;
289extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
290 struct omap_sdrc_params *sdrc_cs1);
1ee47b0a
B		 291struct omap2_hsmmc_info;
292extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
f583f0f2 293extern void omap_reserve(void);
258ee922 294
5c2e8852
TL		 295struct omap_hwmod;
296extern int omap_dss_reset(struct omap_hwmod *);
258ee922 297
ff931c82
RN		 298/* SoC specific clock initializer */
299extern int (*omap_clk_init)(void);
300
b2b9762f 301#endif /* __ASSEMBLER__ */
4e65331c 302#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
kernel source for telekom puls (alcatel/mediatek)