ARM: mach-nuc93x: convert boot_params to atag_offset
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap1 / board-h2.c
CommitLineData
1da177e4 1/*
dbdf9ced 2 * linux/arch/arm/mach-omap1/board-h2.c
1da177e4
LT
3 *
4 * Board specific inits for OMAP-1610 H2
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * H2 specific changes and cleanup
15 * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/kernel.h>
d052d1be 23#include <linux/platform_device.h>
1da177e4 24#include <linux/delay.h>
8056c6cb 25#include <linux/i2c.h>
1da177e4 26#include <linux/mtd/mtd.h>
9b6553cd 27#include <linux/mtd/nand.h>
1da177e4 28#include <linux/mtd/partitions.h>
561b036a 29#include <linux/mtd/physmap.h>
9b6553cd 30#include <linux/input.h>
6d16bfb5 31#include <linux/i2c/tps65010.h>
3bc48014 32#include <linux/smc91x.h>
1da177e4 33
a09e64fb 34#include <mach/hardware.h>
8056c6cb
DB
35#include <asm/gpio.h>
36
1da177e4
LT
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
1da177e4
LT
39#include <asm/mach/map.h>
40
ce491cf8
TL
41#include <plat/mux.h>
42#include <plat/dma.h>
43#include <plat/tc.h>
ce491cf8
TL
44#include <plat/irda.h>
45#include <plat/usb.h>
46#include <plat/keypad.h>
47#include <plat/common.h>
561b036a 48#include <plat/flash.h>
1da177e4 49
eb6b0b18
TL
50#include "board-h2.h"
51
52/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
53#define OMAP1610_ETHR_START 0x04000300
54
da1f026b 55static const unsigned int h2_keymap[] = {
9b6553cd 56 KEY(0, 0, KEY_LEFT),
da1f026b
JK
57 KEY(1, 0, KEY_RIGHT),
58 KEY(2, 0, KEY_3),
59 KEY(3, 0, KEY_F10),
60 KEY(4, 0, KEY_F5),
61 KEY(5, 0, KEY_9),
62 KEY(0, 1, KEY_DOWN),
9b6553cd 63 KEY(1, 1, KEY_UP),
da1f026b
JK
64 KEY(2, 1, KEY_2),
65 KEY(3, 1, KEY_F9),
66 KEY(4, 1, KEY_F7),
67 KEY(5, 1, KEY_0),
68 KEY(0, 2, KEY_ENTER),
69 KEY(1, 2, KEY_6),
9b6553cd 70 KEY(2, 2, KEY_1),
da1f026b
JK
71 KEY(3, 2, KEY_F2),
72 KEY(4, 2, KEY_F6),
73 KEY(5, 2, KEY_HOME),
74 KEY(0, 3, KEY_8),
75 KEY(1, 3, KEY_5),
76 KEY(2, 3, KEY_F12),
9b6553cd 77 KEY(3, 3, KEY_F3),
da1f026b
JK
78 KEY(4, 3, KEY_F8),
79 KEY(5, 3, KEY_END),
80 KEY(0, 4, KEY_7),
81 KEY(1, 4, KEY_4),
82 KEY(2, 4, KEY_F11),
83 KEY(3, 4, KEY_F1),
9b6553cd 84 KEY(4, 4, KEY_F4),
da1f026b
JK
85 KEY(5, 4, KEY_ESC),
86 KEY(0, 5, KEY_F13),
87 KEY(1, 5, KEY_F14),
88 KEY(2, 5, KEY_F15),
89 KEY(3, 5, KEY_F16),
90 KEY(4, 5, KEY_SLEEP),
9b6553cd
TL
91};
92
93static struct mtd_partition h2_nor_partitions[] = {
1da177e4
LT
94 /* bootloader (U-Boot, etc) in first sector */
95 {
96 .name = "bootloader",
97 .offset = 0,
98 .size = SZ_128K,
99 .mask_flags = MTD_WRITEABLE, /* force read-only */
100 },
101 /* bootloader params in the next sector */
102 {
103 .name = "params",
104 .offset = MTDPART_OFS_APPEND,
105 .size = SZ_128K,
106 .mask_flags = 0,
107 },
108 /* kernel */
109 {
110 .name = "kernel",
111 .offset = MTDPART_OFS_APPEND,
112 .size = SZ_2M,
113 .mask_flags = 0
114 },
115 /* file system */
116 {
117 .name = "filesystem",
118 .offset = MTDPART_OFS_APPEND,
119 .size = MTDPART_SIZ_FULL,
120 .mask_flags = 0
121 }
122};
123
561b036a 124static struct physmap_flash_data h2_nor_data = {
1da177e4 125 .width = 2,
561b036a 126 .set_vpp = omap1_set_vpp,
9b6553cd
TL
127 .parts = h2_nor_partitions,
128 .nr_parts = ARRAY_SIZE(h2_nor_partitions),
1da177e4
LT
129};
130
9b6553cd 131static struct resource h2_nor_resource = {
7c38cf02 132 /* This is on CS3, wherever it's mapped */
1da177e4
LT
133 .flags = IORESOURCE_MEM,
134};
135
9b6553cd 136static struct platform_device h2_nor_device = {
561b036a 137 .name = "physmap-flash",
1da177e4
LT
138 .id = 0,
139 .dev = {
9b6553cd 140 .platform_data = &h2_nor_data,
1da177e4
LT
141 },
142 .num_resources = 1,
9b6553cd 143 .resource = &h2_nor_resource,
1da177e4
LT
144};
145
a524626b
TL
146static struct mtd_partition h2_nand_partitions[] = {
147#if 0
148 /* REVISIT: enable these partitions if you make NAND BOOT
149 * work on your H2 (rev C or newer); published versions of
150 * x-load only support P2 and H3.
151 */
152 {
153 .name = "xloader",
154 .offset = 0,
155 .size = 64 * 1024,
156 .mask_flags = MTD_WRITEABLE, /* force read-only */
157 },
158 {
159 .name = "bootloader",
160 .offset = MTDPART_OFS_APPEND,
161 .size = 256 * 1024,
162 .mask_flags = MTD_WRITEABLE, /* force read-only */
163 },
164 {
165 .name = "params",
166 .offset = MTDPART_OFS_APPEND,
167 .size = 192 * 1024,
168 },
169 {
170 .name = "kernel",
171 .offset = MTDPART_OFS_APPEND,
172 .size = 2 * SZ_1M,
173 },
174#endif
175 {
176 .name = "filesystem",
177 .size = MTDPART_SIZ_FULL,
178 .offset = MTDPART_OFS_APPEND,
179 },
180};
181
414f552a
LM
182static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
183{
184 struct nand_chip *this = mtd->priv;
185 unsigned long mask;
186
187 if (cmd == NAND_CMD_NONE)
188 return;
189
190 mask = (ctrl & NAND_CLE) ? 0x02 : 0;
191 if (ctrl & NAND_ALE)
192 mask |= 0x04;
193 writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
194}
195
196#define H2_NAND_RB_GPIO_PIN 62
197
198static int h2_nand_dev_ready(struct mtd_info *mtd)
199{
200 return gpio_get_value(H2_NAND_RB_GPIO_PIN);
201}
202
203static const char *h2_part_probes[] = { "cmdlinepart", NULL };
204
5db98f75 205static struct platform_nand_data h2_nand_platdata = {
414f552a
LM
206 .chip = {
207 .nr_chips = 1,
208 .chip_offset = 0,
209 .nr_partitions = ARRAY_SIZE(h2_nand_partitions),
210 .partitions = h2_nand_partitions,
211 .options = NAND_SAMSUNG_LP_OPTIONS,
212 .part_probe_types = h2_part_probes,
213 },
214 .ctrl = {
215 .cmd_ctrl = h2_nand_cmd_ctl,
216 .dev_ready = h2_nand_dev_ready,
217
218 },
a524626b
TL
219};
220
221static struct resource h2_nand_resource = {
222 .flags = IORESOURCE_MEM,
223};
224
225static struct platform_device h2_nand_device = {
414f552a 226 .name = "gen_nand",
a524626b
TL
227 .id = 0,
228 .dev = {
414f552a 229 .platform_data = &h2_nand_platdata,
a524626b
TL
230 },
231 .num_resources = 1,
232 .resource = &h2_nand_resource,
233};
a524626b 234
3bc48014
LM
235static struct smc91x_platdata h2_smc91x_info = {
236 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
237 .leda = RPC_LED_100_10,
238 .ledb = RPC_LED_TX_RX,
239};
240
1da177e4
LT
241static struct resource h2_smc91x_resources[] = {
242 [0] = {
243 .start = OMAP1610_ETHR_START, /* Physical */
244 .end = OMAP1610_ETHR_START + 0xf,
245 .flags = IORESOURCE_MEM,
246 },
247 [1] = {
248 .start = OMAP_GPIO_IRQ(0),
249 .end = OMAP_GPIO_IRQ(0),
e7b3dc7e 250 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
1da177e4
LT
251 },
252};
253
254static struct platform_device h2_smc91x_device = {
255 .name = "smc91x",
256 .id = 0,
3bc48014
LM
257 .dev = {
258 .platform_data = &h2_smc91x_info,
259 },
1da177e4
LT
260 .num_resources = ARRAY_SIZE(h2_smc91x_resources),
261 .resource = h2_smc91x_resources,
262};
263
9b6553cd
TL
264static struct resource h2_kp_resources[] = {
265 [0] = {
266 .start = INT_KEYBOARD,
267 .end = INT_KEYBOARD,
268 .flags = IORESOURCE_IRQ,
269 },
270};
271
da1f026b
JK
272static const struct matrix_keymap_data h2_keymap_data = {
273 .keymap = h2_keymap,
274 .keymap_size = ARRAY_SIZE(h2_keymap),
275};
276
9b6553cd 277static struct omap_kp_platform_data h2_kp_data = {
4d24607b
KS
278 .rows = 8,
279 .cols = 8,
da1f026b
JK
280 .keymap_data = &h2_keymap_data,
281 .rep = true,
4d24607b 282 .delay = 9,
da1f026b 283 .dbounce = true,
9b6553cd
TL
284};
285
286static struct platform_device h2_kp_device = {
287 .name = "omap-keypad",
288 .id = -1,
289 .dev = {
290 .platform_data = &h2_kp_data,
291 },
292 .num_resources = ARRAY_SIZE(h2_kp_resources),
293 .resource = h2_kp_resources,
294};
295
296#define H2_IRDA_FIRSEL_GPIO_PIN 17
297
9b6553cd
TL
298static struct omap_irda_config h2_irda_data = {
299 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
300 .rx_channel = OMAP_DMA_UART3_RX,
301 .tx_channel = OMAP_DMA_UART3_TX,
302 .dest_start = UART3_THR,
303 .src_start = UART3_RHR,
304 .tx_trigger = 0,
305 .rx_trigger = 0,
306};
307
308static struct resource h2_irda_resources[] = {
309 [0] = {
310 .start = INT_UART3,
311 .end = INT_UART3,
312 .flags = IORESOURCE_IRQ,
313 },
314};
a524626b
TL
315
316static u64 irda_dmamask = 0xffffffff;
317
9b6553cd
TL
318static struct platform_device h2_irda_device = {
319 .name = "omapirda",
320 .id = 0,
321 .dev = {
322 .platform_data = &h2_irda_data,
a524626b 323 .dma_mask = &irda_dmamask,
9b6553cd
TL
324 },
325 .num_resources = ARRAY_SIZE(h2_irda_resources),
326 .resource = h2_irda_resources,
327};
328
329static struct platform_device h2_lcd_device = {
330 .name = "lcd_h2",
331 .id = -1,
332};
333
1da177e4 334static struct platform_device *h2_devices[] __initdata = {
9b6553cd 335 &h2_nor_device,
78be6325 336 &h2_nand_device,
1da177e4 337 &h2_smc91x_device,
9b6553cd
TL
338 &h2_irda_device,
339 &h2_kp_device,
340 &h2_lcd_device,
1da177e4
LT
341};
342
343static void __init h2_init_smc91x(void)
344{
f2d18fea 345 if (gpio_request(0, "SMC91x irq") < 0) {
1da177e4
LT
346 printk("Error requesting gpio 0 for smc91x irq\n");
347 return;
348 }
1da177e4
LT
349}
350
d8874665
TL
351static int tps_setup(struct i2c_client *client, void *context)
352{
353 tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
354 TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
355
356 return 0;
357}
358
359static struct tps65010_board tps_board = {
360 .base = H2_TPS_GPIO_BASE,
361 .outmask = 0x0f,
362 .setup = tps_setup,
363};
364
e27a93a9
TL
365static struct i2c_board_info __initdata h2_i2c_board_info[] = {
366 {
9221bb1c 367 I2C_BOARD_INFO("tps65010", 0x48),
9221bb1c 368 .irq = OMAP_GPIO_IRQ(58),
d8874665 369 .platform_data = &tps_board,
9221bb1c 370 }, {
e27a93a9 371 I2C_BOARD_INFO("isp1301_omap", 0x2d),
e27a93a9
TL
372 .irq = OMAP_GPIO_IRQ(2),
373 },
374};
375
7c38cf02 376static void __init h2_init_irq(void)
1da177e4 377{
87bd63f6 378 omap1_init_common_hw();
741e3a89 379 omap1_init_irq();
1da177e4
LT
380}
381
382static struct omap_usb_config h2_usb_config __initdata = {
383 /* usb1 has a Mini-AB port and external isp1301 transceiver */
384 .otg = 2,
385
386#ifdef CONFIG_USB_GADGET_OMAP
6e2d4107
DC
387 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
388 /* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
1da177e4
LT
389#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
390 /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
6e2d4107 391 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
1da177e4
LT
392#endif
393
394 .pins[1] = 3,
395};
396
3179a019 397static struct omap_lcd_config h2_lcd_config __initdata = {
3179a019
TL
398 .ctrl_name = "internal",
399};
400
e3318fb4 401static struct omap_board_config_kernel h2_config[] __initdata = {
3179a019 402 { OMAP_TAG_LCD, &h2_lcd_config },
1da177e4
LT
403};
404
405static void __init h2_init(void)
406{
c2cdaffe
TL
407 h2_init_smc91x();
408
9b6553cd
TL
409 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
410 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
411 * notice whether a NAND chip is enabled at probe time.
412 *
413 * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
414 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
415 * detecting that in code here, to avoid probing every possible flash
416 * configuration...
7c38cf02 417 */
9b6553cd
TL
418 h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
419 h2_nor_resource.end += SZ_32M - 1;
420
a524626b
TL
421 h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
422 h2_nand_resource.end += SZ_4K - 1;
f2d18fea
JN
423 if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
424 BUG();
425 gpio_direction_input(H2_NAND_RB_GPIO_PIN);
a524626b 426
9b6553cd
TL
427 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
428 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
7c38cf02
TL
429
430 /* MMC: card detect and WP */
6e2d4107 431 /* omap_cfg_reg(U19_ARMIO1); */ /* CD */
7c38cf02
TL
432 omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
433
93c43f25
TL
434 /* Mux pins for keypad */
435 omap_cfg_reg(F18_1610_KBC0);
436 omap_cfg_reg(D20_1610_KBC1);
437 omap_cfg_reg(D19_1610_KBC2);
438 omap_cfg_reg(E18_1610_KBC3);
439 omap_cfg_reg(C21_1610_KBC4);
440 omap_cfg_reg(G18_1610_KBR0);
441 omap_cfg_reg(F19_1610_KBR1);
442 omap_cfg_reg(H14_1610_KBR2);
443 omap_cfg_reg(E20_1610_KBR3);
444 omap_cfg_reg(E19_1610_KBR4);
445 omap_cfg_reg(N19_1610_KBR5);
446
1da177e4
LT
447 platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
448 omap_board_config = h2_config;
449 omap_board_config_size = ARRAY_SIZE(h2_config);
3179a019 450 omap_serial_init();
1ed16a86
JN
451 omap_register_i2c_bus(1, 100, h2_i2c_board_info,
452 ARRAY_SIZE(h2_i2c_board_info));
dd0cdd88 453 omap1_usb_init(&h2_usb_config);
138ab9f8 454 h2_mmc_init();
1da177e4
LT
455}
456
457static void __init h2_map_io(void)
458{
87bd63f6 459 omap1_map_common_io();
1da177e4
LT
460}
461
462MACHINE_START(OMAP_H2, "TI-H2")
e9dea0c6 463 /* Maintainer: Imre Deak <imre.deak@nokia.com> */
e9dea0c6
RK
464 .boot_params = 0x10000100,
465 .map_io = h2_map_io,
71ee7dad 466 .reserve = omap_reserve,
e9dea0c6
RK
467 .init_irq = h2_init_irq,
468 .init_machine = h2_init,
e74984e4 469 .timer = &omap1_timer,
1da177e4 470MACHINE_END